811 lines
20 KiB
C
811 lines
20 KiB
C
/*
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* @copyright (c) 2023, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-11-10 MacRsh First version
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*/
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#include "drv_uart.h"
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#ifdef MR_USING_UART
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#if !defined(MR_USING_UART1) && !defined(MR_USING_UART2) && !defined(MR_USING_UART3) && !defined(MR_USING_UART4) && !defined(MR_USING_UART5) && !defined(MR_USING_UART6) && !defined(MR_USING_UART7) && !defined(MR_USING_UART8)
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#error "Please define at least one UART macro like MR_USING_UART1. Otherwise undefine MR_USING_UART."
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#else
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enum drv_uart_index
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{
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#ifdef MR_USING_UART1
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DRV_INDEX_UART1,
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#endif /* MR_USING_UART1 */
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#ifdef MR_USING_UART2
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DRV_INDEX_UART2,
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#endif /* MR_USING_UART2 */
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#ifdef MR_USING_UART3
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DRV_INDEX_UART3,
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#endif /* MR_USING_UART3 */
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#ifdef MR_USING_UART4
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DRV_INDEX_UART4,
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#endif /* MR_USING_UART4 */
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#ifdef MR_USING_UART5
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DRV_INDEX_UART5,
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#endif /* MR_USING_UART5 */
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#ifdef MR_USING_UART6
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DRV_INDEX_UART6,
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#endif /* MR_USING_UART6 */
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#ifdef MR_USING_UART7
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DRV_INDEX_UART7,
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#endif /* MR_USING_UART7 */
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#ifdef MR_USING_UART8
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DRV_INDEX_UART8,
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#endif /* MR_USING_UART8 */
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};
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static const char *uart_name[] =
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{
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#ifdef MR_USING_UART1
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"uart1",
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#endif /* MR_USING_UART1 */
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#ifdef MR_USING_UART2
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"uart2",
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#endif /* MR_USING_UART2 */
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#ifdef MR_USING_UART3
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"uart3",
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#endif /* MR_USING_UART3 */
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#ifdef MR_USING_UART4
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"uart4",
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#endif /* MR_USING_UART4 */
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#ifdef MR_USING_UART5
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"uart5",
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#endif /* MR_USING_UART5 */
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#ifdef MR_USING_UART6
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"uart6",
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#endif /* MR_USING_UART6 */
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#ifdef MR_USING_UART7
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"uart7",
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#endif /* MR_USING_UART7 */
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#ifdef MR_USING_UART8
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"uart8",
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#endif /* MR_USING_UART8 */
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};
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static struct drv_uart_data uart_drv_data[] =
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{
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#ifdef MR_USING_UART1
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#if (MR_CFG_UART1_GROUP == 1)
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{
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USART1,
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RCC_APB2Periph_USART1,
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RCC_APB2Periph_GPIOA,
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GPIOA,
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GPIO_Pin_10,
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GPIOA,
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GPIO_Pin_9,
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USART1_IRQn,
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0
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},
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#elif (MR_CFG_UART1_GROUP == 2)
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{
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USART1,
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RCC_APB2Periph_USART1,
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RCC_APB2Periph_GPIOB,
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GPIOB,
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GPIO_Pin_7,
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GPIOA,
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GPIO_Pin_6,
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USART1_IRQn,
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GPIO_Remap_USART1
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},
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#elif (MR_CFG_UART1_GROUP == 3)
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{
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USART1,
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RCC_APB2Periph_USART1,
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RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB,
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GPIOA,
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GPIO_Pin_8,
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GPIOB,
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GPIO_Pin_15,
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USART1_IRQn,
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0
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},
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#elif (MR_CFG_UART1_GROUP == 4)
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{
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USART1,
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RCC_APB2Periph_USART1,
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RCC_APB2Periph_GPIOA,
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GPIOA,
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GPIO_Pin_7,
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GPIOA,
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GPIO_Pin_6,
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USART1_IRQn,
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GPIO_Remap_USART1
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},
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#else
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#error "MR_CFG_UART1_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3, 4)."
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#endif /* MR_CFG_UART1_GROUP */
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#endif /* MR_USING_UART1 */
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#ifdef MR_USING_UART2
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#if (MR_CFG_UART2_GROUP == 1)
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{
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USART2,
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RCC_APB1Periph_USART2,
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RCC_APB2Periph_GPIOA,
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GPIOA,
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GPIO_Pin_3,
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GPIOA,
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GPIO_Pin_2,
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USART2_IRQn,
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0
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},
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#elif (MR_CFG_UART2_GROUP == 2)
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{
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USART2,
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RCC_APB1Periph_USART2,
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RCC_APB2Periph_GPIOD,
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GPIOD,
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GPIO_Pin_6,
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GPIOD,
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GPIO_Pin_5,
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USART2_IRQn,
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GPIO_Remap_USART2
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},
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#else
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#error "MR_CFG_UART2_GROUP is not defined or defined incorrectly (supported values: 1, 2)."
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#endif /* MR_CFG_UART2_GROUP */
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#endif /* MR_USING_UART2 */
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#ifdef MR_USING_UART3
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#if (MR_CFG_UART3_GROUP == 1)
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{
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USART3,
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RCC_APB1Periph_USART3,
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RCC_APB2Periph_GPIOB,
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GPIOB,
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GPIO_Pin_11,
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GPIOB,
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GPIO_Pin_10,
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USART3_IRQn,
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0
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},
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#elif (MR_CFG_UART3_GROUP == 2)
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{
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USART3,
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RCC_APB1Periph_USART3,
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RCC_APB2Periph_GPIOC,
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GPIOC,
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GPIO_Pin_11,
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GPIOC,
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GPIO_Pin_10,
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USART3_IRQn,
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GPIO_PartialRemap_USART3
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},
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#elif (MR_CFG_UART3_GROUP == 3)
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{
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USART3,
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RCC_APB1Periph_USART3,
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RCC_APB2Periph_GPIOA,
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GPIOA,
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GPIO_Pin_14,
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GPIOA,
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GPIO_Pin_13,
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USART3_IRQn,
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GPIO_PartialRemap1_USART3
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},
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#elif (MR_CFG_UART3_GROUP == 4)
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{
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USART3,
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RCC_APB1Periph_USART3,
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RCC_APB2Periph_GPIOD,
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GPIOD,
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GPIO_Pin_9,
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GPIOD,
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GPIO_Pin_8,
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USART3_IRQn,
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GPIO_FullRemap_USART3
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},
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#else
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#error "MR_CFG_UART3_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3, 4)."
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#endif /* MR_CFG_UART3_GROUP */
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#endif /* MR_USING_UART3 */
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#ifdef MR_USING_UART4
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#if (MR_CFG_UART4_GROUP == 1)
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{
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UART4,
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RCC_APB1Periph_UART4,
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RCC_APB2Periph_GPIOC,
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GPIOC,
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GPIO_Pin_11,
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GPIOC,
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GPIO_Pin_10,
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UART4_IRQn,
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0
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},
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#elif (MR_CFG_UART4_GROUP == 2)
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{
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UART4,
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RCC_APB1Periph_UART4,
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RCC_APB2Periph_GPIOB,
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GPIOB,
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GPIO_Pin_1,
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GPIOB,
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GPIO_Pin_0,
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UART4_IRQn,
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GPIO_PartialRemap_USART4,
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},
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#elif (MR_CFG_UART4_GROUP == 3)
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{
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UART4,
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RCC_APB1Periph_UART4,
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RCC_APB2Periph_GPIOE,
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GPIOE,
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GPIO_Pin_1,
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GPIOE,
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GPIO_Pin_0,
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UART4_IRQn,
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GPIO_FullRemap_USART4
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},
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#else
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#error "MR_CFG_UART4_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3)."
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#endif /* MR_USING_UART4_GROUP */
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#endif /* MR_USING_UART4 */
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#ifdef MR_USING_UART5
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#if (MR_CFG_UART5_GROUP == 1)
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{
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UART5,
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RCC_APB1Periph_UART5,
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RCC_APB2Periph_GPIOC,
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GPIOC,
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GPIO_Pin_13,
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GPIOC,
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GPIO_Pin_12,
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UART5_IRQn,
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0
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},
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#elif (MR_CFG_UART5_GROUP == 2)
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{
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UART5,
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RCC_APB1Periph_UART5,
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RCC_APB2Periph_GPIOB,
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GPIOB,
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GPIO_Pin_5,
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GPIOB,
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GPIO_Pin_4,
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UART5_IRQn,
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GPIO_PartialRemap_USART5
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},
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#elif (MR_CFG_UART5_GROUP == 3)
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{
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UART5,
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RCC_APB1Periph_UART5,
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RCC_APB2Periph_GPIOE,
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GPIOE,
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GPIO_Pin_9,
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GPIOE,
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GPIO_Pin_8,
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UART5_IRQn,
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GPIO_FullRemap_USART5
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},
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#else
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#error "MR_CFG_UART5_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3)."
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#endif /* MR_CFG_UART5_GROUP */
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#endif /* MR_USING_UART5 */
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#ifdef MR_USING_UART6
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#if (MR_CFG_UART6_GROUP == 1)
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{
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UART6,
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RCC_APB1Periph_UART6,
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RCC_APB2Periph_GPIOC,
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GPIOC,
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GPIO_Pin_1,
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GPIOC,
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GPIO_Pin_0,
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UART6_IRQn,
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0
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},
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#elif (MR_CFG_UART6_GROUP == 2)
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{
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UART6,
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RCC_APB1Periph_UART6,
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RCC_APB2Periph_GPIOB,
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GPIOB,
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GPIO_Pin_9,
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GPIOB,
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GPIO_Pin_8,
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UART6_IRQn,
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GPIO_PartialRemap_USART6
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},
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#elif (MR_CFG_UART6_GROUP == 3)
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{
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UART6,
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RCC_APB1Periph_UART6,
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RCC_APB2Periph_GPIOE,
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GPIOE,
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GPIO_Pin_11,
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GPIOE,
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GPIO_Pin_10,
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UART6_IRQn,
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GPIO_FullRemap_USART6
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},
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#else
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#error "MR_CFG_UART6_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3)."
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#endif /* MR_CFG_UART6_GROUP */
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#endif /* MR_USING_UART6 */
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#ifdef MR_USING_UART7
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#if (MR_CFG_UART7_GROUP == 1)
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{
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UART7,
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RCC_APB1Periph_UART7,
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RCC_APB2Periph_GPIOC,
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GPIOC,
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GPIO_Pin_3,
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GPIOE,
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GPIO_Pin_2,
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UART7_IRQn,
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0
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},
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#elif (MR_CFG_UART7_GROUP == 2)
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{
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UART7,
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RCC_APB1Periph_UART7,
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RCC_APB2Periph_GPIOA,
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GPIOA,
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GPIO_Pin_7,
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GPIOA,
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GPIO_Pin_6,
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UART7_IRQn,
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GPIO_PartialRemap_USART7
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},
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#elif (MR_CFG_UART7_GROUP == 3)
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{
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UART7,
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RCC_APB1Periph_UART7,
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RCC_APB2Periph_GPIOE,
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GPIOE,
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GPIO_Pin_13,
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GPIOE,
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GPIO_Pin_12,
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UART7_IRQn,
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GPIO_FullRemap_USART7
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},
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#else
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#error "MR_CFG_UART7_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3)."
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#endif /* MR_CFG_UART7_GROUP */
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#endif /* MR_USING_UART7 */
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#ifdef MR_USING_UART8
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#if (MR_CFG_UART8_GROUP == 1)
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{
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UART8,
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RCC_APB1Periph_UART8,
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RCC_APB2Periph_GPIOC,
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GPIOC,
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GPIO_Pin_5,
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GPIOC,
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GPIO_Pin_4,
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UART8_IRQn,
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0
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},
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#elif (MR_CFG_UART8_GROUP == 2)
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{
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UART8,
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RCC_APB1Periph_UART8,
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RCC_APB2Periph_GPIOA,
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GPIOA,
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GPIO_Pin_15,
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GPIOA,
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GPIO_Pin_14,
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UART8_IRQn,
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GPIO_PartialRemap_USART8
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},
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#elif (MR_CFG_UART8_GROUP == 3)
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{
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UART8,
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RCC_APB1Periph_UART8,
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RCC_APB2Periph_GPIOE,
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GPIOE,
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GPIO_Pin_15,
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GPIOE,
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GPIO_Pin_14,
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UART8_IRQn,
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GPIO_FullRemap_USART8
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},
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#else
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#error "MR_CFG_UART8_GROUP is not defined or defined incorrectly (supported values: 1, 2, 3)."
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#endif /* MR_CFG_UART8_GROUP */
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#endif /* MR_USING_UART8 */
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};
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static struct mr_uart uart_dev[mr_array_num(uart_drv_data)];
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static int drv_uart_configure(struct mr_uart *uart, struct mr_uart_config *config)
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{
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struct drv_uart_data *uart_data = (struct drv_uart_data *)uart->dev.drv->data;
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int state = (config->baud_rate == 0) ? DISABLE : ENABLE;
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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NVIC_InitTypeDef NVIC_InitStructure = {0};
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USART_InitTypeDef USART_InitStructure = {0};
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/* Configure clock */
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RCC_APB2PeriphClockCmd(uart_data->gpio_clock, ENABLE);
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if ((uint32_t)uart_data->instance < APB2PERIPH_BASE)
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{
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RCC_APB1PeriphClockCmd(uart_data->clock, state);
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} else
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{
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RCC_APB2PeriphClockCmd(uart_data->clock, state);
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}
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/* Configure remap */
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if (uart_data->remap != 0)
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{
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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GPIO_PinRemapConfig(uart_data->remap, state);
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}
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#if (MR_USING_UART1_GROUP >= 3)
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if(uart_data->instance == USART1)
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{
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GPIO_PinRemapConfig(GPIO_Remap_USART1_HighBit, state);
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}
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#endif /* MR_USING_UART1_GROUP >= 3 */
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if (state == ENABLE)
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{
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switch (config->data_bits)
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{
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case MR_UART_DATA_BITS_8:
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{
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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break;
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}
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case MR_UART_DATA_BITS_9:
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{
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USART_InitStructure.USART_WordLength = USART_WordLength_9b;
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break;
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}
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default:
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{
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return MR_EINVAL;
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}
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}
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switch (config->stop_bits)
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{
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case MR_UART_STOP_BITS_1:
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{
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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break;
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}
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case MR_UART_STOP_BITS_2:
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{
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USART_InitStructure.USART_StopBits = USART_StopBits_2;
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break;
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}
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default:
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{
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return MR_EINVAL;
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}
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}
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switch (config->parity)
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{
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case MR_UART_PARITY_NONE:
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{
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USART_InitStructure.USART_Parity = USART_Parity_No;
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break;
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}
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case MR_UART_PARITY_ODD:
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{
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USART_InitStructure.USART_Parity = USART_Parity_Odd;
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break;
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}
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case MR_UART_PARITY_EVEN:
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{
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USART_InitStructure.USART_Parity = USART_Parity_Even;
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break;
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}
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default:
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{
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return MR_EINVAL;
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}
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}
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|
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switch (config->bit_order)
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{
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case MR_UART_BIT_ORDER_LSB:
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{
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break;
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}
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default:
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{
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return MR_EINVAL;
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}
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}
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|
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switch (config->invert)
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{
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case MR_UART_NRZ_NORMAL:
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{
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break;
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}
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default:
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{
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return MR_EINVAL;
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}
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}
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|
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/* Configure TX/RX GPIO */
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GPIO_InitStructure.GPIO_Pin = uart_data->tx_pin;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(uart_data->tx_port, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = uart_data->rx_pin;
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|
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|
GPIO_Init(uart_data->rx_port, &GPIO_InitStructure);
|
|
} else
|
|
{
|
|
/* Reset TX/RX GPIO */
|
|
GPIO_InitStructure.GPIO_Pin = uart_data->tx_pin;
|
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|
GPIO_Init(uart_data->tx_port, &GPIO_InitStructure);
|
|
GPIO_InitStructure.GPIO_Pin = uart_data->rx_pin;
|
|
GPIO_Init(uart_data->rx_port, &GPIO_InitStructure);
|
|
}
|
|
|
|
/* Configure NVIC */
|
|
NVIC_InitStructure.NVIC_IRQChannel = uart_data->irq;
|
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
|
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = state;
|
|
NVIC_Init(&NVIC_InitStructure);
|
|
USART_ITConfig(uart_data->instance, USART_IT_RXNE, state);
|
|
if (state == DISABLE)
|
|
{
|
|
USART_ITConfig(uart_data->instance, USART_IT_TXE, DISABLE);
|
|
}
|
|
|
|
/* Configure UART */
|
|
USART_InitStructure.USART_BaudRate = config->baud_rate;
|
|
USART_InitStructure.USART_HardwareFlowControl = 0;
|
|
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
|
USART_Init(uart_data->instance, &USART_InitStructure);
|
|
USART_Cmd(uart_data->instance, state);
|
|
return MR_EOK;
|
|
}
|
|
|
|
static ssize_t drv_uart_read(struct mr_uart *uart, uint8_t *buf, size_t size)
|
|
{
|
|
struct drv_uart_data *uart_data = (struct drv_uart_data *)uart->dev.drv->data;
|
|
ssize_t rd_size = 0;
|
|
|
|
for (rd_size = 0; rd_size < size; rd_size++)
|
|
{
|
|
int i = 0;
|
|
|
|
/* Read data */
|
|
while (USART_GetFlagStatus(uart_data->instance, USART_FLAG_RXNE) == RESET)
|
|
{
|
|
i++;
|
|
if (i > UINT16_MAX)
|
|
{
|
|
return rd_size;
|
|
}
|
|
}
|
|
buf[rd_size] = USART_ReceiveData(uart_data->instance);
|
|
}
|
|
return rd_size;
|
|
}
|
|
|
|
static ssize_t drv_uart_write(struct mr_uart *uart, const uint8_t *buf, size_t size)
|
|
{
|
|
struct drv_uart_data *uart_data = (struct drv_uart_data *)uart->dev.drv->data;
|
|
ssize_t wr_size = 0;
|
|
|
|
for (wr_size = 0; wr_size < size; wr_size++)
|
|
{
|
|
int i = 0;
|
|
|
|
/* Write data */
|
|
USART_SendData(uart_data->instance, buf[wr_size]);
|
|
while (USART_GetFlagStatus(uart_data->instance, USART_FLAG_TC) == RESET)
|
|
{
|
|
i++;
|
|
if (i > UINT16_MAX)
|
|
{
|
|
return wr_size;
|
|
}
|
|
}
|
|
}
|
|
return wr_size;
|
|
}
|
|
|
|
static void drv_uart_start_tx(struct mr_uart *uart)
|
|
{
|
|
struct drv_uart_data *uart_data = (struct drv_uart_data *)uart->dev.drv->data;
|
|
|
|
/* Enable TX interrupt */
|
|
USART_ITConfig(uart_data->instance, USART_IT_TXE, ENABLE);
|
|
}
|
|
|
|
static void drv_uart_stop_tx(struct mr_uart *uart)
|
|
{
|
|
struct drv_uart_data *uart_data = (struct drv_uart_data *)uart->dev.drv->data;
|
|
|
|
/* Disable TX interrupt */
|
|
USART_ITConfig(uart_data->instance, USART_IT_TXE, DISABLE);
|
|
}
|
|
|
|
static void drv_uart_isr(struct mr_uart *uart)
|
|
{
|
|
struct drv_uart_data *uart_data = (struct drv_uart_data *)uart->dev.drv->data;
|
|
|
|
if (USART_GetITStatus(uart_data->instance, USART_IT_RXNE) != RESET)
|
|
{
|
|
mr_dev_isr(&uart->dev, MR_ISR_EVENT_RD_INTER, NULL);
|
|
USART_ClearITPendingBit(uart_data->instance, USART_IT_RXNE);
|
|
}
|
|
|
|
if (USART_GetITStatus(uart_data->instance, USART_IT_TXE) != RESET)
|
|
{
|
|
mr_dev_isr(&uart->dev, MR_ISR_EVENT_WR_INTER, NULL);
|
|
USART_ClearITPendingBit(uart_data->instance, USART_IT_TXE);
|
|
}
|
|
}
|
|
|
|
#ifdef MR_USING_UART1
|
|
void USART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void USART1_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART1]);
|
|
}
|
|
#endif /* MR_USING_UART1 */
|
|
|
|
#ifdef MR_USING_UART2
|
|
void USART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void USART2_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART2]);
|
|
}
|
|
#endif /* MR_USING_UART2 */
|
|
|
|
#ifdef MR_USING_UART3
|
|
void USART3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void USART3_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART3]);
|
|
}
|
|
#endif /* MR_USING_UART3 */
|
|
|
|
#ifdef MR_USING_UART4
|
|
void UART4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void UART4_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART4]);
|
|
}
|
|
#endif /* MR_USING_UART4 */
|
|
|
|
#ifdef MR_USING_UART5
|
|
void UART5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void UART5_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART5]);
|
|
}
|
|
#endif /* MR_USING_UART5 */
|
|
|
|
#ifdef MR_USING_UART6
|
|
void UART6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void UART6_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART6]);
|
|
}
|
|
#endif /* MR_USING_UART6 */
|
|
|
|
#ifdef MR_USING_UART7
|
|
void UART7_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void UART7_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART7]);
|
|
}
|
|
#endif /* MR_USING_UART7 */
|
|
|
|
#ifdef MR_USING_UART8
|
|
void UART8_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
|
void UART8_IRQHandler(void)
|
|
{
|
|
drv_uart_isr(&uart_dev[DRV_INDEX_UART8]);
|
|
}
|
|
#endif /* MR_USING_UART8 */
|
|
|
|
static struct mr_uart_ops uart_drv_ops =
|
|
{
|
|
drv_uart_configure,
|
|
drv_uart_read,
|
|
drv_uart_write,
|
|
drv_uart_start_tx,
|
|
drv_uart_stop_tx
|
|
};
|
|
|
|
static struct mr_drv uart_drv[mr_array_num(uart_drv_data)] =
|
|
{
|
|
#ifdef MR_USING_UART1
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART1]
|
|
},
|
|
#endif /* MR_USING_UART1 */
|
|
#ifdef MR_USING_UART2
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART2]
|
|
},
|
|
#endif /* MR_USING_UART2 */
|
|
#ifdef MR_USING_UART3
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART3]
|
|
},
|
|
#endif /* MR_USING_UART3 */
|
|
#ifdef MR_USING_UART4
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART4]
|
|
},
|
|
#endif /* MR_USING_UART4 */
|
|
#ifdef MR_USING_UART5
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART5]
|
|
},
|
|
#endif /* MR_USING_UART5 */
|
|
#ifdef MR_USING_UART6
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART6]
|
|
},
|
|
#endif /* MR_USING_UART6 */
|
|
#ifdef MR_USING_UART7
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART7]
|
|
},
|
|
#endif /* MR_USING_UART7 */
|
|
#ifdef MR_USING_UART8
|
|
{
|
|
Mr_Drv_Type_Uart,
|
|
&uart_drv_ops,
|
|
&uart_drv_data[DRV_INDEX_UART8]
|
|
},
|
|
#endif /* MR_USING_UART8 */
|
|
};
|
|
|
|
int drv_uart_init(void)
|
|
{
|
|
int index = 0;
|
|
|
|
for (index = 0; index < mr_array_num(uart_dev); index++)
|
|
{
|
|
mr_uart_register(&uart_dev[index], uart_name[index], &uart_drv[index]);
|
|
}
|
|
return MR_EOK;
|
|
}
|
|
MR_INIT_CONSOLE_EXPORT(drv_uart_init);
|
|
|
|
#endif /* !defined(MR_USING_UART1) && !defined(MR_USING_UART2) && !defined(MR_USING_UART3) && !defined(MR_USING_UART4) && !defined(MR_USING_UART5) && !defined(MR_USING_UART6) && !defined(MR_USING_UART7) && !defined(MR_USING_UART8) */
|
|
|
|
#endif /* MR_USING_UART */
|