406 lines
25 KiB
C
406 lines
25 KiB
C
/*
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* @copyright (c) 2023-2024, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-11-10 MacRsh First version
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*/
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#ifndef _MR_BOARD_H_
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#define _MR_BOARD_H_
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#include "../mr-library/include/mr_config.h"
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#include "ch32v30x.h"
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#define MR_USE_CH32V30X
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#ifdef MR_USE_ADC1
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#define _DRIVER_ADC1_CONFIG \
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{ \
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.instance = ADC1, .clock = RCC_APB2Periph_ADC1 \
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}
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#endif /* MR_USE_ADC1 */
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#ifdef MR_USE_ADC2
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#define _DRIVER_ADC2_CONFIG \
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{ \
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.instance = ADC2, .clock = RCC_APB2Periph_ADC2 \
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}
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#endif /* MR_USE_ADC2 */
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#if defined(MR_USE_ADC1) || defined(MR_USE_ADC2)
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#define _DRIVER_ADC_CHANNEL_CONFIG \
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{ \
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{.channel = ADC_Channel_0, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_0}, \
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{.channel = ADC_Channel_1, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_1}, \
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{.channel = ADC_Channel_2, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_2}, \
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{.channel = ADC_Channel_3, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_3}, \
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{.channel = ADC_Channel_4, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_4}, \
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{.channel = ADC_Channel_5, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_5}, \
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{.channel = ADC_Channel_6, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_6}, \
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{.channel = ADC_Channel_7, \
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.gpio_clock = RCC_APB2Periph_GPIOA, \
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.port = GPIOA, \
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.pin = GPIO_Pin_7}, \
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{.channel = ADC_Channel_8, \
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.gpio_clock = RCC_APB2Periph_GPIOB, \
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.port = GPIOB, \
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.pin = GPIO_Pin_0}, \
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{.channel = ADC_Channel_9, \
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.gpio_clock = RCC_APB2Periph_GPIOB, \
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.port = GPIOB, \
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.pin = GPIO_Pin_1}, \
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{.channel = ADC_Channel_10, \
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.gpio_clock = RCC_APB2Periph_GPIOC, \
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.port = GPIOC, \
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.pin = GPIO_Pin_0}, \
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{.channel = ADC_Channel_11, \
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.gpio_clock = RCC_APB2Periph_GPIOC, \
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.port = GPIOC, \
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.pin = GPIO_Pin_1}, \
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{.channel = ADC_Channel_12, \
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.gpio_clock = RCC_APB2Periph_GPIOC, \
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.port = GPIOC, \
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.pin = GPIO_Pin_2}, \
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{.channel = ADC_Channel_13, \
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.gpio_clock = RCC_APB2Periph_GPIOC, \
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.port = GPIOC, \
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.pin = GPIO_Pin_3}, \
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{.channel = ADC_Channel_14, \
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.gpio_clock = RCC_APB2Periph_GPIOC, \
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.port = GPIOC, \
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.pin = GPIO_Pin_4}, \
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{.channel = ADC_Channel_15, \
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.gpio_clock = RCC_APB2Periph_GPIOC, \
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.port = GPIOC, \
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.pin = GPIO_Pin_5}, \
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{.channel = ADC_Channel_16, \
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.gpio_clock = 0, \
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.port = NULL, \
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.pin = 0}, \
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{.channel = ADC_Channel_17, \
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.gpio_clock = 0, \
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.port = NULL, \
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.pin = 0}, \
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}
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#define _DRIVER_ADC_CHANNELS (0x3ffff)
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#define _DRIVER_ADC_RESOLUTION (12)
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#endif /* defined(MR_USE_ADC1) || defined(MR_USE_ADC2) */
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#define _DRIVER_PIN_IRQ_CONFIG \
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{ \
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EXTI0_IRQn, EXTI1_IRQn, EXTI2_IRQn, EXTI3_IRQn, EXTI4_IRQn, \
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EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, \
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EXTI9_5_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, \
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EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, \
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}
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#define _DRIVER_PIN_PORT_CONFIG \
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{ \
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GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, \
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}
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#define _DRIVER_PIN_PIN_CONFIG \
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{ \
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GPIO_Pin_0, GPIO_Pin_1, GPIO_Pin_2, GPIO_Pin_3, GPIO_Pin_4, \
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GPIO_Pin_5, GPIO_Pin_6, GPIO_Pin_7, GPIO_Pin_8, GPIO_Pin_9, \
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GPIO_Pin_10, GPIO_Pin_11, GPIO_Pin_12, GPIO_Pin_13, GPIO_Pin_14, \
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GPIO_Pin_15, \
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}
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#if (MR_CFG_UART1_GROUP == 1)
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#define _DRIVER_UART1_CONFIG \
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{ \
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.instance = USART1, .clock = RCC_APB2Periph_USART1, \
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.gpio_clock = RCC_APB2Periph_GPIOA, .rx_port = GPIOA, \
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.rx_pin = GPIO_Pin_10, .tx_port = GPIOA, .tx_pin = GPIO_Pin_9, \
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.irq = USART1_IRQn, .remap = 0, .rx_dma_channel = DMA1_Channel5, \
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.rx_dma_clock = RCC_AHBPeriph_DMA1, .rx_dma_irq = DMA1_Channel5_IRQn, \
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.rx_dma_irq_it = DMA1_IT_TC5 \
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}
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#elif (MR_CFG_UART1_GROUP == 2)
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#define _DRIVER_UART1_CONFIG \
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{ \
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.instance = USART1, .clock = RCC_APB2Periph_USART1, \
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.gpio_clock = RCC_APB2Periph_GPIOB, .rx_port = GPIOB, \
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.rx_pin = GPIO_Pin_7, .tx_port = GPIOB, .tx_pin = GPIO_Pin_6, \
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.irq = USART1_IRQn, .remap = GPIO_Remap_USART1, \
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.rx_dma_channel = DMA1_Channel5, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel5_IRQn, .rx_dma_irq_it = DMA1_IT_TC5 \
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}
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#elif (MR_CFG_UART1_GROUP == 3)
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#define _DRIVER_UART1_CONFIG \
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{ \
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.instance = USART1, .clock = RCC_APB2Periph_USART1, \
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.gpio_clock = RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, \
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.rx_port = GPIOA, .rx_pin = GPIO_Pin_8, .tx_port = GPIOB, \
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.tx_pin = GPIO_Pin_15, .irq = USART1_IRQn, .remap = 0, \
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.rx_dma_channel = DMA1_Channel5, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel5_IRQn, .rx_dma_irq_it = DMA1_IT_TC5 \
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}
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#elif (MR_CFG_UART1_GROUP == 4)
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#define _DRIVER_UART1_CONFIG \
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{ \
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.instance = USART1, .clock = RCC_APB2Periph_USART1, \
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.gpio_clock = RCC_APB2Periph_GPIOA, .rx_port = GPIOA, \
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.rx_pin = GPIO_Pin_7, .tx_port = GPIOA, .tx_pin = GPIO_Pin_6, \
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.irq = USART1_IRQn, .remap = GPIO_Remap_USART1, \
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.rx_dma_channel = DMA1_Channel5, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel5_IRQn, .rx_dma_irq_it = DMA1_IT_TC5 \
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}
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#endif /* MR_CFG_UART1_GROUP */
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#if (MR_CFG_UART2_GROUP == 1)
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#define _DRIVER_UART2_CONFIG \
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{ \
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.instance = USART2, .clock = RCC_APB1Periph_USART2, \
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.gpio_clock = RCC_APB2Periph_GPIOA, .rx_port = GPIOA, \
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.rx_pin = GPIO_Pin_3, .tx_port = GPIOA, .tx_pin = GPIO_Pin_2, \
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.irq = USART2_IRQn, .remap = 0, .rx_dma_channel = DMA1_Channel6, \
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.rx_dma_clock = RCC_AHBPeriph_DMA1, .rx_dma_irq = DMA1_Channel6_IRQn, \
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.rx_dma_irq_it = DMA1_IT_TC6 \
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}
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#elif (MR_CFG_UART2_GROUP == 2)
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#define _DRIVER_UART2_CONFIG \
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{ \
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.instance = USART2, .clock = RCC_APB1Periph_USART2, \
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.gpio_clock = RCC_APB2Periph_GPIOD, .rx_port = GPIOD, \
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.rx_pin = GPIO_Pin_6, .tx_port = GPIOD, .tx_pin = GPIO_Pin_5, \
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.irq = USART2_IRQn, .remap = GPIO_Remap_USART2, \
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.rx_dma_channel = DMA1_Channel6, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel6_IRQn, .rx_dma_irq_it = DMA1_IT_TC6 \
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}
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#endif /* MR_CFG_UART2_GROUP */
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#if (MR_CFG_UART3_GROUP == 1)
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#define _DRIVER_UART3_CONFIG \
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{ \
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.instance = USART3, .clock = RCC_APB1Periph_USART3, \
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.gpio_clock = RCC_APB2Periph_GPIOB, .rx_port = GPIOB, \
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.rx_pin = GPIO_Pin_11, .tx_port = GPIOB, .tx_pin = GPIO_Pin_10, \
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.irq = USART3_IRQn, .remap = 0, .rx_dma_channel = DMA1_Channel3, \
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.rx_dma_clock = RCC_AHBPeriph_DMA1, .rx_dma_irq = DMA1_Channel3_IRQn, \
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.rx_dma_irq_it = DMA1_IT_TC3 \
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}
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#elif (MR_CFG_UART3_GROUP == 2)
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#define _DRIVER_UART3_CONFIG \
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{ \
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.instance = USART3, .clock = RCC_APB1Periph_USART3, \
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.gpio_clock = RCC_APB2Periph_GPIOC, .rx_port = GPIOC, \
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.rx_pin = GPIO_Pin_11, .tx_port = GPIOC, .tx_pin = GPIO_Pin_10, \
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.irq = USART3_IRQn, .remap = GPIO_PartialRemap_USART3, \
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.rx_dma_channel = DMA1_Channel3, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel3_IRQn, .rx_dma_irq_it = DMA1_IT_TC3 \
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}
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#elif (MR_CFG_UART3_GROUP == 3)
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#define _DRIVER_UART3_CONFIG \
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{ \
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.instance = USART3, .clock = RCC_APB1Periph_USART3, \
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.gpio_clock = RCC_APB2Periph_GPIOA, .rx_port = GPIOA, \
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.rx_pin = GPIO_Pin_14, .tx_port = GPIOA, .tx_pin = GPIO_Pin_13, \
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.irq = USART3_IRQn, .remap = GPIO_PartialRemap1_USART3, \
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.rx_dma_channel = DMA1_Channel3, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel3_IRQn, .rx_dma_irq_it = DMA1_IT_TC3 \
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}
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#elif (MR_CFG_UART3_GROUP == 4)
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#define _DRIVER_UART3_CONFIG \
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{ \
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.instance = USART3, .clock = RCC_APB1Periph_USART3, \
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.gpio_clock = RCC_APB2Periph_GPIOD, .rx_port = GPIOD, \
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.rx_pin = GPIO_Pin_9, .tx_port = GPIOD, .tx_pin = GPIO_Pin_8, \
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.irq = USART3_IRQn, .remap = GPIO_FullRemap_USART3, \
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.rx_dma_channel = DMA1_Channel3, .rx_dma_clock = RCC_AHBPeriph_DMA1, \
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.rx_dma_irq = DMA1_Channel3_IRQn, .rx_dma_irq_it = DMA1_IT_TC3 \
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}
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#endif /* MR_CFG_UART3_GROUP */
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#if (MR_CFG_UART4_GROUP == 1)
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#define _DRIVER_UART4_CONFIG \
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{ \
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.nstance = UART4, .clock = RCC_APB1Periph_UART4, \
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.pio_clock = RCC_APB2Periph_GPIOC, .rx_port = GPIOC, \
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.rx_pin = GPIO_Pin_11, .x_port = GPIOC, .tx_pin = GPIO_Pin_10, \
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.irq = UART4_IRQn, .remap = 0, .rx_dma_channel = DMA2_Channel3, \
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.rx_dma_clock = RCC_AHBPeriph_DMA2, .rx_dma_irq = DMA2_Channel3_IRQn, \
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.rx_dma_irq_it = DMA2_IT_TC3 \
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}
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#elif (MR_CFG_UART4_GROUP == 2)
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#define _DRIVER_UART4_CONFIG \
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{ \
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.instance = UART4, .clock = RCC_APB1Periph_UART4, \
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.gpio_clock = RCC_APB2Periph_GPIOB, .rx_port = GPIOB, \
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.rx_pin = GPIO_Pin_1, .tx_port = GPIOB, .tx_pin = GPIO_Pin_0, \
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.irq = UART4_IRQn, .remap = GPIO_PartialRemap_USART4, \
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.rx_dma_channel = DMA2_Channel3, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel3_IRQn, .rx_dma_irq_it = DMA2_IT_TC3 \
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}
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#elif (MR_CFG_UART4_GROUP == 3)
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#define _DRIVER_UART4_CONFIG \
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{ \
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.instance = UART4, .clock = RCC_APB1Periph_UART4, \
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.gpio_clock = RCC_APB2Periph_GPIOE, .rx_port = GPIOE, \
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.rx_pin = GPIO_Pin_1, .tx_port = GPIOE, .tx_pin = GPIO_Pin_0, \
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.irq = UART4_IRQn, .remap = GPIO_FullRemap_USART4, \
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.rx_dma_channel = DMA2_Channel3, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel3_IRQn, .rx_dma_irq_it = DMA2_IT_TC3 \
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}
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#endif /* MR_CFG_UART4_GROUP */
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#if (MR_CFG_UART5_GROUP == 1)
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#define _DRIVER_UART5_CONFIG \
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{ \
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.instance = UART5, .clock = RCC_APB1Periph_UART5, \
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.gpio_clock = RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, \
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.rx_port = GPIOD, .rx_pin = GPIO_Pin_2, .tx_port = GPIOC, \
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.tx_pin = GPIO_Pin_12, .irq = UART5_IRQn, .remap = 0, \
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.rx_dma_channel = DMA2_Channel2, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel2_IRQn, .rx_dma_irq_it = DMA2_IT_TC2 \
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}
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#elif (MR_CFG_UART5_GROUP == 2)
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#define _DRIVER_UART5_CONFIG \
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{ \
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.instance = UART5, .clock = RCC_APB1Periph_UART5, \
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.gpio_clock = RCC_APB2Periph_GPIOB, .rx_port = GPIOB, \
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.rx_pin = GPIO_Pin_5, .tx_port = GPIOB, .tx_pin = GPIO_Pin_4, \
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.irq = UART5_IRQn, .remap = GPIO_PartialRemap_USART5, \
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.rx_dma_channel = DMA2_Channel2, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel2_IRQn, .rx_dma_irq_it = DMA2_IT_TC2 \
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}
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#elif (MR_CFG_UART5_GROUP == 3)
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#define _DRIVER_UART5_CONFIG \
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{ \
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.instance = UART5, .clock = RCC_APB1Periph_UART5, \
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.gpio_clock = RCC_APB2Periph_GPIOE, .rx_port = GPIOE, \
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.rx_pin = GPIO_Pin_9, .tx_port = GPIOE, .tx_pin = GPIO_Pin_8, \
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.irq = UART5_IRQn, .remap = GPIO_FullRemap_USART5, \
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.rx_dma_channel = DMA2_Channel2, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel2_IRQn, .rx_dma_irq_it = DMA2_IT_TC2 \
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}
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#endif /* MR_CFG_UART5_GROUP */
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#if (MR_CFG_UART6_GROUP == 1)
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#define _DRIVER_UART6_CONFIG \
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{ \
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.instance = UART6, .clock = RCC_APB1Periph_UART6, \
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.gpio_clock = RCC_APB2Periph_GPIOC, .rx_port = GPIOC, \
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.rx_pin = GPIO_Pin_1, .tx_port = GPIOC, .tx_pin = GPIO_Pin_0, \
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.irq = UART6_IRQn, .remap = 0, .rx_dma_channel = DMA2_Channel7, \
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.rx_dma_clock = RCC_AHBPeriph_DMA2, .rx_dma_irq = DMA2_Channel7_IRQn, \
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.rx_dma_irq_it = DMA2_IT_TC7 \
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}
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#elif (MR_CFG_UART6_GROUP == 2)
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#define _DRIVER_UART6_CONFIG \
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{ \
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.instance = UART6, .clock = RCC_APB1Periph_UART6, \
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.gpio_clock = RCC_APB2Periph_GPIOB, .rx_port = GPIOB, \
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.rx_pin = GPIO_Pin_9, .tx_port = GPIOB, .tx_pin = GPIO_Pin_8, \
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.irq = UART6_IRQn, .remap = GPIO_PartialRemap_USART6, \
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.rx_dma_channel = DMA2_Channel7, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel7_IRQn, .rx_dma_irq_it = DMA2_IT_TC7 \
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}
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#elif (MR_CFG_UART6_GROUP == 3)
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#define _DRIVER_UART6_CONFIG \
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{ \
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.instance = UART6, .clock = RCC_APB1Periph_UART6, \
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.gpio_clock = RCC_APB2Periph_GPIOE, .rx_port = GPIOE, \
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.rx_pin = GPIO_Pin_11, .tx_port = GPIOE, .tx_pin = GPIO_Pin_10, \
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.irq = UART6_IRQn, .remap = GPIO_FullRemap_USART6, \
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.rx_dma_channel = DMA2_Channel7, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel7_IRQn, .rx_dma_irq_it = DMA2_IT_TC7 \
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}
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#endif /* MR_CFG_UART6_GROUP */
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#if (MR_CFG_UART7_GROUP == 1)
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#define _DRIVER_UART7_CONFIG \
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{ \
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.instance = UART7, .clock = RCC_APB1Periph_UART7, \
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.gpio_clock = RCC_APB2Periph_GPIOC, .rx_port = GPIOC, \
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.rx_pin = GPIO_Pin_3, .tx_port = GPIOC, .tx_pin = GPIO_Pin_2, \
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.irq = UART7_IRQn, .remap = 0, .rx_dma_channel = DMA2_Channel9, \
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.rx_dma_clock = RCC_AHBPeriph_DMA2, .rx_dma_irq = DMA2_Channel9_IRQn, \
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.rx_dma_irq_it = DMA2_IT_TC9 \
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}
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#elif (MR_CFG_UART7_GROUP == 2)
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#define _DRIVER_UART7_CONFIG \
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{ \
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.instance = UART7, .clock = RCC_APB1Periph_UART7, \
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.gpio_clock = RCC_APB2Periph_GPIOA, .rx_port = GPIOA, \
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.rx_pin = GPIO_Pin_7, .tx_port = GPIOA, .tx_pin = GPIO_Pin_6, \
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.irq = UART7_IRQn, .remap = GPIO_PartialRemap_USART7, \
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.rx_dma_channel = DMA2_Channel9, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel9_IRQn, .rx_dma_irq_it = DMA2_IT_TC9 \
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}
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#elif (MR_CFG_UART7_GROUP == 3)
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#define _DRIVER_UART7_CONFIG \
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{ \
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.instance = UART7, .clock = RCC_APB1Periph_UART7, \
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.gpio_clock = RCC_APB2Periph_GPIOE, .rx_port = GPIOE, \
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.rx_pin = GPIO_Pin_13, .tx_port = GPIOE, .tx_pin = GPIO_Pin_12, \
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.irq = UART7_IRQn, .remap = GPIO_FullRemap_USART7, \
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.rx_dma_channel = DMA2_Channel9, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
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.rx_dma_irq = DMA2_Channel9_IRQn, .rx_dma_irq_it = DMA2_IT_TC9 \
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}
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#endif /* MR_CFG_UART7_GROUP */
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#if (MR_CFG_UART8_GROUP == 1)
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#define _DRIVER_UART8_CONFIG \
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{ \
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.instance = UART8, .clock = RCC_APB1Periph_UART8, \
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.gpio_clock = RCC_APB2Periph_GPIOC, .rx_port = GPIOC, \
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.rx_pin = GPIO_Pin_5, .tx_port = GPIOC, .tx_pin = GPIO_Pin_4, \
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.irq = UART8_IRQn, .remap = 0, .rx_dma_channel = DMA2_Channel11, \
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.rx_dma_clock = RCC_AHBPeriph_DMA2, .rx_dma_irq = DMA2_Channel11_IRQn, \
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.rx_dma_irq_it = DMA2_IT_TC11 \
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}
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#elif (MR_CFG_UART8_GROUP == 2)
|
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#define _DRIVER_UART8_CONFIG \
|
|
{ \
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|
.instance = UART8, .clock = RCC_APB1Periph_UART8, \
|
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.gpio_clock = RCC_APB2Periph_GPIOA, .rx_port = GPIOA, \
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.rx_pin = GPIO_Pin_15, .tx_port = GPIOA, .tx_pin = GPIO_Pin_14, \
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.irq = UART8_IRQn, .remap = GPIO_PartialRemap_USART8, \
|
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.rx_dma_channel = DMA2_Channel11, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
|
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.rx_dma_irq = DMA2_Channel11_IRQn, .rx_dma_irq_it = DMA2_IT_TC11 \
|
|
}
|
|
#elif (MR_CFG_UART8_GROUP == 3)
|
|
#define _DRIVER_UART8_CONFIG \
|
|
{ \
|
|
.instance = UART8, .clock = RCC_APB1Periph_UART8, \
|
|
.gpio_clock = RCC_APB2Periph_GPIOE, .rx_port = GPIOE, \
|
|
.rx_pin = GPIO_Pin_15, .tx_port = GPIOE, .tx_pin = GPIO_Pin_14, \
|
|
.irq = UART8_IRQn, .remap = GPIO_FullRemap_USART8, \
|
|
.rx_dma_channel = DMA2_Channel11, .rx_dma_clock = RCC_AHBPeriph_DMA2, \
|
|
.rx_dma_irq = DMA2_Channel11_IRQn, .rx_dma_irq_it = DMA2_IT_TC11 \
|
|
}
|
|
#endif /* MR_CFG_UART8_GROUP */
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|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif /* __cplusplus */
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|
|
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#endif /* _MR_BOARD_H_ */
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