168 lines
6.8 KiB
C
168 lines
6.8 KiB
C
/*
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* @copyright (c) 2023-2024, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-11-01 MacRsh First version
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*/
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#ifndef _MR_SPI_H_
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#define _MR_SPI_H_
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#include "../mr-library/include/mr_api.h"
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#ifdef MR_USE_SPI
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/**
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* @addtogroup SPI
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* @{
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*/
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#define MR_SPI_ROLE_MASTER (0) /**< SPI master */
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#define MR_SPI_ROLE_SLAVE (1) /**< SPI slave */
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#define MR_SPI_MODE_0 (0) /**< CPOL = 0, CPHA = 0 */
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#define MR_SPI_MODE_1 (1) /**< CPOL = 0, CPHA = 1 */
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#define MR_SPI_MODE_2 (2) /**< CPOL = 1, CPHA = 0 */
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#define MR_SPI_MODE_3 (3) /**< CPOL = 1, CPHA = 1 */
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#define MR_SPI_BIT_ORDER_MSB (0) /**< MSB first */
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#define MR_SPI_BIT_ORDER_LSB (1) /**< LSB first */
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#define MR_SPI_DATA_BITS_8 (8) /**< 8 bits data */
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#define MR_SPI_DATA_BITS_16 (16) /**< 16 bits data */
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#define MR_SPI_DATA_BITS_32 (32) /**< 32 bits data */
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#define MR_SPI_REG_BITS_0 (0) /**< Disable register */
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#define MR_SPI_REG_BITS_8 (8) /**< 8 bits register */
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#define MR_SPI_REG_BITS_16 (16) /**< 16 bits register */
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#define MR_SPI_REG_BITS_32 (32) /**< 32 bits register */
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/**
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* @brief SPI default configuration.
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*/
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#define MR_SPI_CONFIG_DEFAULT \
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{ \
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.baud_rate = 3000000, \
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.role = MR_SPI_ROLE_MASTER, \
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.mode = MR_SPI_MODE_0, \
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.bit_order = MR_SPI_BIT_ORDER_MSB, \
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.data_bits = MR_SPI_DATA_BITS_8, \
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.reg_bits = MR_SPI_REG_BITS_0, \
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.cs_delay = 0, \
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}
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#define MR_CMD_SPI_CONFIG MR_CMD_CONFIG /**< Configuration command */
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#define MR_CMD_SPI_REG MR_CMD_POS /**< Register command */
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#define MR_CMD_SPI_RD_FIFO_SIZE (0x01) /**< Read FIFO size command */
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#define MR_CMD_SPI_WR_FIFO_SIZE (0x02) /**< Write FIFO size command */
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#define MR_CMD_SPI_RD_FIFO_DATA (0x03) /**< Read FIFO data command */
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#define MR_CMD_SPI_WR_FIFO_DATA (0x04) /**< Write FIFO data command */
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#define MR_CMD_SPI_TRANSFER (0x05) /**< Transfer command */
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#define MR_EVENT_SPI_RD_COMPLETE_INT \
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MR_EVENT_RD_COMPLETE /**< Interrupt on read completion event */
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#define MR_EVENT_SPI_WR_COMPLETE_INT \
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MR_EVENT_WR_COMPLETE /**< Interrupt on write completion event */
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#define MR_SPI_CS_ACTIVE_LOW (0) /**< Active low */
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#define MR_SPI_CS_ACTIVE_HIGH (1) /**< Active high */
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#define MR_SPI_CS_ACTIVE_NONE (2) /**< Active none */
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/**
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* @brief SPI configuration structure.
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*/
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struct mr_spi_config
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{
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uint32_t baud_rate; /**< Baud rate */
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uint32_t role; /**< Role(master/slave) */
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uint32_t mode; /**< Mode */
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uint32_t bit_order; /**< Bit order */
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uint32_t data_bits; /**< Data bits */
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uint32_t reg_bits; /**< Register bits */
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uint32_t cs_delay; /**< CS delay */
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};
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/**
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* @brief SPI transfer structure.
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*/
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struct mr_spi_transfer
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{
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void *rbuf; /**< Read buffer */
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const void *wbuf; /**< Write buffer */
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size_t count; /**< Transfer size */
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};
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/**
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* @brief SPI data type.
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*/
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typedef uint8_t mr_spi_data_t; /**< SPI read/write data type */
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/**
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* @brief SPI bus structure.
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*/
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struct mr_spi_bus
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{
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struct mr_device device; /**< Device */
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struct mr_spi_config config; /**< Configuration */
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volatile void *owner; /**< Owner */
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#ifdef MR_USE_PIN
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int pin_descriptor; /**< Pin device descriptor */
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#endif /* MR_USE_PIN */
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};
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#define MR_SPI_CS_MODE_NONE (0) /**< None */
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#define MR_SPI_CS_MODE_OUTPUT (1) /**< Output push-pull mode */
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#define MR_SPI_CS_MODE_INPUT_UP (4) /**< Input pull-up mode */
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#define MR_SPI_CS_MODE_INPUT_DOWN (5) /**< Input pull-down mode */
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/**
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* @brief SPI bus driver operations structure.
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*/
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struct mr_spi_bus_driver_ops
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{
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int (*configure)(struct mr_driver *driver, bool enable,
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struct mr_spi_config *config);
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int (*receive)(struct mr_driver *driver, uint32_t *data);
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int (*send)(struct mr_driver *driver, uint32_t data);
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/* Optional operations */
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int (*cs_configure)(struct mr_driver *driver, uint32_t pin, uint32_t mode);
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int (*cs_set)(struct mr_driver *driver, uint32_t pin, uint8_t level);
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};
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/**
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* @brief SPI device structure.
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*/
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struct mr_spi_device
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{
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struct mr_device device; /**< Device */
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struct mr_spi_config config; /**< Configuration */
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struct mr_fifo rfifo; /**< Read FIFO */
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size_t rfifo_size; /**< Read buffer size */
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int cs_pin; /**< CS pin */
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int cs_active; /**< CS active level */
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};
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int mr_spi_bus_register(struct mr_spi_bus *spi_bus, const char *path,
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struct mr_driver *driver);
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int mr_spi_device_register(struct mr_spi_device *spi_device, const char *path,
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int cs_pin, int cs_active, const char *spi_bus_name);
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int mr_spi_device_unregister(struct mr_spi_device *spi_device);
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/** @} */
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#endif /* MR_USE_SPI */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* _MR_SPI_H_ */
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