422 lines
11 KiB
C
422 lines
11 KiB
C
/*
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* @copyright (c) 2023, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-11-11 MacRsh First version
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*/
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#include "drv_pin.h"
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#ifdef MR_USING_PIN
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#if !defined(MR_USING_GPIOA) && !defined(MR_USING_GPIOB) && !defined(MR_USING_GPIOC) && !defined(MR_USING_GPIOD) && !defined(MR_USING_GPIOE)
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#error "Please define at least one GPIO macro like MR_USING_GPIOA. Otherwise undefine MR_USING_GPIO."
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#else
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static IRQn_Type pin_irq_map[] =
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{
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EXTI0_IRQn,
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EXTI1_IRQn,
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EXTI2_IRQn,
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EXTI3_IRQn,
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EXTI4_IRQn,
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EXTI9_5_IRQn,
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EXTI9_5_IRQn,
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EXTI9_5_IRQn,
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EXTI9_5_IRQn,
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EXTI9_5_IRQn,
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EXTI15_10_IRQn,
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EXTI15_10_IRQn,
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EXTI15_10_IRQn,
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EXTI15_10_IRQn,
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EXTI15_10_IRQn,
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EXTI15_10_IRQn,
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};
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static int pin_irq_mask[] =
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{
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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};
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static struct drv_pin_port_data pin_port_drv_data[] =
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{
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#ifdef MR_USING_GPIOA
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{GPIOA},
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#else
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{MR_NULL},
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#endif /* MR_USING_GPIOA */
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#ifdef MR_USING_GPIOB
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{GPIOB},
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#else
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{MR_NULL},
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#endif /* MR_USING_GPIOB */
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#ifdef MR_USING_GPIOC
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{GPIOC},
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#else
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{MR_NULL},
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#endif /* MR_USING_GPIOC */
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#ifdef MR_USING_GPIOD
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{GPIOD},
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#else
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{MR_NULL},
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#endif /* MR_USING_GPIOD */
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#ifdef MR_USING_GPIOE
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{GPIOE},
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#else
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{MR_NULL},
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#endif /* MR_USING_GPIOE */
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};
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static struct drv_pin_data pin_drv_data[] =
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{
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{GPIO_PIN_0},
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{GPIO_PIN_1},
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{GPIO_PIN_2},
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{GPIO_PIN_3},
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{GPIO_PIN_4},
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{GPIO_PIN_5},
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{GPIO_PIN_6},
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{GPIO_PIN_7},
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{GPIO_PIN_8},
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{GPIO_PIN_9},
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{GPIO_PIN_10},
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{GPIO_PIN_11},
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{GPIO_PIN_12},
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{GPIO_PIN_13},
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{GPIO_PIN_14},
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{GPIO_PIN_15},
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};
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static struct mr_pin pin_dev;
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static struct drv_pin_port_data *drv_pin_get_port_data(int pin)
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{
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pin /= 16;
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if ((pin >= mr_array_num(pin_port_drv_data)) || (pin_port_drv_data[pin].port == MR_NULL))
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{
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return MR_NULL;
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}
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return &pin_port_drv_data[pin];
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}
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static struct drv_pin_data *drv_pin_get_data(int pin)
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{
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pin %= 16;
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if (pin >= mr_array_num(pin_drv_data))
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{
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return MR_NULL;
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}
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return &pin_drv_data[pin];
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}
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static int drv_pin_configure(struct mr_pin *pin, int number, int mode)
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{
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struct drv_pin_port_data *pin_port_data = drv_pin_get_port_data(number);
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struct drv_pin_data *pin_data = drv_pin_get_data(number);
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uint32_t exti_line = number % 16;
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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/* Check pin is valid */
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if (pin_port_data == MR_NULL || pin_data == MR_NULL)
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{
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return MR_EINVAL;
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}
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/* Configure clock */
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#ifdef MR_USING_GPIOA
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if (pin_port_data->port == GPIOA)
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{
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__HAL_RCC_GPIOA_CLK_ENABLE();
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}
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#endif /* MR_USING_GPIOA */
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#ifdef MR_USING_GPIOB
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if (pin_port_data->port == GPIOB)
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{
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__HAL_RCC_GPIOB_CLK_ENABLE();
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}
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#endif /* MR_USING_GPIOB */
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#ifdef MR_USING_GPIOC
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if (pin_port_data->port == GPIOC)
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{
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__HAL_RCC_GPIOC_CLK_ENABLE();
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}
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#endif /* MR_USING_GPIOC */
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#ifdef MR_USING_GPIOD
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if (pin_port_data->port == GPIOD)
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{
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__HAL_RCC_GPIOD_CLK_ENABLE();
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}
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#endif /* MR_USING_GPIOD */
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#ifdef MR_USING_GPIOE
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if (pin_port_data->port == GPIOE)
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{
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__HAL_RCC_GPIOE_CLK_ENABLE();
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}
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#endif /* MR_USING_GPIOE */
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switch (mode)
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{
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case MR_PIN_MODE_NONE:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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break;
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}
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case MR_PIN_MODE_OUTPUT:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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break;
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}
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case MR_PIN_MODE_OUTPUT_OD:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_OD;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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break;
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}
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case MR_PIN_MODE_INPUT:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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break;
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}
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case MR_PIN_MODE_INPUT_DOWN:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
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GPIO_InitStructure.Pull = GPIO_PULLDOWN;
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break;
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}
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case MR_PIN_MODE_INPUT_UP:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
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GPIO_InitStructure.Pull = GPIO_PULLUP;
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break;
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}
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case MR_PIN_MODE_IRQ_RISING:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING;
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GPIO_InitStructure.Pull = GPIO_PULLDOWN;
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break;
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}
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case MR_PIN_MODE_IRQ_FALLING:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_IT_FALLING;
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GPIO_InitStructure.Pull = GPIO_PULLUP;
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break;
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}
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case MR_PIN_MODE_IRQ_EDGE:
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{
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GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING_FALLING;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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break;
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}
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default:
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{
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return MR_EINVAL;
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}
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}
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/* Configure EXTI */
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if (mode >= MR_PIN_MODE_IRQ_RISING)
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{
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if ((pin_irq_mask[exti_line] != -1) && (pin_irq_mask[exti_line] != number))
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{
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return MR_EBUSY;
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}
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pin_irq_mask[exti_line] = number;
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HAL_NVIC_SetPriority(pin_irq_map[exti_line], 5, 0);
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HAL_NVIC_EnableIRQ(pin_irq_map[exti_line]);
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} else if (number == pin_irq_mask[exti_line])
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{
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if ((exti_line >= 5) && (exti_line <= 9))
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{
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if ((pin_irq_mask[5] == -1) && (pin_irq_mask[6] == -1) && (pin_irq_mask[7] == -1) &&
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(pin_irq_mask[8] == -1) && (pin_irq_mask[9] == -1))
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{
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HAL_NVIC_DisableIRQ(pin_irq_map[exti_line]);
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}
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} else
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{
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if ((pin_irq_mask[10] == -1) && (pin_irq_mask[11] == -1) && (pin_irq_mask[12] == -1) &&
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(pin_irq_mask[13] == -1) && (pin_irq_mask[14] == -1) && (pin_irq_mask[15] == -1))
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{
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HAL_NVIC_DisableIRQ(pin_irq_map[exti_line]);
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}
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}
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pin_irq_mask[exti_line] = -1;
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}
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/* Configure GPIO */
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GPIO_InitStructure.Pin = pin_data->pin;
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GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH;
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HAL_GPIO_Init(pin_port_data->port, &GPIO_InitStructure);
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return MR_EOK;
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}
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static uint8_t drv_pin_read(struct mr_pin *pin, int number)
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{
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struct drv_pin_port_data *pin_port_data = drv_pin_get_port_data(number);
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struct drv_pin_data *pin_data = drv_pin_get_data(number);
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/* Check pin is valid */
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if (pin_port_data == NULL || pin_data == NULL)
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{
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return 0;
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}
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return (int)HAL_GPIO_ReadPin(pin_port_data->port, pin_data->pin);
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}
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static void drv_pin_write(struct mr_pin *pin, int number, uint8_t value)
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{
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struct drv_pin_port_data *pin_port_data = drv_pin_get_port_data(number);
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struct drv_pin_data *pin_data = drv_pin_get_data(number);
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/* Check pin is valid */
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if (pin_port_data == NULL || pin_data == NULL)
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{
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return;
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}
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HAL_GPIO_WritePin(pin_port_data->port, pin_data->pin, (GPIO_PinState)value);
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}
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void EXTI0_IRQHandler(void)
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{
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if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_0) != RESET)
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[0]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_0);
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}
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}
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void EXTI1_IRQHandler(void)
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{
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if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_1) != RESET)
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[1]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_1);
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}
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}
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void EXTI2_IRQHandler(void)
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{
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if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_2) != RESET)
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[2]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_2);
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}
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}
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void EXTI3_IRQHandler(void)
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{
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if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_3) != RESET)
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[3]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_3);
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}
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}
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void EXTI4_IRQHandler(void)
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{
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if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_4) != RESET)
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[4]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_4);
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}
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}
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void EXTI9_5_IRQHandler(void)
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{
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if ((__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_5) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_6) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_7) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_8) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_9) != RESET))
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[5]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[6]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[7]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[8]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[9]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_5);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_6);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_7);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_8);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_9);
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}
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}
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void EXTI15_10_IRQHandler(void)
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{
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if ((__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_10) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_11) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_12) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_13) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_14) != RESET)
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|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_15) != RESET))
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{
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[10]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[11]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[12]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[13]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[14]);
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mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_RD_INT, &pin_irq_mask[15]);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_10);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_11);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_12);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_13);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_14);
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_15);
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}
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}
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static struct mr_pin_ops pin_drv_ops =
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{
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drv_pin_configure,
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drv_pin_read,
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drv_pin_write
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};
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static struct mr_drv pin_drv =
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{
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Mr_Drv_Type_Pin,
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&pin_drv_ops,
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MR_NULL
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};
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int drv_pin_init(void)
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{
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return mr_pin_register(&pin_dev, "pin", &pin_drv);
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}
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MR_DRV_EXPORT(drv_pin_init);
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#endif /* !defined(MR_USING_GPIOA) && !defined(MR_USING_GPIOB) && !defined(MR_USING_GPIOC) && !defined(MR_USING_GPIOD) && !defined(MR_USING_GPIOE) */
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#endif /* MR_USING_PIN */
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