441 lines
12 KiB
C
441 lines
12 KiB
C
/*
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* @copyright (c) 2023-2024, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-11-09 MacRsh First version
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*/
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#include "include/device/mr_i2c.h"
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#ifdef MR_USING_I2C
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static int mr_i2c_bus_open(struct mr_dev *dev)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)dev;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)dev->drv->ops;
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/* Reset the hold */
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i2c_bus->hold = MR_FALSE;
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/* Default address is 0x00 and 7-bit */
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return ops->configure(i2c_bus, &i2c_bus->config, 0x00, MR_I2C_ADDR_BITS_7);
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}
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static int mr_i2c_bus_close(struct mr_dev *dev)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)dev;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)dev->drv->ops;
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struct mr_i2c_config close_config = {0};
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return ops->configure(i2c_bus, &close_config, 0x00, MR_I2C_ADDR_BITS_7);
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}
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static ssize_t mr_i2c_bus_read(struct mr_dev *dev, int off, void *buf, size_t size, int async)
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{
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return MR_ENOTSUP;
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}
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static ssize_t mr_i2c_bus_write(struct mr_dev *dev, int off, const void *buf, size_t size, int async)
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{
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return MR_ENOTSUP;
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}
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static ssize_t mr_i2c_bus_isr(struct mr_dev *dev, int event, void *args)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)dev;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)i2c_bus->dev.drv->ops;
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switch (event)
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{
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case MR_ISR_I2C_RD_INT:
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{
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struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)i2c_bus->owner;
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uint8_t data = ops->read(i2c_bus, MR_ENABLE);
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/* Read data to FIFO. if callback is set, call it */
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mr_ringbuf_push_force(&i2c_dev->rd_fifo, data);
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if (i2c_dev->dev.rd_call.call != MR_NULL)
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{
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ssize_t size = (ssize_t)mr_ringbuf_get_data_size(&i2c_dev->rd_fifo);
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i2c_dev->dev.rd_call.call(i2c_dev->dev.rd_call.desc, &size);
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}
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return MR_EOK;
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}
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default:
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{
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return MR_ENOTSUP;
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}
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}
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}
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/**
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* @brief This function registers a i2c-bus.
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*
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* @param i2c_bus The i2c-bus.
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* @param name The name of the i2c-bus.
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* @param drv The driver of the i2c-bus.
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*
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* @return MR_EOK on success, otherwise an error code.
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*/
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int mr_i2c_bus_register(struct mr_i2c_bus *i2c_bus, const char *name, struct mr_drv *drv)
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{
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static struct mr_dev_ops ops =
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{
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mr_i2c_bus_open,
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mr_i2c_bus_close,
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mr_i2c_bus_read,
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mr_i2c_bus_write,
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MR_NULL,
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mr_i2c_bus_isr
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};
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struct mr_i2c_config default_config = MR_I2C_CONFIG_DEFAULT;
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MR_ASSERT(i2c_bus != MR_NULL);
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MR_ASSERT(name != MR_NULL);
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MR_ASSERT(drv != MR_NULL);
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MR_ASSERT(drv->ops != MR_NULL);
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/* Initialize the fields */
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i2c_bus->config = default_config;
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i2c_bus->owner = MR_NULL;
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i2c_bus->hold = MR_FALSE;
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/* Register the i2c-bus */
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return mr_dev_register(&i2c_bus->dev, name, Mr_Dev_Type_I2C, MR_SFLAG_RDWR, &ops, drv);
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}
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MR_INLINE int i2c_dev_take_bus(struct mr_i2c_dev *i2c_dev)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)i2c_dev->dev.parent;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)i2c_bus->dev.drv->ops;
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/* Check if the bus is busy */
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if ((i2c_bus->hold == MR_TRUE) && (i2c_dev != i2c_bus->owner))
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{
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return MR_EBUSY;
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}
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/* If the owner changes, recheck the configuration */
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if (i2c_dev != i2c_bus->owner)
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{
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/* Reconfigure the bus */
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if (i2c_dev->config.baud_rate != i2c_bus->config.baud_rate
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|| i2c_dev->config.host_slave != i2c_bus->config.host_slave)
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{
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int addr = (i2c_dev->config.host_slave == MR_I2C_SLAVE) ? i2c_dev->addr : 0x00;
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int ret = ops->configure(i2c_bus, &i2c_dev->config, addr, i2c_dev->addr_bits);
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if (ret != MR_EOK)
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{
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return ret;
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}
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}
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i2c_bus->config = i2c_dev->config;
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i2c_bus->owner = i2c_dev;
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}
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i2c_bus->hold = MR_TRUE;
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return MR_EOK;
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}
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MR_INLINE int i2c_dev_release_bus(struct mr_i2c_dev *i2c_dev)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)i2c_dev->dev.parent;
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if (i2c_dev != i2c_bus->owner)
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{
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return MR_EINVAL;
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}
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/* If it is a host, release the bus. The slave needs to hold the bus at all times */
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if (i2c_dev->config.host_slave == MR_I2C_HOST)
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{
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i2c_bus->hold = MR_FALSE;
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}
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return MR_EOK;
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}
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#define MR_I2C_RD (0)
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#define MR_I2C_WR (1)
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MR_INLINE void i2c_dev_send_addr(struct mr_i2c_dev *i2c_dev, int rdwr)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)i2c_dev->dev.parent;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)i2c_bus->dev.drv->ops;
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int addr = 0, addr_bits = MR_I2C_ADDR_BITS_7;
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/* Get the address, otherwise use the 0x00 */
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if (i2c_dev != MR_NULL)
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{
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addr = i2c_dev->addr;
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addr_bits = i2c_dev->addr_bits;
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}
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/* Set the read command */
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if (rdwr == MR_I2C_RD)
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{
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addr |= 0x01;
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}
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ops->start(i2c_bus);
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ops->send_addr(i2c_bus, addr, addr_bits);
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}
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MR_INLINE void i2c_dev_send_stop(struct mr_i2c_dev *i2c_dev)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)i2c_dev->dev.parent;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)i2c_bus->dev.drv->ops;
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ops->stop(i2c_bus);
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}
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MR_INLINE ssize_t i2c_dev_read(struct mr_i2c_dev *i2c_dev, uint8_t *buf, size_t size)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)i2c_dev->dev.parent;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)i2c_bus->dev.drv->ops;
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uint8_t *rd_buf = (uint8_t *)buf;
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ssize_t rd_size;
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for (rd_size = 0; rd_size < size; rd_size += sizeof(*rd_buf))
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{
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*rd_buf = ops->read(i2c_bus, (size - rd_size) == sizeof(*rd_buf));
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rd_buf++;
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}
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return rd_size;
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}
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MR_INLINE ssize_t i2c_dev_write(struct mr_i2c_dev *i2c_dev, const uint8_t *buf, size_t size)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)i2c_dev->dev.parent;
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struct mr_i2c_bus_ops *ops = (struct mr_i2c_bus_ops *)i2c_bus->dev.drv->ops;
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uint8_t *wr_buf = (uint8_t *)buf;
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ssize_t wr_size;
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for (wr_size = 0; wr_size < size; wr_size += sizeof(*wr_buf))
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{
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ops->write(i2c_bus, *wr_buf);
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wr_buf++;
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}
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return wr_size;
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}
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static int mr_i2c_dev_open(struct mr_dev *dev)
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{
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struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)dev;
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return mr_ringbuf_allocate(&i2c_dev->rd_fifo, i2c_dev->rd_bufsz);
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}
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static int mr_i2c_dev_close(struct mr_dev *dev)
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{
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struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)dev;
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mr_ringbuf_free(&i2c_dev->rd_fifo);
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return MR_EOK;
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}
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static ssize_t mr_i2c_dev_read(struct mr_dev *dev, int off, void *buf, size_t size, int async)
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{
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struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)dev;
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ssize_t ret = i2c_dev_take_bus(i2c_dev);
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if (ret != MR_EOK)
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{
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return ret;
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}
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if (i2c_dev->config.host_slave == MR_I2C_HOST)
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{
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/* Send the address of the register that needs to be read */
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if (off >= 0)
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{
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i2c_dev_send_addr(i2c_dev, MR_I2C_WR);
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i2c_dev_write(i2c_dev, (uint8_t *)&off, (i2c_dev->config.reg_bits >> 3));
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}
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i2c_dev_send_addr(i2c_dev, MR_I2C_RD);
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ret = i2c_dev_read(i2c_dev, (uint8_t *)buf, size);
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i2c_dev_send_stop(i2c_dev);
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} else
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{
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if (mr_ringbuf_get_bufsz(&i2c_dev->rd_fifo) == 0)
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{
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ret = i2c_dev_read(i2c_dev, (uint8_t *)buf, size);
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} else
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{
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ret = (ssize_t)mr_ringbuf_read(&i2c_dev->rd_fifo, buf, size);
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}
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}
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i2c_dev_release_bus(i2c_dev);
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return ret;
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}
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static ssize_t mr_i2c_dev_write(struct mr_dev *dev, int off, const void *buf, size_t size, int async)
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{
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struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)dev;
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ssize_t ret = i2c_dev_take_bus(i2c_dev);
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if (ret != MR_EOK)
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{
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return ret;
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}
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if (i2c_dev->config.host_slave == MR_I2C_HOST)
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{
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i2c_dev_send_addr(i2c_dev, MR_I2C_WR);
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/* Send the address of the register that needs to be written */
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if (off >= 0)
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{
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i2c_dev_write(i2c_dev, (uint8_t *)&off, (i2c_dev->config.reg_bits >> 3));
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}
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ret = i2c_dev_write(i2c_dev, (uint8_t *)buf, size);
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i2c_dev_send_stop(i2c_dev);
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} else
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{
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ret = i2c_dev_write(i2c_dev, (uint8_t *)buf, size);
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}
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i2c_dev_release_bus(i2c_dev);
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return ret;
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}
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static int mr_i2c_dev_ioctl(struct mr_dev *dev, int off, int cmd, void *args)
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{
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struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)dev;
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switch (cmd)
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{
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case MR_CTL_I2C_SET_CONFIG:
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{
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if (args != MR_NULL)
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{
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struct mr_i2c_bus *i2c_bus = (struct mr_i2c_bus *)dev->parent;
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struct mr_i2c_config config = *(struct mr_i2c_config *)args;
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/* If holding the bus, release it */
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if (i2c_dev == i2c_bus->owner)
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{
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i2c_bus->hold = MR_FALSE;
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i2c_bus->owner = MR_NULL;
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}
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/* Update the configuration and try again to get the bus */
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i2c_dev->config = config;
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if (config.host_slave == MR_I2C_SLAVE)
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{
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int ret = i2c_dev_take_bus(i2c_dev);
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if (ret != MR_EOK)
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{
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return ret;
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}
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}
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return MR_EOK;
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}
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return MR_EINVAL;
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}
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case MR_CTL_I2C_SET_RD_BUFSZ:
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{
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if (args != MR_NULL)
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{
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size_t bufsz = *(size_t *)args;
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int ret = mr_ringbuf_allocate(&i2c_dev->rd_fifo, bufsz);
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i2c_dev->rd_bufsz = 0;
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if (ret == MR_EOK)
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{
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i2c_dev->rd_bufsz = bufsz;
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}
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return ret;
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}
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return MR_EINVAL;
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}
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case MR_CTL_I2C_CLR_RD_BUF:
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{
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mr_ringbuf_reset(&i2c_dev->rd_fifo);
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return MR_EOK;
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}
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case MR_CTL_I2C_GET_CONFIG:
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{
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if (args != MR_NULL)
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{
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struct mr_i2c_config *config = (struct mr_i2c_config *)args;
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*config = i2c_dev->config;
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return MR_EOK;
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}
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return MR_EINVAL;
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}
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case MR_CTL_I2C_GET_RD_BUFSZ:
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{
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if (args != MR_NULL)
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{
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*(size_t *)args = i2c_dev->rd_bufsz;
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return MR_EOK;
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}
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return MR_EINVAL;
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}
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case MR_CTL_I2C_GET_RD_DATASZ:
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{
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if (args != MR_NULL)
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{
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size_t *size = (size_t *)args;
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*size = mr_ringbuf_get_bufsz(&i2c_dev->rd_fifo);
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return MR_EOK;
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}
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}
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default:
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{
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return MR_ENOTSUP;
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}
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}
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}
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/**
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* @brief This function registers a i2c-device.
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*
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* @param i2c_dev The i2c-device.
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* @param name The name of the i2c-device.
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* @param addr The address of the i2c-device.
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* @param addr_bits The number of address bits of the i2c-device.
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*
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* @return MR_EOK on success, otherwise an error code.
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*/
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int mr_i2c_dev_register(struct mr_i2c_dev *i2c_dev, const char *name, int addr, int addr_bits)
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{
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static struct mr_dev_ops ops =
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{
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mr_i2c_dev_open,
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mr_i2c_dev_close,
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mr_i2c_dev_read,
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mr_i2c_dev_write,
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mr_i2c_dev_ioctl,
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MR_NULL
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};
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struct mr_i2c_config default_config = MR_I2C_CONFIG_DEFAULT;
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MR_ASSERT(i2c_dev != MR_NULL);
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MR_ASSERT(name != MR_NULL);
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MR_ASSERT((addr_bits == MR_I2C_ADDR_BITS_7) || (addr_bits == MR_I2C_ADDR_BITS_10));
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/* Initialize the fields */
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i2c_dev->config = default_config;
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mr_ringbuf_init(&i2c_dev->rd_fifo, MR_NULL, 0);
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#ifndef MR_CFG_I2C_RD_BUFSZ
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#define MR_CFG_I2C_RD_BUFSZ (0)
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#endif /* MR_CFG_I2C_RD_BUFSZ */
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i2c_dev->rd_bufsz = MR_CFG_I2C_RD_BUFSZ;
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i2c_dev->addr = (addr_bits == MR_I2C_ADDR_BITS_7) ? addr : ((0xf0 | ((addr >> 7) & 0x06)) << 8) | (addr & 0xff);
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i2c_dev->addr_bits = addr_bits;
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/* Register the i2c-device */
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return mr_dev_register(&i2c_dev->dev, name, Mr_Dev_Type_I2C, MR_SFLAG_RDWR | MR_SFLAG_NONDRV, &ops, MR_NULL);
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}
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#endif /* MR_USING_I2C */
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