340 lines
9.3 KiB
C
340 lines
9.3 KiB
C
/*
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* @copyright (c) 2023-2024, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-12-10 MacRsh First version
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*/
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#include "include/device/mr_pwm.h"
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#ifdef MR_USING_PWM
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static int pwm_channel_set_configure(struct mr_pwm *pwm, int channel, struct mr_pwm_config config)
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{
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struct mr_pwm_ops *ops = (struct mr_pwm_ops *)pwm->dev.drv->ops;
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/* Check channel is valid */
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if (channel < 0 || channel >= 32)
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{
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return MR_EINVAL;
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}
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/* Configure the channel */
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int ret = ops->channel_configure(pwm, channel, config.state, config.polarity);
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if (ret < 0)
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{
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return ret;
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}
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/* Enable or disable the channel */
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if (config.state == MR_ENABLE)
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{
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MR_BIT_SET(pwm->channel, (1 << channel));
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/* Configure the polarity */
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if (config.polarity == MR_PWM_POLARITY_NORMAL)
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{
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MR_BIT_CLR(pwm->channel_polarity, (1 << channel));
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} else
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{
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MR_BIT_SET(pwm->channel_polarity, (1 << channel));
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}
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} else
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{
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MR_BIT_CLR(pwm->channel, (1 << channel));
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MR_BIT_CLR(pwm->channel_polarity, (1 << channel));
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}
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return MR_EOK;
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}
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static int pwm_channel_get_configure(struct mr_pwm *pwm, int channel, struct mr_pwm_config *config)
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{
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/* Check channel is valid */
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if (channel < 0 || channel >= 32)
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{
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return MR_EINVAL;
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}
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/* Get configure */
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config->state = MR_BIT_IS_SET(pwm->channel, (1 << channel));
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config->polarity = MR_BIT_IS_SET(pwm->channel_polarity, (1 << channel));
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return MR_EOK;
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}
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static int pwm_calculate(struct mr_pwm *pwm, uint32_t freq)
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{
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uint32_t clk = pwm->info->clk, psc_max = pwm->info->prescaler_max, per_max = pwm->info->period_max;
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uint32_t psc_best = 1, per_best = 1;
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int error_min = INT32_MAX;
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/* Check the clock and frequency */
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if (clk == 0 || freq == 0)
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{
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return MR_EINVAL;
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}
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/* Calculate the prescaler and period product */
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uint32_t product = clk / freq;
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/* If the product is within the maximum period, set it as the period */
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if (product <= per_max)
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{
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psc_best = 1;
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per_best = product;
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} else
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{
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/* Calculate the Least error prescaler and period */
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for (uint32_t psc = MR_BOUND(product / per_max, 1, psc_max); psc < psc_max; psc++)
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{
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uint32_t per = MR_BOUND(product / psc, 1, per_max);
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/* Calculate the frequency error */
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int error = (int)freq - (int)(clk / psc / per);
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/* Found a potentially optimal prescaler and period combination */
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if (error == 0)
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{
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psc_best = psc;
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per_best = per;
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/* Found a valid and optimal solution */
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if (per_best < per_max)
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{
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break;
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}
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} else if (error < error_min)
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{
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error_min = error;
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psc_best = psc;
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per_best = per;
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}
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}
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}
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/* Check period is valid */
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if (per_best > per_max)
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{
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return MR_EINVAL;
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}
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pwm->prescaler = psc_best;
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pwm->period = per_best;
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pwm->freq = clk / psc_best / per_best;
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return MR_EOK;
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}
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static int mr_pwm_open(struct mr_dev *dev)
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{
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struct mr_pwm *pwm = (struct mr_pwm *)dev;
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struct mr_pwm_ops *ops = (struct mr_pwm_ops *)dev->drv->ops;
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return ops->configure(pwm, MR_ENABLE);
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}
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static int mr_pwm_close(struct mr_dev *dev)
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{
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struct mr_pwm *pwm = (struct mr_pwm *)dev;
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struct mr_pwm_ops *ops = (struct mr_pwm_ops *)dev->drv->ops;
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#ifdef MR_USING_PWM_AUTO_DISABLE
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/* Disable all channels */
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for (size_t i = 0; i < 32; i++)
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{
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if (MR_BIT_IS_SET(pwm->channel, (1 << i)) == MR_ENABLE)
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{
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ops->channel_configure(pwm, (int)i, MR_DISABLE, MR_PWM_POLARITY_NORMAL);
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MR_BIT_CLR(pwm->channel, (1 << i));
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}
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}
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#endif /* MR_USING_PWM_AUTO_DISABLE */
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return ops->configure(pwm, MR_DISABLE);
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}
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static ssize_t mr_pwm_read(struct mr_dev *dev, int off, void *buf, size_t size, int async)
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{
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struct mr_pwm *pwm = (struct mr_pwm *)dev;
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struct mr_pwm_ops *ops = (struct mr_pwm_ops *)dev->drv->ops;
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uint32_t *rd_buf = (uint32_t *)buf;
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ssize_t rd_size;
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#ifdef MR_USING_PWM_CHANNEL_CHECK
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/* Check if the channel is enabled */
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if (MR_BIT_IS_SET(pwm->channel, (1 << off)) == MR_DISABLE)
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{
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return MR_EINVAL;
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}
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#endif /* MR_USING_PWM_CHANNEL_CHECK */
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MR_BIT_CLR(size, sizeof(*rd_buf) - 1);
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for (rd_size = 0; rd_size < size; rd_size += sizeof(*rd_buf))
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{
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/* Calculate the duty */
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uint32_t compare_value = ops->read(pwm, off);
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*rd_buf = (uint32_t)(((float)compare_value / (float)pwm->period) * 1000000.0f);
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rd_buf++;
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}
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return rd_size;
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}
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static ssize_t mr_pwm_write(struct mr_dev *dev, int off, const void *buf, size_t size, int async)
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{
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struct mr_pwm *pwm = (struct mr_pwm *)dev;
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struct mr_pwm_ops *ops = (struct mr_pwm_ops *)dev->drv->ops;
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uint32_t *wr_buf = (uint32_t *)buf;
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ssize_t wr_size;
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#ifdef MR_USING_PWM_CHANNEL_CHECK
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/* Check if the channel is enabled */
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if (MR_BIT_IS_SET(pwm->channel, (1 << off)) == MR_DISABLE)
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{
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return MR_EINVAL;
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}
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#endif /* MR_USING_PWM_CHANNEL_CHECK */
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MR_BIT_CLR(size, sizeof(*wr_buf) - 1);
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for (wr_size = 0; wr_size < size; wr_size += sizeof(*wr_buf))
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{
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/* Calculate the compare value */
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uint32_t compare_value = MR_BOUND((uint32_t)(((float)*wr_buf / 1000000.0f) * (float)(pwm->period)),
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0,
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pwm->period);
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ops->write(pwm, off, compare_value);
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wr_buf++;
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}
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return wr_size;
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}
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static int mr_pwm_ioctl(struct mr_dev *dev, int off, int cmd, void *args)
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{
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struct mr_pwm *pwm = (struct mr_pwm *)dev;
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struct mr_pwm_ops *ops = (struct mr_pwm_ops *)dev->drv->ops;
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switch (cmd)
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{
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case MR_CTL_PWM_SET_CHANNEL_CONFIG:
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{
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if (args != MR_NULL)
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{
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struct mr_pwm_config config = *((struct mr_pwm_config *)args);
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int ret = pwm_channel_set_configure(pwm, off, config);
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if (ret < 0)
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{
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return ret;
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}
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return sizeof(config);
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}
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return MR_EINVAL;
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}
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case MR_CTL_PWM_SET_FREQ:
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{
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if (args != MR_NULL)
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{
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uint32_t freq = *((uint32_t *)args);
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uint32_t old_period = pwm->period;
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/* Calculate prescaler and period */
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int ret = pwm_calculate(pwm, freq);
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if (ret < 0)
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{
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return ret;
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}
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/* Start pwm */
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ops->start(pwm, pwm->prescaler, pwm->period);
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/* Refresh all channels compare value */
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for (size_t i = 0; i < 32; i++)
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{
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if (MR_BIT_IS_SET(pwm->channel, (1 << i)) == MR_ENABLE)
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{
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/* Get old duty */
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uint32_t compare_value = ops->read(pwm, (int)i);
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/* Calculate new compare value */
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compare_value = (uint32_t)(((float)compare_value / (float)old_period) * (float)(pwm->period));
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ops->write(pwm, (int)i, compare_value);
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}
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}
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return sizeof(freq);
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}
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return MR_EINVAL;
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}
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case MR_CTL_PWM_GET_CHANNEL_CONFIG:
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{
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if (args != MR_NULL)
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{
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struct mr_pwm_config *config = ((struct mr_pwm_config *)args);
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int ret = pwm_channel_get_configure(pwm, off, config);
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if (ret < 0)
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{
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return ret;
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}
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return sizeof(*config);
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}
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return MR_EINVAL;
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}
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case MR_CTL_PWM_GET_FREQ:
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{
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if (args != MR_NULL)
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{
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uint32_t *freq = (uint32_t *)args;
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*freq = pwm->freq;
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return sizeof(*freq);
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}
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return MR_EINVAL;
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}
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default:
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{
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return MR_ENOTSUP;
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}
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}
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}
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/**
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* @brief This function registers a pwm.
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*
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* @param pwm The pwm.
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* @param name The name of the pwm.
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* @param drv The driver of the pwm.
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* @param info The information of the pwm.
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*
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* @return MR_EOK on success, otherwise an error code.
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*/
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int mr_pwm_register(struct mr_pwm *pwm, const char *name, struct mr_drv *drv, struct mr_pwm_info *info)
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{
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static struct mr_dev_ops ops =
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{
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mr_pwm_open,
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mr_pwm_close,
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mr_pwm_read,
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mr_pwm_write,
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mr_pwm_ioctl,
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MR_NULL
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};
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MR_ASSERT(pwm != MR_NULL);
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MR_ASSERT(name != MR_NULL);
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MR_ASSERT(drv != MR_NULL);
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MR_ASSERT(drv->ops != MR_NULL);
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MR_ASSERT(info != MR_NULL);
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/* Initialize the fields */
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pwm->freq = 0;
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pwm->prescaler = 0;
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pwm->period = 1;
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pwm->channel = 0;
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pwm->channel_polarity = 0;
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pwm->info = info;
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/* Register the pwm */
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return mr_dev_register(&pwm->dev, name, Mr_Dev_Type_PWM, MR_SFLAG_RDWR, &ops, drv);
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}
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#endif /* MR_USING_PWM */
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