179 lines
3.7 KiB
C
179 lines
3.7 KiB
C
/*
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* Copyright (c) 2023, mr-library Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-04-23 MacRsh first version
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*/
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#ifndef _SPI_H_
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#define _SPI_H_
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#include "mrapi.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if (MR_CFG_SPI == MR_CFG_ENABLE)
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/**
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* @def SPI device host/slave
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*/
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#define MR_SPI_HOST 0
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#define MR_SPI_SLAVE 1
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/**
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* @def SPI device mode
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*/
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#define MR_SPI_MODE_0 0
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#define MR_SPI_MODE_1 1
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#define MR_SPI_MODE_2 2
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#define MR_SPI_MODE_3 3
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/**
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* @def SPI device data bits
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*/
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#define MR_SPI_DATA_BITS_8 8
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#define MR_SPI_DATA_BITS_16 16
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#define MR_SPI_DATA_BITS_32 32
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/**
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* @def SPI device bit order
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*/
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#define MR_SPI_BIT_ORDER_MSB 0
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#define MR_SPI_BIT_ORDER_LSB 1
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/**
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* @def SPI device CS active
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*/
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#define MR_SPI_CS_ACTIVE_LOW 0
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#define MR_SPI_CS_ACTIVE_HIGH 1
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#define MR_SPI_CS_ACTIVE_HARDWARE 2
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/**
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* @def SPI device position bits
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*/
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#define MR_SPI_POS_BITS_8 8
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#define MR_SPI_POS_BITS_16 16
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#define MR_SPI_POS_BITS_32 32
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/**
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* @def SPI device control transfer flag
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*/
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#define MR_DEVICE_CTRL_SPI_TRANSFER 0x01000000
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/**
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* @def SPI device interrupt event
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*/
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#define MR_SPI_BUS_EVENT_RX_INT 0x10000000
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#define MR_SPI_BUS_EVENT_MASK 0xf0000000
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/**
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* @def SPI device default config
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*/
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#define MR_SPI_CONFIG_DEFAULT \
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{ \
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3000000, \
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MR_SPI_HOST, \
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MR_SPI_MODE_0, \
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MR_SPI_DATA_BITS_8, \
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MR_SPI_BIT_ORDER_MSB, \
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MR_SPI_CS_ACTIVE_LOW, \
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MR_SPI_POS_BITS_8, \
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}
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/**
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* @def SPI device config
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*/
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struct mr_spi_config
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{
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mr_uint32_t baud_rate;
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mr_uint32_t host_slave: 1;
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mr_uint32_t mode: 2;
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mr_uint32_t data_bits: 6;
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mr_uint32_t bit_order: 1;
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mr_uint32_t cs_active: 2;
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mr_uint32_t pos_bits: 6;
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mr_uint32_t reserved: 14;
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};
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typedef struct mr_spi_config *mr_spi_config_t;
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/**
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* @def SPI device transfer
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*/
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struct mr_spi_transfer
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{
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void *write_buffer;
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void *read_buffer;
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mr_size_t size;
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};
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typedef struct mr_spi_bus *mr_spi_bus_t;
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/**
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* @struct SPI device
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*/
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struct mr_spi_device
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{
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struct mr_device device;
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struct mr_spi_config config;
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struct mr_rb rx_fifo;
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struct mr_rb tx_fifo;
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mr_off_t cs_number;
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mr_spi_bus_t bus;
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};
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typedef struct mr_spi_device *mr_spi_device_t;
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/**
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* @struct SPI bus operations
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*/
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struct mr_spi_bus_ops
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{
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mr_err_t (*configure)(mr_spi_bus_t spi_bus, mr_spi_config_t config);
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void (*write)(mr_spi_bus_t spi_bus, mr_uint32_t data);
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mr_uint32_t (*read)(mr_spi_bus_t spi_bus);
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void (*cs_write)(mr_spi_bus_t spi_bus, mr_off_t cs_number, mr_level_t level);
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mr_level_t (*cs_read)(mr_spi_bus_t spi_bus, mr_off_t cs_number);
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};
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/**
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* @struct SPI bus
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*/
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struct mr_spi_bus
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{
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struct mr_device device;
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struct mr_spi_config config;
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struct mr_mutex lock;
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mr_spi_device_t owner;
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const struct mr_spi_bus_ops *ops;
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};
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/**
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* @addtogroup SPI device
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* @{
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*/
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mr_err_t mr_spi_device_add(mr_spi_device_t spi_device, const char *name, mr_off_t cs_number);
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/** @} */
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/**
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* @addtogroup SPI bus
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* @{
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*/
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mr_err_t mr_spi_bus_add(mr_spi_bus_t spi_bus, const char *name, struct mr_spi_bus_ops *ops, void *data);
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void mr_spi_bus_isr(mr_spi_bus_t spi_bus, mr_uint32_t event);
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/** @} */
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SPI_H_ */ |