472 lines
15 KiB
C
472 lines
15 KiB
C
/*
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* @copyright (c) 2023-2024, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-10-20 MacRsh First version
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*/
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#include "include/device/mr_serial.h"
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#ifdef MR_USING_SERIAL
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MR_INLINE ssize_t serial_poll_read(struct mr_serial *serial, uint8_t *buf, size_t count)
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{
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struct mr_serial_ops *ops = (struct mr_serial_ops *)serial->dev.drv->ops;
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ssize_t size;
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for (size = 0; size < count; size += sizeof(*buf)) {
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int ret = ops->read(serial, buf);
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if (ret < 0) {
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return (size == 0) ? ret : size;
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}
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buf++;
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}
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return size;
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}
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MR_INLINE ssize_t serial_poll_write(struct mr_serial *serial, uint8_t *buf, size_t count)
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{
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struct mr_serial_ops *ops = (struct mr_serial_ops *)serial->dev.drv->ops;
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ssize_t size;
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for (size = 0; size < count; size += sizeof(*buf)) {
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int ret = ops->write(serial, *buf);
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if (ret < 0) {
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return (size == 0) ? ret : size;
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}
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buf++;
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}
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return size;
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}
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#ifdef MR_USING_SERIAL_DMA
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MR_INLINE ssize_t serial_dma_write(struct mr_serial *serial, uint8_t *buf, size_t count)
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{
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struct mr_serial_ops *ops = (struct mr_serial_ops *)serial->dev.drv->ops;
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if (serial->dma_wr_bufsz == 0) {
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if (serial->nonblock_state == MR_DISABLE) {
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ops->start_dma_tx(serial, buf, count);
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return (ssize_t)count;
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} else {
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return MR_EBUSY;
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}
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} else {
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if (serial->nonblock_state == MR_DISABLE) {
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if (count > serial->dma_wr_bufsz) {
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memcpy(serial->dma_wr_buf, buf, serial->dma_wr_bufsz);
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ops->start_dma_tx(serial, serial->dma_wr_buf, serial->dma_wr_bufsz);
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return (ssize_t)(serial->dma_wr_bufsz +
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mr_ringbuf_write(&serial->wr_fifo,
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buf + serial->dma_wr_bufsz,
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count - serial->dma_wr_bufsz));
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} else {
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memcpy(serial->dma_wr_buf, buf, count);
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ops->start_dma_tx(serial, serial->dma_wr_buf, count);
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return (ssize_t)count;
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}
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} else {
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return (ssize_t)mr_ringbuf_write(&serial->wr_fifo, buf, count);
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}
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}
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}
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#endif /* MR_USING_SERIAL_DMA */
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MR_INLINE ssize_t serial_nonblocking_write(struct mr_serial *serial, uint8_t *buf, size_t count)
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{
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struct mr_serial_ops *ops = (struct mr_serial_ops *)serial->dev.drv->ops;
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ssize_t size;
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#ifdef MR_USING_SERIAL_DMA
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/* DMA sending */
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if ((ops->start_dma_tx != MR_NULL) && (ops->stop_dma_tx != MR_NULL)) {
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return serial_dma_write(serial, buf, count);
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}
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#endif /* MR_USING_SERIAL_DMA */
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/* Interrupt sending */
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size = (ssize_t)mr_ringbuf_write(&serial->wr_fifo, buf, count);
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if ((size > 0) && (serial->nonblock_state == MR_DISABLE)) {
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ops->start_tx(serial);
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}
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return size;
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}
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static int mr_serial_open(struct mr_dev *dev)
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{
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struct mr_serial *serial = (struct mr_serial *)dev;
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struct mr_serial_ops *ops = (struct mr_serial_ops *)dev->drv->ops;
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int ret = mr_ringbuf_allocate(&serial->rd_fifo, serial->rd_bufsz);
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if (ret < 0) {
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return ret;
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}
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ret = mr_ringbuf_allocate(&serial->wr_fifo, serial->wr_bufsz);
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if (ret < 0) {
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return ret;
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}
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#ifdef MR_USING_SERIAL_DMA
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serial->dma_rd_buf = (uint8_t *)mr_malloc(serial->dma_rd_bufsz);
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if ((serial->dma_rd_buf == MR_NULL) && (serial->dma_rd_bufsz != 0)) {
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return MR_ENOMEM;
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}
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serial->dma_wr_buf = (uint8_t *)mr_malloc(serial->dma_wr_bufsz);
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if ((serial->dma_wr_buf == MR_NULL) && (serial->dma_wr_bufsz != 0)) {
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return MR_ENOMEM;
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}
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/* Configure DMA */
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if ((ops->start_dma_rx != MR_NULL) && (serial->dma_rd_bufsz != 0)) {
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ops->start_dma_rx(serial, serial->dma_rd_buf, serial->dma_rd_bufsz);
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}
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#endif /* MR_USING_SERIAL_DMA */
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return ops->configure(serial, &serial->config);
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}
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static int mr_serial_close(struct mr_dev *dev)
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{
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struct mr_serial *serial = (struct mr_serial *)dev;
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struct mr_serial_ops *ops = (struct mr_serial_ops *)dev->drv->ops;
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struct mr_serial_config close_config = {0};
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mr_ringbuf_free(&serial->rd_fifo);
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mr_ringbuf_free(&serial->wr_fifo);
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#ifdef MR_USING_SERIAL_DMA
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mr_free(serial->dma_rd_buf);
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mr_free(serial->dma_wr_buf);
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#endif /* MR_USING_SERIAL_DMA */
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return ops->configure(serial, &close_config);
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}
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static ssize_t mr_serial_read(struct mr_dev *dev, void *buf, size_t count)
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{
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struct mr_serial *serial = (struct mr_serial *)dev;
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uint8_t *rd_buf = (uint8_t *)buf;
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ssize_t rd_size;
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if (mr_ringbuf_get_bufsz(&serial->rd_fifo) == 0) {
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rd_size = serial_poll_read(serial, rd_buf, count);
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} else {
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rd_size = (ssize_t)mr_ringbuf_read(&serial->rd_fifo, buf, count);
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}
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return rd_size;
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}
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static ssize_t mr_serial_write(struct mr_dev *dev, const void *buf, size_t count)
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{
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struct mr_serial *serial = (struct mr_serial *)dev;
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uint8_t *wr_buf = (uint8_t *)buf;
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ssize_t wr_size;
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if (dev->sync == MR_SYNC) {
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wr_size = serial_poll_write(serial, wr_buf, count);
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} else {
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wr_size = serial_nonblocking_write(serial, wr_buf, count);
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}
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return wr_size;
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}
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static int mr_serial_ioctl(struct mr_dev *dev, int cmd, void *args)
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{
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struct mr_serial *serial = (struct mr_serial *)dev;
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struct mr_serial_ops *ops = (struct mr_serial_ops *)dev->drv->ops;
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switch (cmd) {
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case MR_IOC_SERIAL_SET_CONFIG: {
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if (args != MR_NULL) {
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struct mr_serial_config config = *(struct mr_serial_config *)args;
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int ret = ops->configure(serial, &config);
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if (ret < 0) {
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return ret;
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}
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serial->config = config;
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return sizeof(config);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_SET_RD_BUFSZ: {
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if (args != MR_NULL) {
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size_t bufsz = *(size_t *)args;
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int ret = mr_ringbuf_allocate(&serial->rd_fifo, bufsz);
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serial->rd_bufsz = 0;
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if (ret < 0) {
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return ret;
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}
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serial->rd_bufsz = bufsz;
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return sizeof(bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_SET_WR_BUFSZ: {
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if (args != MR_NULL) {
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size_t bufsz = *(size_t *)args;
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int ret = mr_ringbuf_allocate(&serial->wr_fifo, bufsz);
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serial->wr_bufsz = 0;
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if (ret < 0) {
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return ret;
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}
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serial->wr_bufsz = bufsz;
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return sizeof(bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_CLR_RD_BUF: {
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mr_ringbuf_reset(&serial->rd_fifo);
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return MR_EOK;
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}
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case MR_IOC_SERIAL_CLR_WR_BUF: {
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mr_ringbuf_reset(&serial->wr_fifo);
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return MR_EOK;
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}
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case MR_IOC_SERIAL_GET_CONFIG: {
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if (args != MR_NULL) {
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struct mr_serial_config *config = (struct mr_serial_config *)args;
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*config = serial->config;
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return sizeof(*config);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_GET_RD_BUFSZ: {
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if (args != MR_NULL) {
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size_t *bufsz = (size_t *)args;
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*bufsz = serial->rd_bufsz;
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return sizeof(*bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_GET_WR_BUFSZ: {
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if (args != MR_NULL) {
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size_t *bufsz = (size_t *)args;
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*bufsz = serial->wr_bufsz;
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return sizeof(*bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_GET_RD_DATASZ: {
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if (args != MR_NULL) {
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size_t *datasz = (size_t *)args;
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*datasz = mr_ringbuf_get_data_size(&serial->rd_fifo);
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return sizeof(*datasz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_GET_WR_DATASZ: {
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if (args != MR_NULL) {
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size_t *datasz = (size_t *)args;
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*datasz = mr_ringbuf_get_data_size(&serial->wr_fifo);
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return sizeof(*datasz);
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}
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return MR_EINVAL;
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}
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#ifdef MR_USING_SERIAL_DMA
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case MR_IOC_SERIAL_SET_RD_DMA_BUFSZ: {
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if (args != MR_NULL) {
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size_t bufsz = *(size_t *)args;
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if (ops->stop_dma_rx == MR_NULL) {
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return MR_EIO;
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}
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ops->stop_dma_rx(serial);
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uint8_t *pool = mr_realloc(serial->dma_rd_buf, bufsz);
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if ((pool == MR_NULL) && (bufsz != 0)) {
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return MR_ENOMEM;
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}
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serial->dma_rd_buf = pool;
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serial->dma_rd_bufsz = bufsz;
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if ((ops->start_dma_rx != MR_NULL) && (serial->dma_rd_bufsz != 0)) {
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ops->start_dma_rx(serial, serial->dma_rd_buf, serial->dma_rd_bufsz);
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}
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return sizeof(bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_SET_WR_DMA_BUFSZ: {
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if (args != MR_NULL) {
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size_t bufsz = *(size_t *)args;
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if (serial->nonblock_state != MR_DISABLE) {
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return MR_EBUSY;
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}
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uint8_t *pool = mr_realloc(serial->dma_wr_buf, bufsz);
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if ((pool == MR_NULL) && (bufsz != 0)) {
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return MR_ENOMEM;
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}
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serial->dma_wr_buf = pool;
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serial->dma_wr_bufsz = bufsz;
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return sizeof(bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_GET_RD_DMA_BUFSZ: {
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if (args != MR_NULL) {
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size_t *bufsz = (size_t *)args;
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*bufsz = serial->dma_rd_bufsz;
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return sizeof(*bufsz);
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}
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return MR_EINVAL;
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}
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case MR_IOC_SERIAL_GET_WR_DMA_BUFSZ: {
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if (args != MR_NULL) {
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size_t *bufsz = (size_t *)args;
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*bufsz = serial->dma_wr_bufsz;
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return sizeof(*bufsz);
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}
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return MR_EINVAL;
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}
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#endif /* MR_USING_SERIAL_DMA */
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default: {
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return MR_ENOTSUP;
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}
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}
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}
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static ssize_t mr_serial_isr(struct mr_dev *dev, int event, void *args)
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{
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struct mr_serial *serial = (struct mr_serial *)dev;
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struct mr_serial_ops *ops = (struct mr_serial_ops *)dev->drv->ops;
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switch (event) {
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case MR_ISR_SERIAL_RD_INT: {
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uint8_t data;
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/* Read data to FIFO */
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int ret = ops->read(serial, &data);
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if (ret < 0) {
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return ret;
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}
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mr_ringbuf_push_force(&serial->rd_fifo, data);
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return MR_EOK;
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}
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case MR_ISR_SERIAL_WR_INT: {
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uint8_t data;
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/* Write data from FIFO, if FIFO is empty, stop transmit */
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if (mr_ringbuf_pop(&serial->wr_fifo, &data) == sizeof(data)) {
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ops->write(serial, data);
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return MR_EBUSY;
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} else {
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serial->nonblock_state = MR_DISABLE;
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ops->stop_tx(serial);
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return MR_EOK;
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}
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}
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#ifdef MR_USING_SERIAL_DMA
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case MR_ISR_SERIAL_RD_DMA: {
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if (args != MR_NULL) {
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size_t dma_rx_datasz = *(size_t *)args;
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mr_ringbuf_write_force(&serial->rd_fifo,
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serial->dma_rd_buf,
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MR_BOUND(dma_rx_datasz, 0, serial->dma_rd_bufsz));
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if (ops->start_dma_rx != MR_NULL) {
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ops->start_dma_rx(serial, serial->dma_rd_buf, serial->dma_rd_bufsz);
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}
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return MR_EOK;
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}
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return MR_EINVAL;
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}
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case MR_ISR_SERIAL_WR_DMA: {
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if (serial->dma_wr_bufsz == 0) {
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serial->nonblock_state = MR_DISABLE;
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ops->stop_dma_tx(serial);
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return MR_EOK;
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} else {
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size_t size = mr_ringbuf_read(&serial->wr_fifo,
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serial->dma_wr_buf,
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serial->dma_wr_bufsz);
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if (size != 0) {
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ops->start_dma_tx(serial, serial->dma_wr_buf, size);
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return MR_EBUSY;
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} else {
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serial->nonblock_state = MR_DISABLE;
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ops->stop_dma_tx(serial);
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return MR_EOK;
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}
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}
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}
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#endif /* MR_USING_SERIAL_DMA */
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default: {
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return MR_ENOTSUP;
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}
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}
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}
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/**
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* @brief This function register a serial.
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*
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* @param serial The serial.
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* @param path The path of the serial.
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* @param drv The driver of the serial.
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*
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* @return 0 on success, otherwise an error code.
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*/
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int mr_serial_register(struct mr_serial *serial, const char *path, struct mr_drv *drv)
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{
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static struct mr_dev_ops ops = {mr_serial_open,
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mr_serial_close,
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mr_serial_read,
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mr_serial_write,
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mr_serial_ioctl,
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mr_serial_isr};
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struct mr_serial_config default_config = MR_SERIAL_CONFIG_DEFAULT;
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MR_ASSERT(serial != MR_NULL);
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MR_ASSERT(path != MR_NULL);
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MR_ASSERT(drv != MR_NULL);
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MR_ASSERT(drv->ops != MR_NULL);
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/* Initialize the fields */
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serial->config = default_config;
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mr_ringbuf_init(&serial->rd_fifo, MR_NULL, 0);
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mr_ringbuf_init(&serial->wr_fifo, MR_NULL, 0);
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#ifndef MR_CFG_SERIAL_RD_BUFSZ
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#define MR_CFG_SERIAL_RD_BUFSZ (0)
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#endif /* MR_CFG_SERIAL_RD_BUFSZ */
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#ifndef MR_CFG_SERIAL_WR_BUFSZ
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#define MR_CFG_SERIAL_WR_BUFSZ (0)
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#endif /* MR_CFG_SERIAL_WR_BUFSZ */
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serial->rd_bufsz = MR_CFG_SERIAL_RD_BUFSZ;
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serial->wr_bufsz = MR_CFG_SERIAL_WR_BUFSZ;
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#ifdef MR_USING_SERIAL_DMA
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serial->dma_rd_buf = MR_NULL;
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serial->dma_wr_buf = MR_NULL;
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#ifndef MR_CFG_SERIAL_RD_DMA_BUFSZ
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#define MR_CFG_SERIAL_RD_DMA_BUFSZ (0)
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#endif /* MR_CFG_SERIAL_RD_DMA_BUFSZ */
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#ifndef MR_CFG_SERIAL_WR_DMA_BUFSZ
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#define MR_CFG_SERIAL_WR_DMA_BUFSZ (0)
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#endif /* MR_CFG_SERIAL_WR_DMA_BUFSZ */
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serial->dma_rd_bufsz = MR_CFG_SERIAL_RD_DMA_BUFSZ;
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serial->dma_wr_bufsz = MR_CFG_SERIAL_WR_DMA_BUFSZ;
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#endif /* MR_USING_SERIAL_DMA */
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serial->nonblock_state = MR_DISABLE;
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/* Register the serial */
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return mr_dev_register(&serial->dev,
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path,
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MR_DEV_TYPE_SERIAL,
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MR_O_RDWR | MR_O_NONBLOCK,
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&ops,
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drv);
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}
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#endif /* MR_USING_SERIAL */
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