1.路径优化。

bsp/wch/ch32v20x/driver/drv_adc.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_ADC_H_
 #define _DRV_ADC_H_
 
-#include "device/adc.h"
+#include "include/device/adc.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v20x/driver/drv_i2c.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_I2C_H_
 #define _DRV_I2C_H_
 
-#include "device/i2c.h"
+#include "include/device/i2c.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/wch/ch32v20x/driver/drv_pin.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_PIN_H_
 #define _DRV_PIN_H_
 
-#include "device/pin.h"
+#include "include/device/pin.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v20x/driver/drv_serial.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_SERIAL_H_
 #define _DRV_SERIAL_H_
 
-#include "device/serial.h"
+#include "include/device/serial.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v20x/driver/drv_spi.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_SPI_H_
 #define _DRV_SPI_H_
 
-#include "device/spi.h"
+#include "include/device/spi.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/wch/ch32v20x/driver/mr_drv.h

@@ -1,46 +0,0 @@
-/*
- * @copyright (c) 2023, MR Development Team
- *
- * @license SPDX-License-Identifier: Apache-2.0
- *
- * @date 2023-11-11    MacRsh       First version
- */
-
-#ifndef _MR_DRV_H_
-#define _MR_DRV_H_
-
-#include "mr_config.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-#ifdef MR_USING_ADC
-#include "drv_adc.h"
-#endif
-
-#ifdef MR_USING_CAN
-#include "drv_can.h"
-#endif
-
-#ifdef MR_USING_I2C
-#include "drv_i2c.h"
-#endif
-
-#ifdef MR_USING_PIN
-#include "drv_pin.h"
-#endif
-
-#ifdef MR_USING_SERIAL
-#include "drv_serial.h"
-#endif
-
-#ifdef MR_USING_SPI
-#include "drv_spi.h"
-#endif
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* _MR_DRV_H_ */

bsp/wch/ch32v30x/driver/Kconfig

@@ -225,4 +225,46 @@ menu "Board configure"
 
     endmenu
 
+    menu "Timer"
+        config MR_USING_TIMER1
+                    bool "Enable Timer1 driver"
+                    default n
+
+        config MR_USING_TIMER2
+                        bool "Enable Timer2 driver"
+                        default n
+
+        config MR_USING_TIMER3
+                    bool "Enable Timer3 driver"
+                    default n
+
+        config MR_USING_TIMER4
+                    bool "Enable Timer4 driver"
+                    default n
+
+        config MR_USING_TIMER5
+                    bool "Enable Timer5 driver"
+                    default n
+
+        config MR_USING_TIMER6
+                    bool "Enable Timer6 driver"
+                    default n
+
+        config MR_USING_TIMER7
+                    bool "Enable Timer7 driver"
+                    default n
+
+        config MR_USING_TIMER8
+                    bool "Enable Timer8 driver"
+                    default n
+
+        config MR_USING_TIMER9
+                    bool "Enable Timer9 driver"
+                    default n
+
+        config MR_USING_TIMER10
+                    bool "Enable Timer10 driver"
+                    default n
+    endmenu
+
 endmenu

bsp/wch/ch32v30x/driver/drv_adc.c

@@ -162,7 +162,7 @@ static struct mr_adc_ops adc_drv_ops =
         drv_adc_read
     };
 
-static struct mr_drv adc_drv[mr_array_num(adc_drv_data)] =
+static struct mr_drv adc_drv[] =
     {
 #ifdef MR_USING_ADC1
         {

bsp/wch/ch32v30x/driver/drv_adc.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_ADC_H_
 #define _DRV_ADC_H_
 
-#include "device/adc.h"
+#include "include/device/adc.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v30x/driver/drv_dac.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_DAC_H_
 #define _DRV_DAC_H_
 
-#include "device/dac.h"
+#include "include/device/dac.h"
 #include "mr_board.h"
 
 #ifdef MR_USING_DAC

bsp/wch/ch32v30x/driver/drv_i2c.c

@@ -242,8 +242,6 @@ static ssize_t drv_i2c_bus_read(struct mr_i2c_bus *i2c_bus, uint8_t *buf, size_t
 
         /* Read data */
         while (I2C_CheckEvent(i2c_bus_data->instance, I2C_EVENT_MASTER_BYTE_RECEIVED) == RESET)
-        {
-        }
         {
             i++;
             if (i > UINT16_MAX)
@@ -316,7 +314,7 @@ static struct mr_i2c_bus_ops i2c_bus_drv_ops =
         drv_i2c_bus_write,
     };
 
-static struct mr_drv i2c_bus_drv[mr_array_num(i2c_bus_drv_data)] =
+static struct mr_drv i2c_bus_drv[] =
     {
 #ifdef MR_USING_I2C1
         {

bsp/wch/ch32v30x/driver/drv_i2c.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_I2C_H_
 #define _DRV_I2C_H_
 
-#include "device/i2c.h"
+#include "include/device/i2c.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v30x/driver/drv_pin.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_PIN_H_
 #define _DRV_PIN_H_
 
-#include "device/pin.h"
+#include "include/device/pin.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v30x/driver/drv_serial.c

@@ -608,7 +608,6 @@ static ssize_t drv_serial_write(struct mr_serial *serial, const uint8_t *buf, si
         int i = 0;
 
         /* Write data */
-        USART_SendData(serial_data->instance, buf[wr_size]);
         while (USART_GetFlagStatus(serial_data->instance, USART_FLAG_TC) == RESET)
         {
             i++;
@@ -617,6 +616,7 @@ static ssize_t drv_serial_write(struct mr_serial *serial, const uint8_t *buf, si
                 return wr_size;
             }
         }
+        USART_SendData(serial_data->instance, buf[wr_size]);
     }
     return wr_size;
 }
@@ -727,7 +727,7 @@ static struct mr_serial_ops serial_drv_ops =
         drv_serial_stop_tx
     };
 
-static struct mr_drv serial_drv[mr_array_num(serial_drv_data)] =
+static struct mr_drv serial_drv[] =
     {
 #ifdef MR_USING_UART1
         {

bsp/wch/ch32v30x/driver/drv_serial.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_SERIAL_H_
 #define _DRV_SERIAL_H_
 
-#include "device/serial.h"
+#include "include/device/serial.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v30x/driver/drv_spi.c

@@ -424,7 +424,7 @@ static struct mr_spi_bus_ops spi_bus_drv_ops =
         drv_spi_bus_write,
     };
 
-static struct mr_drv spi_bus_drv[mr_array_num(spi_bus_drv_data)] =
+static struct mr_drv spi_bus_drv[] =
     {
 #ifdef MR_USING_SPI1
         {

bsp/wch/ch32v30x/driver/drv_spi.h

@@ -9,7 +9,7 @@
 #ifndef _DRV_SPI_H_
 #define _DRV_SPI_H_
 
-#include "device/spi.h"
+#include "include/device/spi.h"
 #include "mr_board.h"
 
 #ifdef __cplusplus

bsp/wch/ch32v30x/driver/drv_timer.c

@@ -0,0 +1,408 @@
+/*
+ * @copyright (c) 2023, MR Development Team
+ *
+ * @license SPDX-License-Identifier: Apache-2.0
+ *
+ * @date 2023-11-30    MacRsh       First version
+ */
+
+#include "drv_timer.h"
+
+#ifdef MR_USING_TIMER
+#define MR_USING_TIMER1
+#if !defined(MR_USING_TIMER1) && !defined(MR_USING_TIMER2) && !defined(MR_USING_TIMER3) && !defined(MR_USING_TIMER4) && !defined(MR_USING_TIMER5) && !defined(MR_USING_TIMER6) && !defined(MR_USING_TIMER7) && !defined(MR_USING_TIMER8) && !defined(MR_USING_TIMER9) && !defined(MR_USING_TIMER10)
+#error "Please define at least one Timer macro like MR_USING_TIMER1. Otherwise undefine MR_USING_TIMER."
+#else
+
+enum drv_timer_index
+{
+#ifdef MR_USING_TIMER1
+    DRV_INDEX_TIMER1,
+#endif /* MR_USING_TIMER1 */
+#ifdef MR_USING_TIMER2
+    DRV_INDEX_TIMER2,
+#endif /* MR_USING_TIMER2 */
+#ifdef MR_USING_TIMER3
+    DRV_INDEX_TIMER3,
+#endif /* MR_USING_TIMER3 */
+#ifdef MR_USING_TIMER4
+    DRV_INDEX_TIMER4,
+#endif /* MR_USING_TIMER4 */
+#ifdef MR_USING_TIMER5
+    DRV_INDEX_TIMER5,
+#endif /* MR_USING_TIMER5 */
+#ifdef MR_USING_TIMER6
+    DRV_INDEX_TIMER6,
+#endif /* MR_USING_TIMER6 */
+#ifdef MR_USING_TIMER7
+    DRV_INDEX_TIMER7,
+#endif /* MR_USING_TIMER7 */
+#ifdef MR_USING_TIMER8
+    DRV_INDEX_TIMER8,
+#endif /* MR_USING_TIMER8 */
+#ifdef MR_USING_TIMER9
+    DRV_INDEX_TIMER9,
+#endif /* MR_USING_TIMER9 */
+#ifdef MR_USING_TIMER10
+    DRV_INDEX_TIMER10,
+#endif /* MR_USING_TIMER10 */
+};
+
+static const char *timer_name[] =
+    {
+#ifdef MR_USING_TIMER1
+        "timer1",
+#endif /* MR_USING_TIMER1 */
+#ifdef MR_USING_TIMER2
+        "timer2",
+#endif /* MR_USING_TIMER2 */
+#ifdef MR_USING_TIMER3
+        "timer3",
+#endif /* MR_USING_TIMER3 */
+#ifdef MR_USING_TIMER4
+        "timer4",
+#endif /* MR_USING_TIMER4 */
+#ifdef MR_USING_TIMER5
+        "timer5",
+#endif /* MR_USING_TIMER5 */
+#ifdef MR_USING_TIMER6
+        "timer6",
+#endif /* MR_USING_TIMER6 */
+#ifdef MR_USING_TIMER7
+        "timer7",
+#endif /* MR_USING_TIMER7 */
+#ifdef MR_USING_TIMER8
+        "timer8",
+#endif /* MR_USING_TIMER8 */
+#ifdef MR_USING_TIMER9
+        "timer9",
+#endif /* MR_USING_TIMER9 */
+#ifdef MR_USING_TIMER10
+        "timer10",
+#endif /* MR_USING_TIMER10 */
+    };
+
+static struct drv_timer_data timer_drv_data[] =
+    {
+#ifdef MR_USING_TIMER1
+        {TIM1, RCC_APB2Periph_TIM1, TIM1_UP_IRQn},
+#endif /* MR_USING_TIMER1 */
+#ifdef MR_USING_TIMER2
+        {TIM2, RCC_APB1Periph_TIM2, TIM2_IRQn},
+#endif /* MR_USING_TIMER2 */
+#ifdef MR_USING_TIMER3
+        {TIM3, RCC_APB1Periph_TIM3, TIM3_IRQn},
+#endif /* MR_USING_TIMER3 */
+#ifdef MR_USING_TIMER4
+        {TIM4, RCC_APB1Periph_TIM4, TIM4_IRQn},
+#endif /* MR_USING_TIMER4 */
+#ifdef MR_USING_TIMER5
+        {TIM5, RCC_APB1Periph_TIM5, TIM5_IRQn},
+#endif /* MR_USING_TIMER5 */
+#ifdef MR_USING_TIMER6
+        {TIM6, RCC_APB1Periph_TIM6, TIM6_IRQn},
+#endif /* MR_USING_TIMER6 */
+#ifdef MR_USING_TIMER7
+        {TIM7, RCC_APB1Periph_TIM7, TIM7_IRQn},
+#endif /* MR_USING_TIMER7 */
+#ifdef MR_USING_TIMER8
+        {TIM8, RCC_APB2Periph_TIM8, TIM8_UP_IRQn},
+#endif /* MR_USING_TIMER8 */
+#ifdef MR_USING_TIMER9
+        {TIM9, RCC_APB2Periph_TIM9, TIM9_UP_IRQn},
+#endif /* MR_USING_TIMER9 */
+#ifdef MR_USING_TIMER10
+        {TIM10, RCC_APB2Periph_TIM10, TIM10_UP_IRQn},
+#endif /* MR_USING_TIMER10 */
+    };
+
+static struct mr_timer timer_dev[mr_array_num(timer_drv_data)];
+
+static struct mr_timer_info timer_info[] =
+    {
+#ifdef MR_USING_TIMER1
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER1 */
+#ifdef MR_USING_TIMER2
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER2 */
+#ifdef MR_USING_TIMER3
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER3 */
+#ifdef MR_USING_TIMER4
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER4 */
+#ifdef MR_USING_TIMER5
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER5 */
+#ifdef MR_USING_TIMER6
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER6 */
+#ifdef MR_USING_TIMER7
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER7 */
+#ifdef MR_USING_TIMER8
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER8 */
+#ifdef MR_USING_TIMER9
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER9 */
+#ifdef MR_USING_TIMER10
+        {0, UINT16_MAX, UINT16_MAX},
+#endif /* MR_USING_TIMER10 */
+    };
+
+static int drv_timer_configure(struct mr_timer *timer, int state)
+{
+    struct drv_timer_data *timer_data = (struct drv_timer_data *)timer->dev.drv->data;
+    TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure = {0};
+    NVIC_InitTypeDef NVIC_InitStructure = {0};
+    RCC_ClocksTypeDef RCC_ClockStructure = {0};
+    uint32_t pclk = 0;
+
+    /* Configure clock */
+    RCC_GetClocksFreq(&RCC_ClockStructure);
+    if ((uint32_t)timer_data->instance > APB2PERIPH_BASE)
+    {
+        RCC_APB2PeriphClockCmd(timer_data->clock, state);
+        pclk = RCC_ClockStructure.PCLK2_Frequency;
+    } else
+    {
+        RCC_APB1PeriphClockCmd(timer_data->clock, state);
+        pclk = RCC_ClockStructure.PCLK1_Frequency;
+    }
+
+    /* Update timer clock(MHz) */
+    timer->info->clk = pclk / 1000000;
+
+    /* Configure NVIC */
+    NVIC_InitStructure.NVIC_IRQChannel = timer_data->irq;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = state;
+    NVIC_Init(&NVIC_InitStructure);
+    TIM_ITConfig(timer_data->instance, TIM_IT_Update, state);
+
+    /* Configure timer */
+    TIM_TimeBaseInitStructure.TIM_Period = 0;
+    TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
+    TIM_TimeBaseInitStructure.TIM_RepetitionCounter = 0;
+    TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
+    TIM_TimeBaseInit(timer_data->instance, &TIM_TimeBaseInitStructure);
+    return MR_EOK;
+}
+
+static void drv_timer_start(struct mr_timer *timer, uint32_t prescaler, uint32_t period)
+{
+    struct drv_timer_data *timer_data = (struct drv_timer_data *)timer->dev.drv->data;
+
+    /* Set the PSC and ARR, and enable the timer */
+    timer_data->instance->CNT = 0;
+    timer_data->instance->PSC = prescaler - 1;
+    timer_data->instance->ATRLR = period - 1;
+    TIM_Cmd(timer_data->instance, ENABLE);
+}
+
+static void drv_timer_stop(struct mr_timer *timer)
+{
+    struct drv_timer_data *timer_data = (struct drv_timer_data *)timer->dev.drv->data;
+
+    /* Disable the timer */
+    TIM_Cmd(timer_data->instance, DISABLE);
+}
+
+static uint32_t drv_timer_get_count(struct mr_timer *timer)
+{
+    struct drv_timer_data *timer_data = (struct drv_timer_data *)timer->dev.drv->data;
+
+    return timer_data->instance->CNT;
+}
+
+static void drv_timer_isr(struct mr_timer *timer)
+{
+    struct drv_timer_data *timer_data = (struct drv_timer_data *)timer->dev.drv->data;
+
+    if (TIM_GetITStatus(timer_data->instance, TIM_IT_Update) != RESET)
+    {
+        mr_dev_isr(&timer->dev, MR_ISR_TIMER_TIMEOUT_INT, MR_NULL);
+        TIM_ClearITPendingBit(timer_data->instance, TIM_IT_Update);
+    }
+}
+
+#ifdef MR_USING_TIMER1
+void TIM1_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM1_UP_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER1]);
+}
+#endif /* MR_USING_TIMER1 */
+
+#ifdef MR_USING_TIMER2
+void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM2_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER2]);
+}
+#endif /* MR_USING_TIMER2 */
+
+#ifdef MR_USING_TIMER3
+void TIM3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM3_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER3]);
+}
+#endif /* MR_USING_TIMER3 */
+
+#ifdef MR_USING_TIMER4
+void TIM4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM4_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER4]);
+}
+#endif /* MR_USING_TIMER4 */
+
+#ifdef MR_USING_TIMER5
+void TIM5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM5_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER5]);
+}
+#endif /* MR_USING_TIMER5 */
+
+#ifdef MR_USING_TIMER6
+void TIM6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM6_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER6]);
+}
+#endif /* MR_USING_TIMER6 */
+
+#ifdef MR_USING_TIMER7
+void TIM7_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM7_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER7]);
+}
+#endif /* MR_USING_TIMER7 */
+
+#ifdef MR_USING_TIMER8
+void TIM8_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM8_UP_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER8]);
+}
+#endif /* MR_USING_TIMER8 */
+
+#ifdef MR_USING_TIMER9
+void TIM9_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM9_UP_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER9]);
+}
+#endif /* MR_USING_TIMER9 */
+
+#ifdef MR_USING_TIMER10
+void TIM10_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void TIM10_UP_IRQHandler(void)
+{
+    drv_timer_isr(&timer_dev[DRV_INDEX_TIMER10]);
+}
+#endif /* MR_USING_TIMER10 */
+
+static struct mr_timer_ops timer_drv_ops =
+    {
+        drv_timer_configure,
+        drv_timer_start,
+        drv_timer_stop,
+        drv_timer_get_count
+    };
+
+static struct mr_drv timer_drv[] =
+    {
+#ifdef MR_USING_TIMER1
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER1]
+        },
+#endif /* MR_USING_TIMER1 */
+#ifdef MR_USING_TIMER2
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER2]
+        },
+#endif /* MR_USING_TIMER2 */
+#ifdef MR_USING_TIMER3
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER3]
+        },
+#endif /* MR_USING_TIMER3 */
+#ifdef MR_USING_TIMER4
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER4]
+        },
+#endif /* MR_USING_TIMER4 */
+#ifdef MR_USING_TIMER5
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER5]
+        },
+#endif /* MR_USING_TIMER5 */
+#ifdef MR_USING_TIMER6
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER6]
+        },
+#endif /* MR_USING_TIMER6 */
+#ifdef MR_USING_TIMER7
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER7]
+        },
+#endif /* MR_USING_TIMER7 */
+#ifdef MR_USING_TIMER8
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER8]
+        },
+#endif /* MR_USING_TIMER8 */
+#ifdef MR_USING_TIMER9
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER9]
+        },
+#endif /* MR_USING_TIMER9 */
+#ifdef MR_USING_TIMER10
+        {
+            Mr_Drv_Type_Timer,
+            &timer_drv_ops,
+            &timer_drv_data[DRV_INDEX_TIMER10]
+        },
+#endif /* MR_USING_TIMER10 */
+    };
+
+int drv_timer_init(void)
+{
+    int index = 0;
+
+    for (index = 0; index < mr_array_num(timer_dev); index++)
+    {
+        mr_timer_register(&timer_dev[index], timer_name[index], &timer_drv[index], &timer_info[index]);
+    }
+    return MR_EOK;
+}
+MR_DRV_EXPORT(drv_timer_init);
+
+#endif /* !defined(MR_USING_TIMER1) && !defined(MR_USING_TIMER2) && !defined(MR_USING_TIMER3) && !defined(MR_USING_TIMER4) && !defined(MR_USING_TIMER5) && !defined(MR_USING_TIMER6) && !defined(MR_USING_TIMER7) && !defined(MR_USING_TIMER8) && !defined(MR_USING_TIMER9) && !defined(MR_USING_TIMER10) */
+
+#endif /* MR_USING_TIMER */

bsp/wch/ch32v30x/driver/drv_timer.h

@@ -0,0 +1,26 @@
+/*
+ * @copyright (c) 2023, MR Development Team
+ *
+ * @license SPDX-License-Identifier: Apache-2.0
+ *
+ * @date 2023-11-30    MacRsh       First version
+ */
+
+#ifndef _DRV_TIMER_H_
+#define _DRV_TIMER_H_
+
+#include "include/device/timer.h"
+#include "mr_board.h"
+
+#ifdef MR_USING_TIMER
+
+struct drv_timer_data
+{
+    TIM_TypeDef *instance;
+    uint32_t clock;
+    IRQn_Type irq;
+};
+
+#endif /* MR_USING_TIMER */
+
+#endif /* _DRV_TIMER_H_ */

bsp/wch/ch32v30x/driver/mr_drv.h

@@ -1,50 +0,0 @@
-/*
- * @copyright (c) 2023, MR Development Team
- *
- * @license SPDX-License-Identifier: Apache-2.0
- *
- * @date 2023-11-11    MacRsh       First version
- */
-
-#ifndef _MR_DRV_H_
-#define _MR_DRV_H_
-
-#include "mr_config.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-#ifdef MR_USING_ADC
-#include "drv_adc.h"
-#endif
-
-#ifdef MR_USING_CAN
-#include "drv_can.h"
-#endif
-
-#ifdef MR_USING_DAC
-#include "drv_dac.h"
-#endif
-
-#ifdef MR_USING_I2C
-#include "drv_i2c.h"
-#endif
-
-#ifdef MR_USING_PIN
-#include "drv_pin.h"
-#endif
-
-#ifdef MR_USING_SERIAL
-#include "drv_serial.h"
-#endif
-
-#ifdef MR_USING_SPI
-#include "drv_spi.h"
-#endif
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* _MR_DRV_H_ */