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MacRsh
2023-11-12 00:33:40 +08:00
parent f5aab48f69
commit f6f7c83e94
27 changed files with 1145 additions and 164 deletions
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203
bsp/wch/ch32v30x/drv_adc.c Normal file
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/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-11-11 MacRsh First version
*/
#include "drv_adc.h"
#ifdef MR_USING_ADC
#if !defined(MR_USING_ADC1) && !defined(MR_USING_ADC2)
#error "Please define at least one ADC macro like MR_USING_ADC1. Otherwise undefine MR_USING_ADC."
#endif
enum adc_drv_index
{
#ifdef MR_USING_ADC1
DRV_INDEX_ADC1,
#endif /* MR_USING_ADC1 */
#ifdef MR_USING_ADC2
DRV_INDEX_ADC2,
#endif /* MR_USING_ADC2 */
};
static const char *adc_name[] =
{
#ifdef MR_USING_ADC1
"adc1",
#endif /* MR_USING_ADC1 */
#ifdef MR_USING_ADC2
"adc2",
#endif /* MR_USING_ADC2 */
};
static struct drv_adc_channel_data adc_channel_drv_data[] =
{
{ADC_Channel_0, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_0},
{ADC_Channel_1, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_1},
{ADC_Channel_2, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_2},
{ADC_Channel_3, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_3},
{ADC_Channel_4, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_4},
{ADC_Channel_5, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_5},
{ADC_Channel_6, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_6},
{ADC_Channel_7, RCC_APB2Periph_GPIOA, GPIOA, GPIO_Pin_7},
{ADC_Channel_8, RCC_APB2Periph_GPIOB, GPIOB, GPIO_Pin_0},
{ADC_Channel_9, RCC_APB2Periph_GPIOB, GPIOB, GPIO_Pin_1},
{ADC_Channel_10, RCC_APB2Periph_GPIOC, GPIOC, GPIO_Pin_0},
{ADC_Channel_11, RCC_APB2Periph_GPIOC, GPIOC, GPIO_Pin_1},
{ADC_Channel_12, RCC_APB2Periph_GPIOC, GPIOC, GPIO_Pin_2},
{ADC_Channel_13, RCC_APB2Periph_GPIOC, GPIOC, GPIO_Pin_3},
{ADC_Channel_14, RCC_APB2Periph_GPIOC, GPIOC, GPIO_Pin_4},
{ADC_Channel_15, RCC_APB2Periph_GPIOC, GPIOC, GPIO_Pin_5},
{ADC_Channel_16, 0, MR_NULL, 0},
{ADC_Channel_17, 0, MR_NULL, 0},
};
static struct drv_adc_data adc_drv_data[] =
{
#ifdef MR_USING_ADC1
{ADC1, RCC_APB2Periph_ADC1},
#endif /* MR_USING_ADC1 */
#ifdef MR_USING_ADC2
{ADC2, RCC_APB2Periph_ADC2},
#endif /* MR_USING_ADC2 */
};
static struct mr_adc adc_dev[mr_array_num(adc_drv_data)];
static struct drv_adc_channel_data *drv_adc_get_channel_data(int channel)
{
if (channel >= mr_array_num(adc_channel_drv_data))
{
return NULL;
}
return &adc_channel_drv_data[channel];
}
static int drv_adc_configure(struct mr_adc *adc, int state)
{
struct drv_adc_data *adc_data = (struct drv_adc_data *)adc->dev.drv->data;
ADC_InitTypeDef ADC_InitStructure = {0};
/* Configure clock */
RCC_APB2PeriphClockCmd(adc_data->clock, (FunctionalState)state);
RCC_ADCCLKConfig(RCC_PCLK2_Div8);
/* Configure ADC */
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = 1;
ADC_Init(adc_data->instance, &ADC_InitStructure);
ADC_Cmd(adc_data->instance, (FunctionalState)state);
return MR_EOK;
}
static int drv_adc_channel_configure(struct mr_adc *adc, int channel, int state)
{
struct drv_adc_channel_data *adc_channel_data = drv_adc_get_channel_data(channel);
GPIO_InitTypeDef GPIO_InitStructure = {0};
/* Check channel is valid */
if (adc_channel_data == NULL)
{
return MR_EINVAL;
}
/* Configure clock */
RCC_APB2PeriphClockCmd(adc_channel_data->gpio_clock, ENABLE);
/* Configure pin */
if (adc_channel_data->port != MR_NULL)
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_InitStructure.GPIO_Pin = adc_channel_data->pin;
GPIO_Init(adc_channel_data->port, &GPIO_InitStructure);
}
/* Configure temp-sensor */
if ((adc_channel_data->channel == ADC_Channel_16) || (adc_channel_data->channel == ADC_Channel_17))
{
static uint8_t mask = 0;
mask = (state == MR_ENABLE) ? (mask + 1) : (mask - 1);
if (mask > 0)
{
ADC_TempSensorVrefintCmd(MR_ENABLE);
} else
{
ADC_TempSensorVrefintCmd(MR_DISABLE);
}
}
return MR_EOK;
}
static uint32_t drv_adc_read(struct mr_adc *adc, int channel)
{
struct drv_adc_data *adc_data = (struct drv_adc_data *)adc->dev.drv->data;
struct drv_adc_channel_data *adc_channel_data = drv_adc_get_channel_data(channel);
int i = 0;
/* Check channel is valid */
if (adc_channel_data == NULL)
{
return MR_EINVAL;
}
/* Read data */
ADC_RegularChannelConfig(adc_data->instance, adc_channel_data->channel, 1, ADC_SampleTime_239Cycles5);
ADC_SoftwareStartConvCmd(adc_data->instance, ENABLE);
while (ADC_GetFlagStatus(adc_data->instance, ADC_FLAG_EOC) == RESET)
{
i++;
if (i > UINT16_MAX)
{
return 0;
}
}
ADC_ClearFlag(adc_data->instance, ADC_FLAG_EOC);
return ADC_GetConversionValue(adc_data->instance);
}
static struct mr_adc_ops adc_drv_ops =
{
drv_adc_configure,
drv_adc_channel_configure,
drv_adc_read
};
static struct mr_drv adc_drv[mr_array_num(adc_drv_data)] =
{
#ifdef MR_USING_ADC1
{
Mr_Drv_Type_Adc,
&adc_drv_ops,
&adc_drv_data[DRV_INDEX_ADC1],
},
#endif /* MR_USING_ADC1 */
#ifdef MR_USING_ADC2
{
Mr_Drv_Type_Adc,
&adc_drv_ops,
&adc_drv_data[DRV_INDEX_ADC2],
},
#endif /* MR_USING_ADC2 */
};
int drv_adc_init(void)
{
int index = 0;
for (index = 0; index < mr_array_num(adc_dev); index++)
{
mr_adc_register(&adc_dev[index], adc_name[index], &adc_drv[index]);
}
return MR_EOK;
}
MR_INIT_DRV_EXPORT(drv_adc_init);
#endif /* MR_USING_ADC */

40
bsp/wch/ch32v30x/drv_adc.h Normal file
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/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-11-11 MacRsh First version
*/
#ifndef _DRV_ADC_H_
#define _DRV_ADC_H_
#include "adc.h"
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#ifdef MR_USING_ADC
struct drv_adc_data
{
ADC_TypeDef *instance;
uint32_t clock;
};
struct drv_adc_channel_data
{
uint32_t channel;
uint32_t gpio_clock;
GPIO_TypeDef *port;
uint32_t pin;
};
#endif /* MR_USING_ADC */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DRV_ADC_H_ */

548
bsp/wch/ch32v30x/drv_gpio.c
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@@ -1,5 +1,547 @@
//
// Created by macrs on 2023/11/10.
//
/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-11-11 MacRsh First version
*/
#include "drv_gpio.h"
#ifdef MR_USING_GPIO
#if !defined(MR_USING_GPIOA) && !defined(MR_USING_GPIOB) && !defined(MR_USING_GPIOC) && !defined(MR_USING_GPIOD) && !defined(MR_USING_GPIOE) && !defined(MR_USING_GPIOF)
#error "Please define at least one GPIO macro like MR_USING_GPIOA. Otherwise undefine MR_USING_GPIO."
#endif
static IRQn_Type gpio_irq_map[] =
{
EXTI0_IRQn,
EXTI1_IRQn,
EXTI2_IRQn,
EXTI3_IRQn,
EXTI4_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
};
static int gpio_irq_mask[] =
{
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
-1,
};
static struct drv_gpio_data gpio_drv_data[] =
{
#ifdef MR_USING_GPIOA
{GPIOA, GPIO_Pin_0},
{GPIOA, GPIO_Pin_1},
{GPIOA, GPIO_Pin_2},
{GPIOA, GPIO_Pin_3},
{GPIOA, GPIO_Pin_4},
{GPIOA, GPIO_Pin_5},
{GPIOA, GPIO_Pin_6},
{GPIOA, GPIO_Pin_7},
{GPIOA, GPIO_Pin_8},
{GPIOA, GPIO_Pin_9},
{GPIOA, GPIO_Pin_10},
{GPIOA, GPIO_Pin_11},
{GPIOA, GPIO_Pin_12},
{GPIOA, GPIO_Pin_13},
{GPIOA, GPIO_Pin_14},
{GPIOA, GPIO_Pin_15},
#else
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
#endif /* MR_USING_GPIOA */
#ifdef MR_USING_GPIOB
{GPIOB, GPIO_Pin_0},
{GPIOB, GPIO_Pin_1},
{GPIOB, GPIO_Pin_2},
{GPIOB, GPIO_Pin_3},
{GPIOB, GPIO_Pin_4},
{GPIOB, GPIO_Pin_5},
{GPIOB, GPIO_Pin_6},
{GPIOB, GPIO_Pin_7},
{GPIOB, GPIO_Pin_8},
{GPIOB, GPIO_Pin_9},
{GPIOB, GPIO_Pin_10},
{GPIOB, GPIO_Pin_11},
{GPIOB, GPIO_Pin_12},
{GPIOB, GPIO_Pin_13},
{GPIOB, GPIO_Pin_14},
{GPIOB, GPIO_Pin_15},
#else
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
#endif /* MR_USING_GPIOB */
#ifdef MR_USING_GPIOC
{GPIOC, GPIO_Pin_0},
{GPIOC, GPIO_Pin_1},
{GPIOC, GPIO_Pin_2},
{GPIOC, GPIO_Pin_3},
{GPIOC, GPIO_Pin_4},
{GPIOC, GPIO_Pin_5},
{GPIOC, GPIO_Pin_6},
{GPIOC, GPIO_Pin_7},
{GPIOC, GPIO_Pin_8},
{GPIOC, GPIO_Pin_9},
{GPIOC, GPIO_Pin_10},
{GPIOC, GPIO_Pin_11},
{GPIOC, GPIO_Pin_12},
{GPIOC, GPIO_Pin_13},
{GPIOC, GPIO_Pin_14},
{GPIOC, GPIO_Pin_15},
#else
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
#endif /* MR_USING_GPIOC */
#ifdef MR_USING_GPIOD
{GPIOD, GPIO_Pin_0},
{GPIOD, GPIO_Pin_1},
{GPIOD, GPIO_Pin_2},
{GPIOD, GPIO_Pin_3},
{GPIOD, GPIO_Pin_4},
{GPIOD, GPIO_Pin_5},
{GPIOD, GPIO_Pin_6},
{GPIOD, GPIO_Pin_7},
{GPIOD, GPIO_Pin_8},
{GPIOD, GPIO_Pin_9},
{GPIOD, GPIO_Pin_10},
{GPIOD, GPIO_Pin_11},
{GPIOD, GPIO_Pin_12},
{GPIOD, GPIO_Pin_13},
{GPIOD, GPIO_Pin_14},
{GPIOD, GPIO_Pin_15},
#else
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
#endif /* MR_USING_GPIOD */
#ifdef MR_USING_GPIOE
{GPIOE, GPIO_Pin_0},
{GPIOE, GPIO_Pin_1},
{GPIOE, GPIO_Pin_2},
{GPIOE, GPIO_Pin_3},
{GPIOE, GPIO_Pin_4},
{GPIOE, GPIO_Pin_5},
{GPIOE, GPIO_Pin_6},
{GPIOE, GPIO_Pin_7},
{GPIOE, GPIO_Pin_8},
{GPIOE, GPIO_Pin_9},
{GPIOE, GPIO_Pin_10},
{GPIOE, GPIO_Pin_11},
{GPIOE, GPIO_Pin_12},
{GPIOE, GPIO_Pin_13},
{GPIOE, GPIO_Pin_14},
{GPIOE, GPIO_Pin_15},
#else
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
{MR_NULL, 0},
#endif /* MR_USING_GPIOE */
};
static struct mr_gpio gpio_dev;
static struct drv_gpio_data *drv_gpio_get_data(int pin)
{
if ((pin >= mr_array_num(gpio_drv_data)) || (gpio_drv_data[pin].port == MR_NULL))
{
return NULL;
}
return &gpio_drv_data[pin];
}
static int drv_gpio_configure(struct mr_gpio *gpio, int pin, int mode)
{
struct drv_gpio_data *gpio_data = drv_gpio_get_data(pin);
uint32_t exti_line = pin % 16;
GPIO_InitTypeDef GPIO_InitStructure = {0};
EXTI_InitTypeDef EXTI_InitStructure = {0};
NVIC_InitTypeDef NVIC_InitStructure = {0};
/* Check pin is valid */
if (gpio_data == MR_NULL)
{
return MR_EINVAL;
}
/* Configure clock */
#ifdef MR_USING_GPIOA
if (gpio_data->port == GPIOA)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
}
#endif /* MR_USING_GPIOA */
#ifdef MR_USING_GPIOB
if (gpio_data->port == GPIOB)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
}
#endif /* MR_USING_GPIOB */
#ifdef MR_USING_GPIOC
if (gpio_data->port == GPIOC)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
}
#endif /* MR_USING_GPIOC */
#ifdef MR_USING_GPIOD
if (gpio_data->port == GPIOD)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
}
#endif /* MR_USING_GPIOD */
#ifdef MR_USING_GPIOE
if (gpio_data->port == GPIOE)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
}
#endif /* MR_USING_GPIOE */
switch (mode)
{
case MR_GPIO_MODE_OUTPUT:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
break;
}
case MR_GPIO_MODE_OUTPUT_OD:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD;
break;
}
case MR_GPIO_MODE_INPUT:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
break;
}
case MR_GPIO_MODE_INPUT_DOWN:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD;
break;
}
case MR_GPIO_MODE_INPUT_UP:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
break;
}
case MR_GPIO_MODE_IRQ_RISING:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
break;
}
case MR_GPIO_MODE_IRQ_FALLING:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
break;
}
case MR_GPIO_MODE_IRQ_EDGE:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
break;
}
default:
{
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
break;
}
}
/* Configure EXTI */
if (mode >= MR_GPIO_MODE_IRQ_RISING)
{
if ((gpio_irq_mask[exti_line] != -1) && (gpio_irq_mask[exti_line] != pin))
{
return MR_EBUSY;
}
gpio_irq_mask[exti_line] = pin;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
EXTI_InitStructure.EXTI_Line = gpio_data->pin;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
GPIO_EXTILineConfig(pin / 16, exti_line);
EXTI_Init(&EXTI_InitStructure);
/* Configure NVIC */
NVIC_InitStructure.NVIC_IRQChannel = gpio_irq_map[exti_line];
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
} else if (pin == gpio_irq_mask[exti_line])
{
if ((exti_line >= 5) && (exti_line <= 9))
{
if ((gpio_irq_mask[5] == -1) && (gpio_irq_mask[6] == -1) && (gpio_irq_mask[7] == -1) &&
(gpio_irq_mask[8] == -1) && (gpio_irq_mask[9] == -1))
{
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
} else
{
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
}
} else
{
if ((gpio_irq_mask[10] == -1) && (gpio_irq_mask[11] == -1) && (gpio_irq_mask[12] == -1) &&
(gpio_irq_mask[13] == -1) && (gpio_irq_mask[14] == -1) && (gpio_irq_mask[15] == -1))
{
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
} else
{
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
}
}
gpio_irq_mask[exti_line] = -1;
EXTI_InitStructure.EXTI_Line = gpio_data->pin;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
GPIO_EXTILineConfig(pin / 16, exti_line);
EXTI_Init(&EXTI_InitStructure);
}
/* Configure GPIO */
GPIO_InitStructure.GPIO_Pin = gpio_data->pin;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(gpio_data->port, &GPIO_InitStructure);
return MR_EOK;
}
static int drv_gpio_read(struct mr_gpio *gpio, int pin)
{
struct drv_gpio_data *gpio_data = drv_gpio_get_data(pin);
/* Check pin is valid */
if (gpio_data == NULL)
{
return 0;
}
return (int)GPIO_ReadInputDataBit(gpio_data->port, gpio_data->pin);
}
static void drv_gpio_write(struct mr_gpio *gpio, int pin, int value)
{
struct drv_gpio_data *gpio_data = drv_gpio_get_data(pin);
/* Check pin is valid */
if (gpio_data == NULL)
{
return;
}
GPIO_WriteBit(gpio_data->port, gpio_data->pin, value);
}
void EXTI0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI0_IRQHandler(void)
{
if (EXTI_GetITStatus(EXTI_Line0) != RESET)
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[0]);
EXTI_ClearITPendingBit(EXTI_Line0);
}
}
void EXTI1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI1_IRQHandler(void)
{
if (EXTI_GetITStatus(EXTI_Line1) != RESET)
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[1]);
EXTI_ClearITPendingBit(EXTI_Line1);
}
}
void EXTI2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI2_IRQHandler(void)
{
if (EXTI_GetITStatus(EXTI_Line2) != RESET)
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[2]);
EXTI_ClearITPendingBit(EXTI_Line2);
}
}
void EXTI3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI3_IRQHandler(void)
{
if (EXTI_GetITStatus(EXTI_Line3) != RESET)
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[3]);
EXTI_ClearITPendingBit(EXTI_Line3);
}
}
void EXTI4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI4_IRQHandler(void)
{
if (EXTI_GetITStatus(EXTI_Line4) != RESET)
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[4]);
EXTI_ClearITPendingBit(EXTI_Line4);
}
}
void EXTI9_5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI9_5_IRQHandler(void)
{
if ((EXTI_GetITStatus(EXTI_Line5) != RESET)
|| (EXTI_GetITStatus(EXTI_Line6) != RESET)
|| (EXTI_GetITStatus(EXTI_Line7) != RESET)
|| (EXTI_GetITStatus(EXTI_Line8) != RESET)
|| (EXTI_GetITStatus(EXTI_Line9) != RESET))
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[5]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[6]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[7]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[8]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[9]);
EXTI_ClearITPendingBit(EXTI_Line5 | EXTI_Line6 | EXTI_Line7 | EXTI_Line8 | EXTI_Line9);
}
}
void EXTI15_10_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void EXTI15_10_IRQHandler(void)
{
if ((EXTI_GetITStatus(EXTI_Line10) != RESET)
|| (EXTI_GetITStatus(EXTI_Line11) != RESET)
|| (EXTI_GetITStatus(EXTI_Line12) != RESET)
|| (EXTI_GetITStatus(EXTI_Line13) != RESET)
|| (EXTI_GetITStatus(EXTI_Line14) != RESET)
|| (EXTI_GetITStatus(EXTI_Line15) != RESET))
{
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[10]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[11]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[12]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[13]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[14]);
mr_dev_isr(&gpio_dev.dev, MR_ISR_EVENT_RD_INTER, &gpio_irq_mask[15]);
EXTI_ClearITPendingBit(EXTI_Line10 | EXTI_Line11 | EXTI_Line12 | EXTI_Line13 | EXTI_Line14 | EXTI_Line15);
}
}
static struct mr_gpio_ops gpio_drv_ops =
{
drv_gpio_configure,
drv_gpio_read,
drv_gpio_write
};
static struct mr_drv gpio_drv =
{
Mr_Drv_Type_Gpio,
&gpio_dev,
&gpio_drv_ops
};
int drv_gpio_init(void)
{
return mr_gpio_register(&gpio_dev, "gpio", &gpio_drv);
}
MR_INIT_DRV_EXPORT(drv_gpio_init);
#endif /* MR_USING_GPIO */

36
bsp/wch/ch32v30x/drv_gpio.h
View File

@@ -1,8 +1,32 @@
//
// Created by macrs on 2023/11/10.
//
/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-11-11 MacRsh First version
*/
#ifndef MR_LIBRARY_DRV_GPIO_H
#define MR_LIBRARY_DRV_GPIO_H
#ifndef _DRV_GPIO_H_
#define _DRV_GPIO_H_
#endif //MR_LIBRARY_DRV_GPIO_H
#include "gpio.h"
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#ifdef MR_USING_GPIO
struct drv_gpio_data
{
GPIO_TypeDef *port;
uint32_t pin;
};
#endif /* MR_USING_GPIO */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _DRV_GPIO_H_ */

20
bsp/wch/ch32v30x/drv_uart.c
View File

@@ -14,7 +14,7 @@
#error "Please define at least one UART macro like MR_USING_UART1. Otherwise undefine MR_USING_UART."
#endif
enum drv_index
enum uart_drv_index
{
#ifdef MR_USING_UART1
DRV_INDEX_UART1,
@@ -737,56 +737,56 @@ static struct mr_drv uart_drv[mr_array_num(uart_drv_data)] =
{
#ifdef MR_USING_UART1
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART1]
},
#endif /* MR_USING_UART1 */
#ifdef MR_USING_UART2
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART2]
},
#endif /* MR_USING_UART2 */
#ifdef MR_USING_UART3
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART3]
},
#endif /* MR_USING_UART3 */
#ifdef MR_USING_UART4
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART4]
},
#endif /* MR_USING_UART4 */
#ifdef MR_USING_UART5
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART5]
},
#endif /* MR_USING_UART5 */
#ifdef MR_USING_UART6
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART6]
},
#endif /* MR_USING_UART6 */
#ifdef MR_USING_UART7
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART7]
},
#endif /* MR_USING_UART7 */
#ifdef MR_USING_UART8
{
Mr_Dev_Type_Uart,
Mr_Drv_Type_Uart,
&uart_drv_ops,
&uart_drv_data[DRV_INDEX_UART8]
},
@@ -803,6 +803,6 @@ int drv_uart_init(void)
}
return MR_EOK;
}
MR_INIT_DRV_EXPORT(drv_uart_init);
MR_INIT_CONSOLE_EXPORT(drv_uart_init);
#endif /* MR_USING_UART */

2
bsp/wch/ch32v30x/drv_uart.h
View File

@@ -9,7 +9,7 @@
#ifndef _DRV_UART_H_
#define _DRV_UART_H_
#include "dev/uart.h"
#include "uart.h"
#ifdef __cplusplus
extern "C" {

31
bsp/wch/ch32v30x/mr_board.h
View File

@@ -9,25 +9,38 @@
#ifndef _MR_BOARD_H_
#define _MR_BOARD_H_
#define MR_CFG_SYS_CLK
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define MR_USING_ADC1
#define MR_USING_ADC2
#define MR_USING_GPIOA
#define MR_USING_GPIOB
#define MR_USING_GPIOC
#define MR_USING_GPIOD
#define MR_USING_GPIOE
#define MR_USING_UART1
#define MR_CFG_UART1_GROUP 1
#define MR_USING_UART2
#define MR_USING_UART3
#define MR_USING_UART4
#define MR_USING_UART5
#define MR_USING_UART6
#define MR_USING_UART7
#define MR_USING_UART8
#define MR_CFG_UART2_GROUP 1
#define MR_USING_UART3
#define MR_CFG_UART3_GROUP 1
#define MR_USING_UART4
#define MR_CFG_UART4_GROUP 1
#define MR_USING_UART5
#define MR_CFG_UART5_GROUP 1
#define MR_USING_UART6
#define MR_CFG_UART6_GROUP 1
#define MR_USING_UART7
#define MR_CFG_UART7_GROUP 1
#define MR_USING_UART8
#define MR_CFG_UART8_GROUP 1
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _MR_BOARD_H_ */

50
bsp/wch/ch32v30x/mr_drv.h Normal file
View File

@@ -0,0 +1,50 @@
/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-11-11 MacRsh First version
*/
#ifndef _MR_DRV_H_
#define _MR_DRV_H_
#include "mr_config.h"
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#ifdef MR_USING_ADC
#include "drv_adc.h"
#endif
#ifdef MR_USING_DAC
#include "drv_dac.h"
#endif
#ifdef MR_USING_GPIO
#include "drv_gpio.h"
#endif
#ifdef MR_USING_I2C
#include "drv_i2c.h"
#endif
#ifdef MR_USING_SPI
#include "drv_spi.h"
#endif
#ifdef MR_USING_UART
#include "drv_uart.h"
#endif
#ifdef MR_USING_PWM
#include "drv_pwm.h"
#endif
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _MR_DRV_H_ */