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1.pwm框架测试版。

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MacRsh
2023-07-30 22:27:21 +08:00
parent e0924dfa3a
commit ed07093458
2 changed files with 73 additions and 25 deletions
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49
device/pwm/pwm.c
View File

@@ -15,16 +15,16 @@
static mr_err_t mr_pwm_open(mr_device_t device)
{
mr_pwm_t pwm = (mr_pwm_t)device;
struct mr_pwm_config config = MR_PWM_CONFIG_DEFAULT;
/* Setting pwm to default config, if the frequency not set */
if (pwm->config.freq == 0)
{
struct mr_pwm_config config = MR_PWM_CONFIG_DEFAULT;
pwm->config = config;
}
/* Check the frequency */
mr_limit(pwm->config.freq, pwm->info->min_freq, pwm->info->max_freq);
mr_limit(pwm->config.freq, pwm->info.min_freq, pwm->info.max_freq);
return pwm->ops->configure(pwm, &pwm->config);
}
@@ -43,21 +43,22 @@ static mr_err_t mr_pwm_ioctl(mr_device_t device, int cmd, void *args)
{
mr_pwm_t pwm = (mr_pwm_t)device;
mr_err_t ret = MR_ERR_OK;
struct mr_pwm_config *config = (struct mr_pwm_config *)args;
switch (cmd & _MR_CTRL_FLAG_MASK)
{
case MR_CTRL_CONFIG:
case MR_CTRL_SET_CONFIG:
{
if (args)
{
/* Check the frequency */
mr_limit(config->freq, pwm->info->min_freq, pwm->info->max_freq);
struct mr_pwm_config *config = (struct mr_pwm_config *)args;
ret = pwm->ops->configure(pwm, (struct mr_pwm_config *)args);
/* Check the frequency */
mr_limit(config->freq, pwm->info.min_freq, pwm->info.max_freq);
ret = pwm->ops->configure(pwm, config);
if (ret == MR_ERR_OK)
{
pwm->config = *(struct mr_pwm_config *)args;
pwm->config = *config;
}
return ret;
}
@@ -72,41 +73,41 @@ static mr_err_t mr_pwm_ioctl(mr_device_t device, int cmd, void *args)
static mr_err_t mr_pwm_read(mr_device_t device, mr_pos_t pos, void *buffer, mr_size_t size)
{
mr_pwm_t pwm = (mr_pwm_t)device;
mr_uint32_t *recv_buffer = (mr_uint32_t *)buffer;
mr_size_t recv_size = 0;
mr_uint32_t *read_buffer = (mr_uint32_t *)buffer;
mr_size_t read_size = 0;
if (size < sizeof(*recv_buffer))
if (size < sizeof(*read_buffer))
{
return -MR_ERR_INVALID;
}
for (recv_size = 0; recv_size < size; recv_size += sizeof(*recv_buffer))
for (read_size = 0; read_size < size; read_size += sizeof(*read_buffer))
{
*recv_buffer = pwm->ops->read(pwm, pos);
recv_buffer++;
*read_buffer = pwm->ops->read(pwm, pos);
read_buffer++;
}
return (mr_ssize_t)recv_size;
return (mr_ssize_t)read_size;
}
static mr_err_t mr_pwm_write(mr_device_t device, mr_pos_t pos, const void *buffer, mr_size_t size)
{
mr_pwm_t pwm = (mr_pwm_t)device;
mr_uint32_t *send_buffer = (mr_uint32_t *)buffer;
mr_size_t send_size = 0;
mr_uint32_t *write_buffer = (mr_uint32_t *)buffer;
mr_size_t write_size = 0;
if (size < sizeof(*send_buffer))
if (size < sizeof(*write_buffer))
{
return -MR_ERR_INVALID;
}
for (send_size = 0; send_size < size; send_size += sizeof(*send_buffer))
for (write_size = 0; write_size < size; write_size += sizeof(*write_buffer))
{
pwm->ops->write(pwm, pos, *send_buffer);
send_buffer++;
pwm->ops->write(pwm, pos, *write_buffer);
write_buffer++;
}
return (mr_ssize_t)send_size;
return (mr_ssize_t)write_size;
}
static mr_err_t _err_io_pwm_configure(mr_pwm_t pwm, struct mr_pwm_config *config)
@@ -143,7 +144,7 @@ mr_err_t mr_pwm_device_add(mr_pwm_t pwm, const char *name, void *data, struct mr
MR_ASSERT(ops != MR_NULL);
MR_ASSERT(info != MR_NULL);
MR_ASSERT(info->min_freq > 0);
MR_ASSERT(info->max_freq > info->min_freq);
MR_ASSERT(info->max_freq >= info->min_freq);
/* Initialize the private fields */
pwm->device.type = MR_DEVICE_TYPE_PWM;
@@ -151,7 +152,7 @@ mr_err_t mr_pwm_device_add(mr_pwm_t pwm, const char *name, void *data, struct mr
pwm->device.ops = &device_ops;
pwm->config.freq = 0;
pwm->info = info;
pwm->info = *info;
/* Set operations as protection-ops if ops is null */
ops->configure = ops->configure ? ops->configure : _err_io_pwm_configure;

49
device/pwm/pwm.h
View File

@@ -15,15 +15,62 @@
#if (MR_CONF_PWM == MR_CONF_ENABLE)
#define MR_PWM_MODE_NORMAL 0
#define MR_PWM_MODE_COMPLEMENTARY 1
/* Default config for mr_pwm_config structure */
#define MR_PWM_CONFIG_DEFAULT \
{ \
1000, \
MR_PWM_MODE_NORMAL, \
0, \
0, \
}
struct mr_pwm_config
{
mr_uint32_t freq;
mr_uint8_t mode;
mr_uint32_t dead_time;
union
{
struct
{
mr_pos_t channel0: 1;
mr_pos_t channel1: 1;
mr_pos_t channel2: 1;
mr_pos_t channel3: 1;
mr_pos_t channel4: 1;
mr_pos_t channel5: 1;
mr_pos_t channel6: 1;
mr_pos_t channel7: 1;
mr_pos_t channel8: 1;
mr_pos_t channel9: 1;
mr_pos_t channel10: 1;
mr_pos_t channel11: 1;
mr_pos_t channel12: 1;
mr_pos_t channel13: 1;
mr_pos_t channel14: 1;
mr_pos_t channel15: 1;
mr_pos_t channel16: 1;
mr_pos_t channel17: 1;
mr_pos_t channel18: 1;
mr_pos_t channel19: 1;
mr_pos_t channel20: 1;
mr_pos_t channel21: 1;
mr_pos_t channel22: 1;
mr_pos_t channel23: 1;
mr_pos_t channel24: 1;
mr_pos_t channel25: 1;
mr_pos_t channel26: 1;
mr_pos_t channel27: 1;
mr_pos_t channel28: 1;
mr_pos_t channel29: 1;
mr_pos_t channel30: 1;
mr_pos_t channel31: 1;
};
mr_pos_t _channel_mask;
};
};
struct mr_pwm_info
@@ -46,7 +93,7 @@ struct mr_pwm
struct mr_device device;
struct mr_pwm_config config;
struct mr_pwm_info *info;
struct mr_pwm_info info;
const struct mr_pwm_ops *ops;
};