From 860963cd7f833b62340b8f27c9bd0beaeaf036d7 Mon Sep 17 00:00:00 2001 From: MacRsh Date: Sat, 25 Nov 2023 00:29:11 +0800 Subject: [PATCH] =?UTF-8?q?1.=E9=87=8D=E5=91=BD=E5=90=8Dgpio=E4=B8=BApin?= =?UTF-8?q?=E3=80=82?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- device/{gpio.c => pin.c} | 58 ++++++++++++------------- include/device/gpio.h | 85 ------------------------------------- include/device/pin.h | 91 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 120 insertions(+), 114 deletions(-) rename device/{gpio.c => pin.c} (52%) delete mode 100644 include/device/gpio.h create mode 100644 include/device/pin.h diff --git a/device/gpio.c b/device/pin.c similarity index 52% rename from device/gpio.c rename to device/pin.c index 1715bf5..1fa19f5 100644 --- a/device/gpio.c +++ b/device/pin.c @@ -6,14 +6,14 @@ * @date 2023-11-08 MacRsh First version */ -#include "include/device/gpio.h" +#include "include/device/pin.h" -#ifdef MR_USING_GPIO +#ifdef MR_USING_PIN -static ssize_t mr_gpio_read(struct mr_dev *dev, int off, void *buf, size_t size, int sync_or_async) +static ssize_t mr_pin_read(struct mr_dev *dev, int off, void *buf, size_t size, int sync_or_async) { - struct mr_gpio *gpio = (struct mr_gpio *)dev; - struct mr_gpio_ops *ops = (struct mr_gpio_ops *)dev->drv->ops; + struct mr_pin *pin = (struct mr_pin *)dev; + struct mr_pin_ops *ops = (struct mr_pin_ops *)dev->drv->ops; uint8_t *rd_buf = (uint8_t *)buf; ssize_t rd_size = 0; @@ -25,16 +25,16 @@ static ssize_t mr_gpio_read(struct mr_dev *dev, int off, void *buf, size_t size, for (rd_size = 0; rd_size < size; rd_size += sizeof(*rd_buf)) { - *rd_buf = (uint8_t)ops->read(gpio, off); + *rd_buf = (uint8_t)ops->read(pin, off); rd_buf++; } return rd_size; } -static ssize_t mr_gpio_write(struct mr_dev *dev, int off, const void *buf, size_t size, int sync_or_async) +static ssize_t mr_pin_write(struct mr_dev *dev, int off, const void *buf, size_t size, int sync_or_async) { - struct mr_gpio *gpio = (struct mr_gpio *)dev; - struct mr_gpio_ops *ops = (struct mr_gpio_ops *)dev->drv->ops; + struct mr_pin *pin = (struct mr_pin *)dev; + struct mr_pin_ops *ops = (struct mr_pin_ops *)dev->drv->ops; uint8_t *wr_buf = (uint8_t *)buf; ssize_t wr_size = 0; @@ -46,20 +46,20 @@ static ssize_t mr_gpio_write(struct mr_dev *dev, int off, const void *buf, size_ for (wr_size = 0; wr_size < size; wr_size += sizeof(*wr_buf)) { - ops->write(gpio, off, (int)*wr_buf); + ops->write(pin, off, (int)*wr_buf); wr_buf++; } return wr_size; } -static int mr_gpio_ioctl(struct mr_dev *dev, int off, int cmd, void *args) +static int mr_pin_ioctl(struct mr_dev *dev, int off, int cmd, void *args) { - struct mr_gpio *gpio = (struct mr_gpio *)dev; - struct mr_gpio_ops *ops = (struct mr_gpio_ops *)dev->drv->ops; + struct mr_pin *pin = (struct mr_pin *)dev; + struct mr_pin_ops *ops = (struct mr_pin_ops *)dev->drv->ops; switch (cmd) { - case MR_CTRL_GPIO_SET_PIN_MODE: + case MR_CTRL_PIN_SET_PIN_MODE: { if (args != MR_NULL) { @@ -71,7 +71,7 @@ static int mr_gpio_ioctl(struct mr_dev *dev, int off, int cmd, void *args) return MR_EINVAL; } - return ops->configure(gpio, off, mode); + return ops->configure(pin, off, mode); } return MR_EINVAL; } @@ -83,7 +83,7 @@ static int mr_gpio_ioctl(struct mr_dev *dev, int off, int cmd, void *args) } } -static ssize_t mr_gpio_isr(struct mr_dev *dev, int event, void *args) +static ssize_t mr_pin_isr(struct mr_dev *dev, int event, void *args) { switch (event) { @@ -100,33 +100,33 @@ static ssize_t mr_gpio_isr(struct mr_dev *dev, int event, void *args) } /** - * @brief This function registers a gpio. + * @brief This function registers a pin. * - * @param gpio The gpio. - * @param name The name of the gpio. - * @param drv The driver of the gpio. + * @param pin The pin. + * @param name The name of the pin. + * @param drv The driver of the pin. * * @return MR_EOK on success, otherwise an error code. */ -int mr_gpio_register(struct mr_gpio *gpio, const char *name, struct mr_drv *drv) +int mr_pin_register(struct mr_pin *pin, const char *name, struct mr_drv *drv) { static struct mr_dev_ops ops = { MR_NULL, MR_NULL, - mr_gpio_read, - mr_gpio_write, - mr_gpio_ioctl, - mr_gpio_isr + mr_pin_read, + mr_pin_write, + mr_pin_ioctl, + mr_pin_isr }; - mr_assert(gpio != MR_NULL); + mr_assert(pin != MR_NULL); mr_assert(name != MR_NULL); mr_assert(drv != MR_NULL); mr_assert(drv->ops != MR_NULL); - /* Register the gpio */ - return mr_dev_register(&gpio->dev, name, Mr_Dev_Type_Gpio, MR_SFLAG_RDWR, &ops, drv); + /* Register the pin */ + return mr_dev_register(&pin->dev, name, Mr_Dev_Type_Pin, MR_SFLAG_RDWR, &ops, drv); } -#endif /* MR_USING_GPIO */ +#endif /* MR_USING_PIN */ diff --git a/include/device/gpio.h b/include/device/gpio.h deleted file mode 100644 index aa7933a..0000000 --- a/include/device/gpio.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * @copyright (c) 2023, MR Development Team - * - * @license SPDX-License-Identifier: Apache-2.0 - * - * @date 2023-11-08 MacRsh First version - */ - -#ifndef _MR_GPIO_H_ -#define _MR_GPIO_H_ - -#include "mr_api.h" - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#ifdef MR_USING_GPIO - -/** - * @brief GPIO level. - */ -#define MR_GPIO_LOW_LEVEL (0) /* Low level */ -#define MR_GPIO_HIGH_LEVEL (1) /* High level */ - -/** - * @brief GPIO mode. - */ -#define MR_GPIO_MODE_NONE (0) /* No mode */ -#define MR_GPIO_MODE_OUTPUT (1) /* Output push-pull mode */ -#define MR_GPIO_MODE_OUTPUT_OD (2) /* Output open-drain mode */ -#define MR_GPIO_MODE_INPUT (3) /* Input mode */ -#define MR_GPIO_MODE_INPUT_DOWN (4) /* Input pull-down mode */ -#define MR_GPIO_MODE_INPUT_UP (5) /* Input pull-up mode */ - -/** - * @brief GPIO mode-interrupt. - */ -#define MR_GPIO_MODE_IRQ_RISING (6) /* Interrupt rising edge */ -#define MR_GPIO_MODE_IRQ_FALLING (7) /* Interrupt falling edge */ -#define MR_GPIO_MODE_IRQ_EDGE (8) /* Interrupt edge */ -#define MR_GPIO_MODE_IRQ_LOW (9) /* Interrupt low level */ -#define MR_GPIO_MODE_IRQ_HIGH (10) /* Interrupt high level */ - -/** - * @brief GPIO pin mode command. - */ -#define MR_CTRL_GPIO_SET_PIN_MODE ((0x01|0x80) << 16) /**< Set pin mode */ - -/** - * @brief GPIO data type. - */ -typedef uint8_t mr_gpio_data_t; /**< GPIO read/write data type */ - -/** - * @brief GPIO structure. - */ -struct mr_gpio -{ - struct mr_dev dev; /**< Device */ -}; - -/** - * @brief GPIO operations structure. - */ -struct mr_gpio_ops -{ - int (*configure)(struct mr_gpio *gpio, int pin, int mode); - int (*read)(struct mr_gpio *gpio, int pin); - void (*write)(struct mr_gpio *gpio, int pin, int value); -}; - -/** - * @addtogroup GPIO. - * @{ - */ -int mr_gpio_register(struct mr_gpio *gpio, const char *name, struct mr_drv *drv); -/** @} */ -#endif /* MR_USING_GPIO */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* _MR_GPIO_H_ */ diff --git a/include/device/pin.h b/include/device/pin.h new file mode 100644 index 0000000..c5b0377 --- /dev/null +++ b/include/device/pin.h @@ -0,0 +1,91 @@ +/* + * @copyright (c) 2023, MR Development Team + * + * @license SPDX-License-Identifier: Apache-2.0 + * + * @date 2023-11-08 MacRsh First version + */ + +#ifndef _MR_PIN_H_ +#define _MR_PIN_H_ + +#include "mr_api.h" + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#ifdef MR_USING_PIN + +/** + * @brief PIN level. + */ +#define MR_PIN_LOW_LEVEL (0) /* Low level */ +#define MR_PIN_HIGH_LEVEL (1) /* High level */ + +/** + * @brief PIN mode. + */ +#define MR_PIN_MODE_NONE (0) /* No mode */ +#define MR_PIN_MODE_OUTPUT (1) /* Output push-pull mode */ +#define MR_PIN_MODE_OUTPUT_OD (2) /* Output open-drain mode */ +#define MR_PIN_MODE_INPUT (3) /* Input mode */ +#define MR_PIN_MODE_INPUT_DOWN (4) /* Input pull-down mode */ +#define MR_PIN_MODE_INPUT_UP (5) /* Input pull-up mode */ + +/** + * @brief PIN mode-interrupt. + */ +#define MR_PIN_MODE_IRQ_RISING (6) /* Interrupt rising edge */ +#define MR_PIN_MODE_IRQ_FALLING (7) /* Interrupt falling edge */ +#define MR_PIN_MODE_IRQ_EDGE (8) /* Interrupt edge */ +#define MR_PIN_MODE_IRQ_LOW (9) /* Interrupt low level */ +#define MR_PIN_MODE_IRQ_HIGH (10) /* Interrupt high level */ + +/** + * @brief PIN mode command. + */ +#define MR_CTRL_PIN_SET_PIN_MODE ((0x01|0x80) << 16) /**< Set pin mode */ + +/** + * @brief PIN number command. + */ +#define MR_CTRL_PIN_SET_NUMBER MR_CTRL_SET_OFFSET /**< Set pin number */ +#define MR_CTRL_PIN_GET_NUMBER MR_CTRL_GET_OFFSET /**< Get pin number */ + +/** + * @brief PIN data type. + */ +typedef uint8_t mr_pin_data_t; /**< PIN read/write data type */ + +/** + * @brief PIN structure. + */ +struct mr_pin +{ + struct mr_dev dev; /**< Device */ +}; + +/** + * @brief PIN operations structure. + */ +struct mr_pin_ops +{ + int (*configure)(struct mr_pin *pin, int number, int mode); + int (*read)(struct mr_pin *pin, int number); + void (*write)(struct mr_pin *pin, int number, int value); +}; + +/** + * @addtogroup PIN. + * @{ + */ +int mr_pin_register(struct mr_pin *pin, const char *name, struct mr_drv *drv); +/** @} */ +#endif /* MR_USING_PIN */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* _MR_PIN_H_ */