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1.优化设备命令。

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MacRsh
2023-11-29 15:16:37 +08:00
parent 68df69b294
commit 7bf435b6bd
11 changed files with 79 additions and 65 deletions
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1
README.md
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@@ -61,7 +61,6 @@
| mr_dev_read | 从设备读取数据 |
| mr_dev_write | 向设备写入数据 |
| mr_dev_isr | 设备中断控制 |
| mr_dev_get_full_name | 获取设备全称 |
----------

1
README_EN.md
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@@ -67,7 +67,6 @@ All operations of the device can be implemented through the following interfaces
| mr_dev_read | Read data from the device |
| mr_dev_write | Writes data to the device |
| mr_dev_isr | Device interrupt control |
| mr_dev_get_full_name | Obtain the full device name |
----------

6
device/adc.h
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@@ -30,10 +30,10 @@ extern "C" {
#define MR_CTL_ADC_GET_CHANNEL_STATE ((0x01|0x00) << 16) /**< Get channel state */
/**
* @brief ADC channel command.
* @brief ADC control command.
*/
#define MR_CTL_ADC_SET_CHANNEL MR_CTL_SET_OFFSET /**< Set channel */
#define MR_CTL_ADC_GET_CHANNEL MR_CTL_GET_OFFSET /**< Get channel */
#define MR_CTL_ADC_SET_CHANNEL MR_CTL_SET_OFFSET /**< Set channel */
#define MR_CTL_ADC_GET_CHANNEL MR_CTL_GET_OFFSET /**< Get channel */
/**
* @brief ADC data type.

8
device/can.h
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@@ -51,10 +51,12 @@ struct mr_can_config
#define MR_CAN_ID(id, ide, rtr) ((id) | (ide) | (rtr)) /**< Set id-ide-rtr */
/**
* @brief CAN id command.
* @brief CAN control command.
*/
#define MR_CTL_CAN_SET_ID MR_CTL_SET_OFFSET /**< Set id */
#define MR_CTL_CAN_GET_ID MR_CTL_GET_OFFSET /**< Get id */
#define MR_CTL_CAN_SET_ID MR_CTL_SET_OFFSET /**< Set id */
#define MR_CTL_CAN_SET_RD_CALL MR_CTL_SET_RD_CALL /**< Set read call */
#define MR_CTL_CAN_GET_ID MR_CTL_GET_OFFSET /**< Get id */
#define MR_CTL_CAN_GET_RD_CALL MR_CTL_GET_RD_CALL /**< Get read call */
/**
* @brief CAN data type.

6
device/dac.h
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@@ -30,10 +30,10 @@ extern "C" {
#define MR_CTL_DAC_GET_CHANNEL_STATE ((0x01|0x00) << 16) /**< Get channel state */
/**
* @brief DAC channel command.
* @brief DAC control command.
*/
#define MR_CTL_DAC_SET_CHANNEL MR_CTL_SET_OFFSET /**< Set channel */
#define MR_CTL_DAC_GET_CHANNEL MR_CTL_GET_OFFSET /**< Get channel */
#define MR_CTL_DAC_SET_CHANNEL MR_CTL_SET_OFFSET /**< Set channel */
#define MR_CTL_DAC_GET_CHANNEL MR_CTL_GET_OFFSET /**< Get channel */
/**
* @brief DAC data type.

8
device/i2c.h
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@@ -52,10 +52,12 @@ struct mr_i2c_config
};
/**
* @brief I2C register command.
* @brief I2C control command.
*/
#define MR_CTL_I2C_SET_REG MR_CTL_SET_OFFSET /**< Set register */
#define MR_CTL_I2C_GET_REG MR_CTL_GET_OFFSET /**< Get register */
#define MR_CTL_I2C_SET_REG MR_CTL_SET_OFFSET /**< Set register */
#define MR_CTL_I2C_SET_RD_CALL MR_CTL_SET_RD_CALL /**< Set read callback */
#define MR_CTL_I2C_GET_REG MR_CTL_GET_OFFSET /**< Get register */
#define MR_CTL_I2C_GET_RD_CALL MR_CTL_GET_RD_CALL /**< Get read callback */
/**
* @brief I2C data type.

12
device/pin.h
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@@ -43,15 +43,13 @@ extern "C" {
#define MR_PIN_MODE_IRQ_HIGH (10) /* Interrupt high level */
/**
* @brief PIN mode command.
* @brief PIN control command.
*/
#define MR_CTL_PIN_SET_MODE ((0x01|0x80) << 16) /**< Set pin mode */
/**
* @brief PIN number command.
*/
#define MR_CTL_PIN_SET_NUMBER MR_CTL_SET_OFFSET /**< Set pin number */
#define MR_CTL_PIN_GET_NUMBER MR_CTL_GET_OFFSET /**< Get pin number */
#define MR_CTL_PIN_SET_NUMBER MR_CTL_SET_OFFSET /**< Set pin number */
#define MR_CTL_PIN_SET_EXTI_CALL MR_CTL_SET_RD_CALL /**< Set pin exti callback */
#define MR_CTL_PIN_GET_NUMBER MR_CTL_GET_OFFSET /**< Get pin number */
#define MR_CTL_PIN_GET_EXTI_CALL MR_CTL_GET_RD_CALL /**< Get pin exti callback */
/**
* @brief PIN data type.

8
device/serial.h
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@@ -79,6 +79,14 @@ struct mr_serial_config
uint32_t reserved: 21;
};
/**
* @brief SERIAL control command.
*/
#define MR_CTL_SERIAL_SET_RD_CALL MR_CTL_SET_RD_CALL /**< Set read callback */
#define MR_CTL_SERIAL_SET_WR_CALL MR_CTL_SET_WR_CALL /**< Set write complete callback */
#define MR_CTL_SERIAL_GET_RD_CALL MR_CTL_GET_RD_CALL /**< Get read callback */
#define MR_CTL_SERIAL_GET_WR_CALL MR_CTL_GET_WR_CALL /**< Get write complete callback */
/**
* @brief SERIAL data type.
*/

14
device/spi.h
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@@ -78,11 +78,6 @@ struct mr_spi_config
uint32_t reserved: 16;
};
/**
* @brief SPI transfer command.
*/
#define MR_CTL_SPI_TRANSFER ((0x01|0x80) << 16) /**< Transfer */
/**
* @brief SPI transfer structure.
*/
@@ -94,10 +89,13 @@ struct mr_spi_transfer
};
/**
* @brief SPI register command.
* @brief SPI control command.
*/
#define MR_CTL_SPI_SET_REG MR_CTL_SET_OFFSET /**< Set register */
#define MR_CTL_SPI_GET_REG MR_CTL_GET_OFFSET /**< Get register */
#define MR_CTL_SPI_SET_REG MR_CTL_SET_OFFSET /**< Set register */
#define MR_CTL_SPI_TRANSFER ((0x01|0x80) << 16) /**< Transfer */
#define MR_CTL_SPI_RD_CALL MR_CTL_SET_RD_CALL /**< Set read callback */
#define MR_CTL_SPI_GET_REG MR_CTL_GET_OFFSET /**< Get register */
#define MR_CTL_SPI_GET_RD_CALL MR_CTL_GET_RD_CALL /**< Get read callback */
/**
* @brief SPI data type.

72
include/mr_def.h
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@@ -200,6 +200,42 @@ struct mr_dev;
#define MR_SYNC (0) /**< Synchronous */
#define MR_ASYNC (1) /**< Asynchronous */
/**
* @brief Magic number.
*/
#define MR_MAGIC_NUMBER (0xdeadbeef)
/**
* @brief Lock flags.
*/
#define MR_LFLAG_RD ((0x01) << 24) /**< Read lock */
#define MR_LFLAG_WR ((0x02) << 24) /**< Write lock */
#define MR_LFLAG_RDWR ((0x03) << 24) /**< Read/write lock */
#define MR_LFLAG_NONBLOCK ((0x04) << 24) /**< Non-blocking lock */
#define MR_LFLAG_SLEEP ((0x08) << 24) /**< Sleep lock */
/**
* @brief Open flags.
*/
#define MR_OFLAG_CLOSED (0) /**< Closed */
#define MR_OFLAG_RDONLY ((0x01) << 24) /**< Read only */
#define MR_OFLAG_WRONLY ((0x02) << 24) /**< Write only */
#define MR_OFLAG_RDWR ((0x03) << 24) /**< Read/write */
#define MR_OFLAG_NONBLOCK ((0x04) << 24) /**< Non-blocking */
#define MR_OFLAG_DMA ((0x08) << 24) /**< DMA */
/**
* @brief Support flags.
*/
#define MR_SFLAG_NONRDWR MR_OFLAG_CLOSED /**< Non-read/write */
#define MR_SFLAG_RDONLY MR_OFLAG_RDONLY /**< Read only */
#define MR_SFLAG_WRONLY MR_OFLAG_WRONLY /**< Write only */
#define MR_SFLAG_RDWR MR_OFLAG_RDWR /**< Read/write */
#define MR_SFLAG_NONBLOCK MR_OFLAG_NONBLOCK /**< Non-blocking */
#define MR_SFLAG_DMA MR_OFLAG_DMA /**< DMA */
#define MR_SFLAG_NONDRV ((0x10) << 24) /**< Non-driver */
#define MR_SFLAG_ONLY ((0x20) << 24) /**< Only */
/**
* @brief Descriptor control command.
*/
@@ -241,42 +277,6 @@ struct mr_dev_ops
ssize_t (*isr)(struct mr_dev *dev, int event, void *args);
};
/**
* @brief Magic number.
*/
#define MR_MAGIC_NUMBER (0xdeadbeef)
/**
* @brief Lock flags.
*/
#define MR_LFLAG_RD ((0x01) << 24) /**< Read lock */
#define MR_LFLAG_WR ((0x02) << 24) /**< Write lock */
#define MR_LFLAG_RDWR ((0x03) << 24) /**< Read/write lock */
#define MR_LFLAG_NONBLOCK ((0x04) << 24) /**< Non-blocking lock */
#define MR_LFLAG_SLEEP ((0x08) << 24) /**< Sleep lock */
/**
* @brief Open flags.
*/
#define MR_OFLAG_CLOSED (0) /**< Closed */
#define MR_OFLAG_RDONLY ((0x01) << 24) /**< Read only */
#define MR_OFLAG_WRONLY ((0x02) << 24) /**< Write only */
#define MR_OFLAG_RDWR ((0x03) << 24) /**< Read/write */
#define MR_OFLAG_NONBLOCK ((0x04) << 24) /**< Non-blocking */
#define MR_OFLAG_DMA ((0x08) << 24) /**< DMA */
/**
* @brief Support flags.
*/
#define MR_SFLAG_NONRDWR MR_OFLAG_CLOSED /**< Non-read/write */
#define MR_SFLAG_RDONLY MR_OFLAG_RDONLY /**< Read only */
#define MR_SFLAG_WRONLY MR_OFLAG_WRONLY /**< Write only */
#define MR_SFLAG_RDWR MR_OFLAG_RDWR /**< Read/write */
#define MR_SFLAG_NONBLOCK MR_OFLAG_NONBLOCK /**< Non-blocking */
#define MR_SFLAG_DMA MR_OFLAG_DMA /**< DMA */
#define MR_SFLAG_NONDRV ((0x10) << 24) /**< Non-driver */
#define MR_SFLAG_ONLY ((0x20) << 24) /**< Only */
/**
* @brief Device structure.
*/

8
include/mr_service.h
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@@ -127,6 +127,14 @@ extern "C" {
*/
#define mr_min(a, b) ({ __typeof__ (a) _a = (a); __typeof__ (b) _b = (b); _a < _b ? _a : _b; })
/**
* @brief This macro function swaps two values.
*
* @param a The first value.
* @param b The second value.
*/
#define mr_swap(a, b) (a ^= b, b ^= a, a ^= b)
/**
* @brief This macro function aligns the size up to a multiple of 4.
*