lby/mr-library
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

1.取消使用过于直接的SET_OFFSET命令，新增设备独立设置对应功能offset的宏命令。

Browse Source
This commit is contained in:
MacRsh
2023-11-25 00:35:56 +08:00
parent a637ce0a31
commit 58eae71ca1
6 changed files with 82 additions and 52 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
device/i2c.c
View File

@@ -63,7 +63,7 @@ static ssize_t mr_i2c_bus_read(struct mr_dev *dev, int off, void *buf, size_t si
if (off >= 0) if (off >= 0)
{ {
i2c_bus_send_addr(i2c_bus, MR_I2C_WR); i2c_bus_send_addr(i2c_bus, MR_I2C_WR);
ops->write(i2c_bus, (uint8_t *)&off, i2c_bus->config.off_bits); ops->write(i2c_bus, (uint8_t *)&off, i2c_bus->config.reg_bits);
} }
i2c_bus_send_addr(i2c_bus, MR_I2C_RD); i2c_bus_send_addr(i2c_bus, MR_I2C_RD);
@@ -86,7 +86,7 @@ static ssize_t mr_i2c_bus_write(struct mr_dev *dev, int off, const void *buf, si
i2c_bus_send_addr(i2c_bus, MR_I2C_WR); i2c_bus_send_addr(i2c_bus, MR_I2C_WR);
if (off >= 0) if (off >= 0)
{ {
ops->write(i2c_bus, (uint8_t *)&off, i2c_bus->config.off_bits); ops->write(i2c_bus, (uint8_t *)&off, i2c_bus->config.reg_bits);
} }
ssize_t ret = ops->write(i2c_bus, buf, size); ssize_t ret = ops->write(i2c_bus, buf, size);
@@ -164,13 +164,15 @@ static ssize_t mr_i2c_bus_isr(struct mr_dev *dev, int event, void *args)
struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)i2c_bus->owner; struct mr_i2c_dev *i2c_dev = (struct mr_i2c_dev *)i2c_bus->owner;
uint8_t data = 0; uint8_t data = 0;
/* Read data to FIFO. if callback is set, call it */
ops->read(i2c_bus, &data, sizeof(data)); ops->read(i2c_bus, &data, sizeof(data));
mr_ringbuf_push_force(&i2c_dev->rd_fifo, data); mr_ringbuf_push_force(&i2c_dev->rd_fifo, data);
if (i2c_dev->dev.rd_cb.cb != MR_NULL) if (i2c_dev->dev.rd_call.call != MR_NULL)
{ {
size_t size = (ssize_t)mr_ringbuf_get_data_size(&i2c_dev->rd_fifo); size_t size = (ssize_t)mr_ringbuf_get_data_size(&i2c_dev->rd_fifo);
i2c_dev->dev.rd_cb.cb(i2c_dev->dev.rd_cb.desc, &size); i2c_dev->dev.rd_call.call(i2c_dev->dev.rd_call.desc, &size);
} }
return (ssize_t)mr_ringbuf_get_data_size(&i2c_dev->rd_fifo); return (ssize_t)mr_ringbuf_get_data_size(&i2c_dev->rd_fifo);
} }
@@ -436,10 +438,10 @@ int mr_i2c_dev_register(struct mr_i2c_dev *i2c_dev, const char *name, int addr,
/* Initialize the fields */ /* Initialize the fields */
i2c_dev->config = default_config; i2c_dev->config = default_config;
mr_ringbuf_init(&i2c_dev->rd_fifo, MR_NULL, 0); mr_ringbuf_init(&i2c_dev->rd_fifo, MR_NULL, 0);
#ifndef MR_CFG_I2C_RD_BUFSZ_INIT #ifndef MR_CFG_I2C_RD_BUFSZ
#define MR_CFG_I2C_RD_BUFSZ_INIT (0) #define MR_CFG_I2C_RD_BUFSZ (0)
#endif /* MR_CFG_I2C_RD_BUFSZ_INIT */ #endif /* MR_CFG_I2C_RD_BUFSZ */
i2c_dev->rd_bufsz = MR_CFG_I2C_RD_BUFSZ_INIT; i2c_dev->rd_bufsz = MR_CFG_I2C_RD_BUFSZ;
i2c_dev->addr = (addr_bits == MR_I2C_ADDR_BITS_7) ? addr : ((0xf0 | ((addr >> 7) & 0x06)) << 8) | (addr & 0xff); i2c_dev->addr = (addr_bits == MR_I2C_ADDR_BITS_7) ? addr : ((0xf0 | ((addr >> 7) & 0x06)) << 8) | (addr & 0xff);
i2c_dev->addr_bits = addr_bits; i2c_dev->addr_bits = addr_bits;

68
device/spi.c
View File

@@ -10,11 +10,11 @@
#ifdef MR_USING_SPI #ifdef MR_USING_SPI
#ifdef MR_USING_GPIO #ifdef MR_USING_PIN
#include "include/device/gpio.h" #include "include/device/pin.h"
#else #else
#warning "Please define MR_USING_GPIO. Otherwise SPI-CS will not work." #warning "Please define MR_USING_PIN. Otherwise SPI-CS will not work."
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
#define MR_SPI_RD (0) #define MR_SPI_RD (0)
#define MR_SPI_WR (1) #define MR_SPI_WR (1)
@@ -200,7 +200,7 @@ static ssize_t mr_spi_bus_read(struct mr_dev *dev, int off, void *buf, size_t si
if (off >= 0) if (off >= 0)
{ {
spi_bus_transfer(spi_bus, MR_NULL, buf, (spi_bus->config.off_bits >> 3), MR_SPI_WR); spi_bus_transfer(spi_bus, MR_NULL, buf, (spi_bus->config.reg_bits >> 3), MR_SPI_WR);
} }
return spi_bus_transfer(spi_bus, buf, MR_NULL, size, MR_SPI_RD); return spi_bus_transfer(spi_bus, buf, MR_NULL, size, MR_SPI_RD);
} }
@@ -211,7 +211,7 @@ static ssize_t mr_spi_bus_write(struct mr_dev *dev, int off, const void *buf, si
if (off >= 0) if (off >= 0)
{ {
spi_bus_transfer(spi_bus, MR_NULL, buf, (spi_bus->config.off_bits >> 3), MR_SPI_WR); spi_bus_transfer(spi_bus, MR_NULL, buf, (spi_bus->config.reg_bits >> 3), MR_SPI_WR);
} }
return spi_bus_transfer(spi_bus, MR_NULL, buf, size, MR_SPI_WR); return spi_bus_transfer(spi_bus, MR_NULL, buf, size, MR_SPI_WR);
} }
@@ -294,9 +294,10 @@ static ssize_t mr_spi_bus_isr(struct mr_dev *dev, int event, void *args)
case MR_ISR_EVENT_RD_INTER: case MR_ISR_EVENT_RD_INTER:
{ {
struct mr_spi_dev *spi_dev = (struct mr_spi_dev *)spi_bus->owner; struct mr_spi_dev *spi_dev = (struct mr_spi_dev *)spi_bus->owner;
uint32_t data = ops->read(spi_bus); uint32_t data = ops->read(spi_bus);
#ifdef MR_USING_GPIO
/* Check if CS is active */
#ifdef MR_USING_PIN
if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE) if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE)
{ {
uint8_t level = !spi_dev->cs_active; uint8_t level = !spi_dev->cs_active;
@@ -306,13 +307,16 @@ static ssize_t mr_spi_bus_isr(struct mr_dev *dev, int event, void *args)
return MR_ENOTSUP; return MR_ENOTSUP;
} }
} }
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
/* Read data to FIFO. if callback is set, call it */
mr_ringbuf_write_force(&spi_dev->rd_fifo, &data, (spi_bus->config.data_bits >> 3)); mr_ringbuf_write_force(&spi_dev->rd_fifo, &data, (spi_bus->config.data_bits >> 3));
if (spi_dev->dev.rd_cb.cb != MR_NULL) if (spi_dev->dev.rd_call.call != MR_NULL)
{ {
size_t size = (ssize_t)mr_ringbuf_get_data_size(&spi_dev->rd_fifo); size_t size = (ssize_t)mr_ringbuf_get_data_size(&spi_dev->rd_fifo);
spi_dev->dev.rd_cb.cb(spi_dev->dev.rd_cb.desc, &size); spi_dev->dev.rd_call.call(spi_dev->dev.rd_call.desc, &size);
} }
return (ssize_t)mr_ringbuf_get_data_size(&spi_dev->rd_fifo); return (ssize_t)mr_ringbuf_get_data_size(&spi_dev->rd_fifo);
} }
@@ -358,7 +362,7 @@ int mr_spi_bus_register(struct mr_spi_bus *spi_bus, const char *name, struct mr_
return mr_dev_register(&spi_bus->dev, name, Mr_Dev_Type_Spi, MR_SFLAG_RDWR, &ops, drv); return mr_dev_register(&spi_bus->dev, name, Mr_Dev_Type_Spi, MR_SFLAG_RDWR, &ops, drv);
} }
#ifdef MR_USING_GPIO #ifdef MR_USING_PIN
static void spi_dev_cs_configure(struct mr_spi_dev *spi_dev, int state) static void spi_dev_cs_configure(struct mr_spi_dev *spi_dev, int state)
{ {
int desc = spi_dev->cs_desc; int desc = spi_dev->cs_desc;
@@ -369,34 +373,34 @@ static void spi_dev_cs_configure(struct mr_spi_dev *spi_dev, int state)
if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE) if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE)
{ {
mr_dev_ioctl(desc, MR_CTRL_SET_OFFSET, mr_make_local(int, spi_dev->cs_pin)); mr_dev_ioctl(desc, MR_CTRL_PIN_SET_NUMBER, mr_make_local(int, spi_dev->cs_pin));
if (state == MR_ENABLE) if (state == MR_ENABLE)
{ {
int mode = MR_GPIO_MODE_NONE; int mode = MR_PIN_MODE_NONE;
if (spi_dev->config.host_slave == MR_SPI_HOST) if (spi_dev->config.host_slave == MR_SPI_HOST)
{ {
mode = MR_GPIO_MODE_OUTPUT; mode = MR_PIN_MODE_OUTPUT;
} else } else
{ {
if (spi_dev->cs_active == MR_SPI_CS_ACTIVE_LOW) if (spi_dev->cs_active == MR_SPI_CS_ACTIVE_LOW)
{ {
mode = MR_GPIO_MODE_INPUT_UP; mode = MR_PIN_MODE_INPUT_UP;
} else } else
{ {
mode = MR_GPIO_MODE_INPUT_DOWN; mode = MR_PIN_MODE_INPUT_DOWN;
} }
} }
mr_dev_ioctl(desc, MR_CTRL_GPIO_SET_PIN_MODE, &mode); mr_dev_ioctl(desc, MR_CTRL_PIN_SET_PIN_MODE, &mode);
mr_dev_write(desc, mr_make_local(uint8_t, !spi_dev->cs_active), sizeof(uint8_t)); mr_dev_write(desc, mr_make_local(uint8_t, !spi_dev->cs_active), sizeof(uint8_t));
} else } else
{ {
mr_dev_ioctl(desc, MR_CTRL_GPIO_SET_PIN_MODE, mr_make_local(int, MR_GPIO_MODE_NONE)); mr_dev_ioctl(desc, MR_CTRL_PIN_SET_PIN_MODE, mr_make_local(int, MR_PIN_MODE_NONE));
} }
} }
} }
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
MR_INLINE int spi_dev_take_bus(struct mr_spi_dev *spi_dev) MR_INLINE int spi_dev_take_bus(struct mr_spi_dev *spi_dev)
{ {
@@ -448,25 +452,25 @@ MR_INLINE int spi_dev_release_bus(struct mr_spi_dev *spi_dev)
MR_INLINE void spi_dev_cs_set(struct mr_spi_dev *spi_dev, int state) MR_INLINE void spi_dev_cs_set(struct mr_spi_dev *spi_dev, int state)
{ {
#ifdef MR_USING_GPIO #ifdef MR_USING_PIN
if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE) if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE)
{ {
mr_dev_write(spi_dev->cs_desc, mr_make_local(uint8_t, !(state ^ spi_dev->cs_active)), sizeof(uint8_t)); mr_dev_write(spi_dev->cs_desc, mr_make_local(uint8_t, !(state ^ spi_dev->cs_active)), sizeof(uint8_t));
} }
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
} }
static int mr_spi_dev_open(struct mr_dev *dev) static int mr_spi_dev_open(struct mr_dev *dev)
{ {
struct mr_spi_dev *spi_dev = (struct mr_spi_dev *)dev; struct mr_spi_dev *spi_dev = (struct mr_spi_dev *)dev;
#ifdef MR_USING_GPIO #ifdef MR_USING_PIN
if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE) if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE)
{ {
spi_dev->cs_desc = mr_dev_open("gpio", MR_OFLAG_RDWR); spi_dev->cs_desc = mr_dev_open("gpio", MR_OFLAG_RDWR);
spi_dev_cs_configure(spi_dev, MR_ENABLE); spi_dev_cs_configure(spi_dev, MR_ENABLE);
} }
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
/* Allocate FIFO buffers */ /* Allocate FIFO buffers */
return mr_ringbuf_allocate(&spi_dev->rd_fifo, spi_dev->rd_bufsz); return mr_ringbuf_allocate(&spi_dev->rd_fifo, spi_dev->rd_bufsz);
@@ -476,14 +480,14 @@ static int mr_spi_dev_close(struct mr_dev *dev)
{ {
struct mr_spi_dev *spi_dev = (struct mr_spi_dev *)dev; struct mr_spi_dev *spi_dev = (struct mr_spi_dev *)dev;
#ifdef MR_USING_GPIO #ifdef MR_USING_PIN
if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE) if (spi_dev->cs_active != MR_SPI_CS_ACTIVE_NONE)
{ {
spi_dev_cs_configure(spi_dev, MR_DISABLE); spi_dev_cs_configure(spi_dev, MR_DISABLE);
mr_dev_close(spi_dev->cs_desc); mr_dev_close(spi_dev->cs_desc);
spi_dev->cs_desc = -1; spi_dev->cs_desc = -1;
} }
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
/* Free FIFO buffers */ /* Free FIFO buffers */
mr_ringbuf_free(&spi_dev->rd_fifo); mr_ringbuf_free(&spi_dev->rd_fifo);
@@ -557,13 +561,13 @@ static int mr_spi_dev_ioctl(struct mr_dev *dev, int off, int cmd, void *args)
struct mr_spi_bus *spi_bus = (struct mr_spi_bus *)dev->link; struct mr_spi_bus *spi_bus = (struct mr_spi_bus *)dev->link;
struct mr_spi_config config = *(struct mr_spi_config *)args; struct mr_spi_config config = *(struct mr_spi_config *)args;
#ifdef MR_USING_GPIO #ifdef MR_USING_PIN
/* Reconfigure CS */ /* Reconfigure CS */
if (config.host_slave != spi_dev->config.host_slave) if (config.host_slave != spi_dev->config.host_slave)
{ {
spi_dev_cs_configure(spi_dev, MR_ENABLE); spi_dev_cs_configure(spi_dev, MR_ENABLE);
} }
#endif /* MR_USING_GPIO */ #endif /* MR_USING_PIN */
/* Release the bus */ /* Release the bus */
if (spi_dev == spi_bus->owner) if (spi_dev == spi_bus->owner)
{ {
@@ -694,10 +698,10 @@ int mr_spi_dev_register(struct mr_spi_dev *spi_dev, const char *name, int cs_pin
/* Initialize the fields */ /* Initialize the fields */
spi_dev->config = default_config; spi_dev->config = default_config;
mr_ringbuf_init(&spi_dev->rd_fifo, MR_NULL, 0); mr_ringbuf_init(&spi_dev->rd_fifo, MR_NULL, 0);
#ifndef MR_CFG_SPI_RD_BUFSZ_INIT #ifndef MR_CFG_SPI_RD_BUFSZ
#define MR_CFG_SPI_RD_BUFSZ_INIT (0) #define MR_CFG_SPI_RD_BUFSZ (0)
#endif /* MR_CFG_SPI_RD_BUFSZ_INIT */ #endif /* MR_CFG_SPI_RD_BUFSZ */
spi_dev->rd_bufsz = MR_CFG_SPI_RD_BUFSZ_INIT; spi_dev->rd_bufsz = MR_CFG_SPI_RD_BUFSZ;
spi_dev->cs_pin = cs_pin; spi_dev->cs_pin = cs_pin;
spi_dev->cs_active = (cs_pin >= 0) ? cs_active : MR_SPI_CS_ACTIVE_NONE; spi_dev->cs_active = (cs_pin >= 0) ? cs_active : MR_SPI_CS_ACTIVE_NONE;
spi_dev->cs_desc = -1; spi_dev->cs_desc = -1;

6
include/device/adc.h
View File

@@ -29,6 +29,12 @@ extern "C" {
#define MR_CTRL_ADC_SET_CHANNEL_STATE ((0x01|0x80) << 16) /**< Set channel state */ #define MR_CTRL_ADC_SET_CHANNEL_STATE ((0x01|0x80) << 16) /**< Set channel state */
#define MR_CTRL_ADC_GET_CHANNEL_STATE ((0x01|0x00) << 16) /**< Get channel state */ #define MR_CTRL_ADC_GET_CHANNEL_STATE ((0x01|0x00) << 16) /**< Get channel state */
/**
* @brief ADC channel command.
*/
#define MR_CTRL_ADC_SET_CHANNEL MR_CTRL_SET_OFFSET /**< Set channel */
#define MR_CTRL_ADC_GET_CHANNEL MR_CTRL_GET_OFFSET /**< Get channel */
/** /**
* @brief ADC data type. * @brief ADC data type.
*/ */

6
include/device/dac.h
View File

@@ -29,6 +29,12 @@ extern "C" {
#define MR_CTRL_DAC_SET_CHANNEL_STATE ((0x01|0x80) << 16) /**< Set channel state */ #define MR_CTRL_DAC_SET_CHANNEL_STATE ((0x01|0x80) << 16) /**< Set channel state */
#define MR_CTRL_DAC_GET_CHANNEL_STATE ((0x01|0x00) << 16) /**< Get channel state */ #define MR_CTRL_DAC_GET_CHANNEL_STATE ((0x01|0x00) << 16) /**< Get channel state */
/**
* @brief DAC channel command.
*/
#define MR_CTRL_DAC_SET_CHANNEL MR_CTRL_SET_OFFSET /**< Set channel */
#define MR_CTRL_DAC_GET_CHANNEL MR_CTRL_GET_OFFSET /**< Get channel */
/** /**
* @brief DAC data type. * @brief DAC data type.
*/ */

18
include/device/i2c.h
View File

@@ -24,11 +24,11 @@ extern "C" {
#define MR_I2C_SLAVE (1) /**< I2C slave */ #define MR_I2C_SLAVE (1) /**< I2C slave */
/** /**
* @brief I2C offset bits. * @brief I2C register bits.
*/ */
#define MR_I2C_OFF_BITS_8 (8) /**< 8 bits offset */ #define MR_I2C_REG_BITS_8 (8) /**< 8 bits register */
#define MR_I2C_OFF_BITS_16 (16) /**< 16 bits offset */ #define MR_I2C_REG_BITS_16 (16) /**< 16 bits register */
#define MR_I2C_OFF_BITS_32 (32) /**< 32 bits offset */ #define MR_I2C_REG_BITS_32 (32) /**< 32 bits register */
/** /**
* @brief I2C default configuration. * @brief I2C default configuration.
@@ -37,7 +37,7 @@ extern "C" {
{ \ { \
100000, \ 100000, \
MR_I2C_HOST, \ MR_I2C_HOST, \
MR_I2C_OFF_BITS_8, \ MR_I2C_REG_BITS_8, \
} }
/** /**
@@ -47,10 +47,16 @@ struct mr_i2c_config
{ {
uint32_t baud_rate; /**< Baud rate */ uint32_t baud_rate; /**< Baud rate */
uint32_t host_slave: 1; /**< Host/slave */ uint32_t host_slave: 1; /**< Host/slave */
uint32_t off_bits: 6; /**< Offset bits */ uint32_t reg_bits: 6; /**< Register bits */
uint32_t reserved: 25; uint32_t reserved: 25;
}; };
/**
* @brief I2C register command.
*/
#define MR_CTRL_I2C_SET_REG MR_CTRL_SET_OFFSET /**< Set register */
#define MR_CTRL_I2C_GET_REG MR_CTRL_GET_OFFSET /**< Get register */
/** /**
* @brief I2C data type. * @brief I2C data type.
*/ */

18
include/device/spi.h
View File

@@ -45,11 +45,11 @@ extern "C" {
#define MR_SPI_BIT_ORDER_LSB (1) /**< LSB first */ #define MR_SPI_BIT_ORDER_LSB (1) /**< LSB first */
/** /**
* @brief SPI offset bits. * @brief SPI register bits.
*/ */
#define MR_SPI_OFF_BITS_8 (8) /**< 8 bits offset */ #define MR_SPI_REG_BITS_8 (8) /**< 8 bits register */
#define MR_SPI_OFF_BITS_16 (16) /**< 16 bits offset */ #define MR_SPI_REG_BITS_16 (16) /**< 16 bits register */
#define MR_SPI_OFF_BITS_32 (32) /**< 32 bits offset */ #define MR_SPI_REG_BITS_32 (32) /**< 32 bits register */
/** /**
* @brief SPI default configuration. * @brief SPI default configuration.
@@ -61,7 +61,7 @@ extern "C" {
MR_SPI_MODE_0, \ MR_SPI_MODE_0, \
MR_SPI_DATA_BITS_8, \ MR_SPI_DATA_BITS_8, \
MR_SPI_BIT_ORDER_MSB, \ MR_SPI_BIT_ORDER_MSB, \
MR_SPI_OFF_BITS_8, \ MR_SPI_REG_BITS_8, \
} }
/** /**
@@ -74,7 +74,7 @@ struct mr_spi_config
uint32_t mode: 2; /**< Mode */ uint32_t mode: 2; /**< Mode */
uint32_t data_bits: 6; /**< Data bits */ uint32_t data_bits: 6; /**< Data bits */
uint32_t bit_order: 1; /**< Bit order */ uint32_t bit_order: 1; /**< Bit order */
uint32_t off_bits: 6; /**< Offset bits */ uint32_t reg_bits: 6; /**< Register bits */
uint32_t reserved: 16; uint32_t reserved: 16;
}; };
@@ -93,6 +93,12 @@ struct mr_spi_transfer
size_t size; /**< Transfer size */ size_t size; /**< Transfer size */
}; };
/**
* @brief SPI register command.
*/
#define MR_CTRL_SPI_SET_REG MR_CTRL_SET_OFFSET /**< Set register */
#define MR_CTRL_SPI_GET_REG MR_CTRL_GET_OFFSET /**< Get register */
/** /**
* @brief SPI data type. * @brief SPI data type.
*/ */