diff --git a/include/device/mr_pwm.h b/include/device/mr_pwm.h
index 647869c..c0a5a7d 100644
--- a/include/device/mr_pwm.h
+++ b/include/device/mr_pwm.h
@@ -37,11 +37,11 @@ struct mr_pwm_config
  */
 #define MR_CTL_PWM_SET_CHANNEL          MR_CTL_SET_OFFSET           /**< Set channel */
 #define MR_CTL_PWM_SET_CHANNEL_CONFIG   MR_CTL_SET_CONFIG           /**< Set channel config */
-#define MR_CTL_PWM_SET_FREQ             (0x01 << 8)                 /**< Set frequency */
+#define MR_CTL_PWM_SET_FREQ             (0x01)                      /**< Set frequency */
 
 #define MR_CTL_PWM_GET_CHANNEL          MR_CTL_GET_OFFSET           /**< Get channel */
 #define MR_CTL_PWM_GET_CHANNEL_CONFIG   MR_CTL_GET_CONFIG           /**< Get channel config */
-#define MR_CTL_PWM_GET_FREQ             (-(0x01 << 8))              /**< Get frequency */
+#define MR_CTL_PWM_GET_FREQ             (-(0x01))                   /**< Get frequency */
 
 /**
  * @brief PWM data type.
diff --git a/include/device/mr_spi.h b/include/device/mr_spi.h
index b41afc2..d779faf 100644
--- a/include/device/mr_spi.h
+++ b/include/device/mr_spi.h
@@ -95,7 +95,7 @@ struct mr_spi_transfer
 #define MR_CTL_SPI_SET_RD_BUFSZ         MR_CTL_SET_RD_BUFSZ         /**< Set read buffer size */
 #define MR_CTL_SPI_CLR_RD_BUF           MR_CTL_CLR_RD_BUF           /**< Clear read buffer */
 #define MR_CTL_SPI_SET_RD_CALL          MR_CTL_SET_RD_CALL          /**< Set read callback */
-#define MR_CTL_SPI_TRANSFER             (0x01 << 8)                 /**< Transfer */
+#define MR_CTL_SPI_TRANSFER             (0x01)                      /**< Transfer */
 
 #define MR_CTL_SPI_GET_CONFIG           MR_CTL_GET_CONFIG           /**< Get configuration */
 #define MR_CTL_SPI_GET_REG              MR_CTL_GET_OFFSET           /**< Get register */
diff --git a/include/mr_def.h b/include/mr_def.h
index 6c1dd0f..9ef3d8b 100644
--- a/include/mr_def.h
+++ b/include/mr_def.h
@@ -200,29 +200,32 @@ struct mr_avl
 #define MR_SFLAG_ONLY                   (0x20)                      /**< Only */
 
 /**
- * @brief Descriptor control command.
+ * @brief Device control command.
+ *
+ * @note [31:24] are for basic commands, [23:0] can define custom commands.
+ *       (> 0) is set command, (< 0) is get command.
  */
-#define MR_CTL_SET_OFFSET               (0x02)                      /**< Set offset */
-#define MR_CTL_SET_RD_CALL              (0x06)                      /**< Set read callback */
-#define MR_CTL_SET_WR_CALL              (0x07)                      /**< Set write callback */
-#define MR_CTL_SET_CONFIG               (0x08)                      /**< Set configuration */
-#define MR_CTL_SET_RD_BUFSZ             (0x09)                      /**< Set read buffer size */
-#define MR_CTL_SET_WR_BUFSZ             (0x0a)                      /**< Set write buffer size */
-#define MR_CTL_CLR_RD_BUF               (0x0b)                      /**< Clear read buffer */
-#define MR_CTL_CLR_WR_BUF               (0x0c)                      /**< Clear write buffer */
+#define MR_CTL_SET_OFFSET               (0x02 << 24)                /**< Set offset */
+#define MR_CTL_SET_RD_CALL              (0x06 << 24)                /**< Set read callback */
+#define MR_CTL_SET_WR_CALL              (0x07 << 24)                /**< Set write callback */
+#define MR_CTL_SET_CONFIG               (0x08 << 24)                /**< Set configuration */
+#define MR_CTL_SET_RD_BUFSZ             (0x09 << 24)                /**< Set read buffer size */
+#define MR_CTL_SET_WR_BUFSZ             (0x0a << 24)                /**< Set write buffer size */
+#define MR_CTL_CLR_RD_BUF               (0x0b << 24)                /**< Clear read buffer */
+#define MR_CTL_CLR_WR_BUF               (0x0c << 24)                /**< Clear write buffer */
 
-#define MR_CTL_GET_OFLAGS               (-(0x01))                   /**< Get open flags */
-#define MR_CTL_GET_OFFSET               (-(0x02))                   /**< Get offset */
-#define MR_CTL_GET_SFLAGS               (-(0x03))                   /**< Get support flags */
-#define MR_CTL_GET_PATH                 (-(0x04))                   /**< Get path */
-#define MR_CTL_GET_NAME                 (-(0x05))                   /**< Get name */
-#define MR_CTL_GET_RD_CALL              (-(0x06))                   /**< Get read callback */
-#define MR_CTL_GET_WR_CALL              (-(0x07))                   /**< Get write callback */
-#define MR_CTL_GET_CONFIG               (-(0x08))                   /**< Get configuration */
-#define MR_CTL_GET_RD_BUFSZ             (-(0x09))                   /**< Get read buffer size */
-#define MR_CTL_GET_WR_BUFSZ             (-(0x0a))                   /**< Get write buffer size */
-#define MR_CTL_GET_RD_DATASZ            (-(0x0b))                   /**< Get read data size */
-#define MR_CTL_GET_WR_DATASZ            (-(0x0c))                   /**< Get write data size */
+#define MR_CTL_GET_OFLAGS               (-(0x01 << 24))             /**< Get open flags */
+#define MR_CTL_GET_OFFSET               (-(0x02 << 24))             /**< Get offset */
+#define MR_CTL_GET_SFLAGS               (-(0x03 << 24))             /**< Get support flags */
+#define MR_CTL_GET_PATH                 (-(0x04 << 24))             /**< Get path */
+#define MR_CTL_GET_NAME                 (-(0x05 << 24))             /**< Get name */
+#define MR_CTL_GET_RD_CALL              (-(0x06 << 24))             /**< Get read callback */
+#define MR_CTL_GET_WR_CALL              (-(0x07 << 24))             /**< Get write callback */
+#define MR_CTL_GET_CONFIG               (-(0x08 << 24))             /**< Get configuration */
+#define MR_CTL_GET_RD_BUFSZ             (-(0x09 << 24))             /**< Get read buffer size */
+#define MR_CTL_GET_WR_BUFSZ             (-(0x0a << 24))             /**< Get write buffer size */
+#define MR_CTL_GET_RD_DATASZ            (-(0x0b << 24))             /**< Get read data size */
+#define MR_CTL_GET_WR_DATASZ            (-(0x0c << 24))             /**< Get write data size */
 
 /**
  * @brief ISR event.