1.新增I2C对10位地址模式的支持。

2023-11-14 01:59:52 +08:00
parent af87e4fb6a
commit 400defd26a
9 changed files with 252 additions and 40 deletions
--- a/bsp/wch/ch32v30x/drv_i2c.c
+++ b/bsp/wch/ch32v30x/drv_i2c.c
@@ -0,0 +1,169 @@
+/*
+ * @copyright (c) 2023, MR Development Team
+ *
+ * @license SPDX-License-Identifier: Apache-2.0
+ *
+ * @date 2023-11-13    MacRsh       First version
+ */
+
+#include "drv_i2c.h"
+
+#ifdef MR_USING_I2C
+
+enum drv_i2c_index
+{
+#ifdef MR_USING_I2C1
+    DRV_INDEX_I2C1,
+#endif /* MR_USING_I2C1 */
+#ifdef MR_USING_I2C2
+    DRV_INDEX_I2C2,
+#endif /* MR_USING_I2C2 */
+};
+
+static const char *i2c_name[] =
+    {
+#ifdef MR_USING_I2C1
+        "i2c1",
+#endif /* MR_USING_I2C1 */
+#ifdef MR_USING_I2C2
+        "i2c2",
+#endif /* MR_USING_I2C2 */
+    };
+
+static struct drv_i2c_bus_data i2c_bus_drv_data[] =
+    {
+#ifdef MR_USING_I2C1
+#if (MR_CFG_I2C1_GROUP == 1)
+        {
+            I2C1,
+            RCC_APB1Periph_I2C1,
+            RCC_APB2Periph_GPIOB,
+            GPIOB,
+            GPIO_Pin_6,
+            GPIOB,
+            GPIO_Pin_7,
+            I2C1_IRQn,
+            0
+        },
+#elif (MR_CFG_I2C1_GROUP == 2)
+        {
+            I2C1,
+            RCC_APB1Periph_I2C1,
+            RCC_APB2Periph_GPIOB,
+            GPIOB,
+            GPIO_Pin_8,
+            GPIOB,
+            GPIO_Pin_9,
+            I2C1_IRQn,
+            GPIO_Remap_I2C1
+        },
+#else
+#error "MR_CFG_I2C1_GROUP is not defined or defined incorrectly (support values: 1, 2)."
+#endif /* MR_CFG_I2C1_GROUP */
+#endif /* MR_USING_I2C1 */
+#ifdef MR_USING_I2C2
+#if (MR_CFG_I2C2_GROUP == 1)
+        {
+            I2C2,
+            RCC_APB1Periph_I2C2,
+            RCC_APB2Periph_GPIOB,
+            GPIOB,
+            GPIO_Pin_10,
+            GPIOB,
+            GPIO_Pin_11,
+            I2C2_IRQn,
+            0
+        }
+#else
+#error "MR_CFG_I2C2_GROUP is not defined or defined incorrectly (support values: 1)."
+#endif /* MR_CFG_I2C2_GROUP */
+#endif /* MR_USING_I2C2 */
+    };
+
+static struct mr_i2c_bus i2c_bus_dev[mr_array_num(i2c_bus_drv_data)];
+
+static int drv_i2c_bus_configure(struct mr_i2c_bus *i2c_bus, struct mr_i2c_config *config, int addr, int addr_bits)
+{
+    struct drv_i2c_bus_data *i2c_bus_data = (struct drv_i2c_bus_data *)i2c_bus->dev.drv->data;
+    int state = (config->baud_rate == 0) ? DISABLE : ENABLE;
+    GPIO_InitTypeDef GPIO_InitStructure = {0};
+    I2C_InitTypeDef I2C_InitStructure = {0};
+
+    RCC_APB2PeriphClockCmd(i2c_bus_data->gpio_clock, ENABLE);
+    RCC_APB2PeriphClockCmd(i2c_bus_data->clock, state);
+
+    /* Configure remap */
+    if (i2c_bus_data->remap != 0)
+    {
+        RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
+        GPIO_PinRemapConfig(i2c_bus_data->remap, state);
+    }
+
+    if (state == ENABLE)
+    {
+        GPIO_InitStructure.GPIO_Pin = i2c_bus_data->scl_pin;
+        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
+        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+        GPIO_Init(i2c_bus_data->scl_port, &GPIO_InitStructure);
+
+        GPIO_InitStructure.GPIO_Pin = i2c_bus_data->sda_pin;
+        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
+        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+        GPIO_Init(i2c_bus_data->sda_port, &GPIO_InitStructure);
+
+        switch (addr_bits)
+        {
+            case MR_I2C_ADDR_BITS_7:
+            {
+                I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
+                break;
+            }
+
+            case MR_I2C_ADDR_BITS_10:
+            {
+                I2C_InitStruct.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_10bit;
+                break;
+            }
+
+            default:
+            {
+                return MR_EINVAL;
+            }
+        }
+    } else
+    {
+        GPIO_InitStructure.GPIO_Pin = i2c_bus_data->scl_pin;
+        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+        GPIO_Init(i2c_bus_data->scl_port, &GPIO_InitStructure);
+
+        GPIO_InitStructure.GPIO_Pin = i2c_bus_data->sda_pin;
+        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+        GPIO_Init(i2c_bus_data->sda_port, &GPIO_InitStructure);
+    }
+    if (config->host_slave == MR_I2C_HOST)
+    {
+        I2C_AcknowledgeConfig(i2c_bus_data->instance, state);
+    } else
+    {
+        I2C_AcknowledgeConfig(i2c_bus_data->instance, DISABLE);
+    }
+
+    /* Configure NVIC */
+    NVIC_InitStructure.NVIC_IRQChannel = i2c_bus_data->irq;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = state;
+    NVIC_Init(&NVIC_InitStructure);
+
+    /* Configure I2C */
+    I2C_InitStructure.I2C_ClockSpeed = config->baud_rate;
+    I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
+    I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_16_9;
+    I2C_InitStructure.I2C_OwnAddress1 = addr;
+    I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
+    I2C_Init(i2c_bus_data->instance, &I2C_InitStructure);
+    I2C_Cmd(i2c_bus_data->instance, state);
+    return MR_EOK;
+}
+
+#endif /* MR_USING_I2C */
--- a/bsp/wch/ch32v30x/drv_i2c.h
+++ b/bsp/wch/ch32v30x/drv_i2c.h
@@ -0,0 +1,39 @@
+/*
+ * @copyright (c) 2023, MR Development Team
+ *
+ * @license SPDX-License-Identifier: Apache-2.0
+ *
+ * @date 2023-11-13    MacRsh       First version
+ */
+
+#ifndef _DRV_I2C_H_
+#define _DRV_I2C_H_
+
+#include "i2c.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#ifdef MR_USING_I2C
+
+struct drv_i2c_bus_data
+{
+    I2C_TypeDef *instance;
+    uint32_t clock;
+    uint32_t gpio_clock;
+    GPIO_TypeDef *scl_port;
+    uint32_t sda_pin;
+    GPIO_TypeDef *sda_port;
+    uint32_t scl_pin;
+    IRQn_Type irq;
+    uint32_t remap;
+};
+
+#endif /* MR_USING_I2C */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* _DRV_I2C_H_ */
--- a/bsp/wch/ch32v30x/drv_spi.c
+++ b/bsp/wch/ch32v30x/drv_spi.c
@@ -14,7 +14,7 @@
 #error "Please define at least one SPI macro like MR_USING_SPI1. Otherwise undefine MR_USING_GPIO."
 #endif

-enum spi_drv_index
+enum drv_spi_bus_index
 {
 #ifdef MR_USING_SPI1
    DRV_INDEX_SPI1,
@@ -43,7 +43,7 @@ static const char *spi_bus_name[] =
 static struct drv_spi_bus_data spi_bus_drv_data[] =
    {
 #ifdef MR_USING_SPI1
-        #if (MR_CFG_SPI1_GROUP == 1)
+#if (MR_CFG_SPI1_GROUP == 1)
        {
            SPI1,
            RCC_APB2Periph_SPI1,
@@ -76,7 +76,7 @@ static struct drv_spi_bus_data spi_bus_drv_data[] =
 #endif /* MR_CFG_SPI1_GROUP */
 #endif /* MR_USING_SPI1 */
 #ifdef MR_USING_SPI2
-        #if (MR_CFG_SPI2_GROUP == 1)
+#if (MR_CFG_SPI2_GROUP == 1)
        {
            SPI2,
            RCC_APB1Periph_SPI2,
@@ -95,7 +95,7 @@ static struct drv_spi_bus_data spi_bus_drv_data[] =
 #endif /* MR_CFG_SPI2_GROUP */
 #endif /* MR_USING_SPI2 */
 #ifdef MR_USING_SPI3
-        #if (MR_CFG_SPI3_GROUP == 1)
+#if (MR_CFG_SPI3_GROUP == 1)
        {
            SPI3,
            RCC_APB1Periph_SPI3,
@@ -451,7 +451,7 @@ static struct mr_drv spi_bus_drv[mr_array_num(spi_bus_drv_data)] =

 int drv_spi_bus_init(void)
 {
-    int index = 0 ;
+    int index = 0;

    for (index = 0; index < mr_array_num(spi_bus_dev); index++)
    {
--- a/bsp/wch/ch32v30x/drv_spi.h
+++ b/bsp/wch/ch32v30x/drv_spi.h
@@ -38,5 +38,4 @@ struct drv_spi_bus_data
 }
 #endif /* __cplusplus */

-
 #endif /* _DRV_SPI_H_ */
--- a/bsp/wch/ch32v30x/drv_uart.c
+++ b/bsp/wch/ch32v30x/drv_uart.c
@@ -14,7 +14,7 @@
 #error "Please define at least one UART macro like MR_USING_UART1. Otherwise undefine MR_USING_UART."
 #endif

-enum uart_drv_index
+enum drv_uart_index
 {
 #ifdef MR_USING_UART1
    DRV_INDEX_UART1,
--- a/bsp/wch/ch32v30x/mr_board.h
+++ b/bsp/wch/ch32v30x/mr_board.h
@@ -46,6 +46,11 @@ extern "C" {
 #define MR_USING_SPI3
 #define MR_CFG_SPI3_GROUP               1

+#define MR_USING_I2C1
+#define MR_CFG_I2C1_GROUP               1
+#define MR_USING_I2C2
+#define MR_CFG_I2C2_GROUP               1
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */