更新
This commit is contained in:
2
LICENSE
2
LICENSE
@@ -42,7 +42,7 @@
|
||||
editorial revisions, annotations, elaborations, or other modifications
|
||||
represent, as a whole, an original work of authorship. For the purposes
|
||||
of this License, Derivative Works shall not include works that remain
|
||||
separable from, or merely link (or bind by name) to the interfaces of,
|
||||
separable from, or merely test_link (or bind by name) to the interfaces of,
|
||||
the Work and Derivative Works thereof.
|
||||
|
||||
"Contribution" shall mean any work of authorship, including
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||||
|
||||
272
device/serial.c
272
device/serial.c
@@ -1,272 +0,0 @@
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||||
/*
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||||
* Copyright (c), mr-library Development Team
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||||
*
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||||
* SPDX-License-Identifier: Apache-2.0
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||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
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||||
* 2023-03-09 MacRsh first version
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||||
*/
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||||
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||||
#include "serial.h"
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mr_err_t mr_serial_init(mr_serial_t serial, struct mr_serial_config *config)
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{
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mr_err_t error_code = MR_ERR_OK;
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struct mr_serial_fifo *fifo = MR_NULL;
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/* Check that the fifo has been allocated */
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if (serial->rx_fifo != MR_NULL || serial->tx_fifo != MR_NULL)
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return -MR_ERR_GENERIC;
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if (config->fifo_size != 0)
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{
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if (config->fifo_size < MR_SERIAL_FIFO_MIN_SIZE)
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config->fifo_size = MR_SERIAL_FIFO_MIN_SIZE;
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/* Allocation the rx-fifo memory */
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fifo = (struct mr_serial_fifo *) mr_malloc(sizeof(struct mr_serial_fifo *) + config->fifo_size);
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if (fifo == MR_NULL)
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return -MR_ERR_NO_MEMORY;
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mr_ringbuffer_init(&fifo->ringbuffer, fifo->pool, config->fifo_size);
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serial->rx_fifo = fifo;
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fifo = MR_NULL;
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/* Allocation the tx-fifo memory */
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fifo = (struct mr_serial_fifo *) mr_malloc(sizeof(struct mr_serial_fifo *) + config->fifo_size);
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if (fifo == MR_NULL)
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return -MR_ERR_NO_MEMORY;
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mr_ringbuffer_init(&fifo->ringbuffer, fifo->pool, config->fifo_size);
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serial->tx_fifo = fifo;
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fifo = MR_NULL;
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}
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/* Initialize the underlying hardware */
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if (serial->ops->configure != MR_NULL)
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{
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error_code = serial->ops->configure(serial, config);
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if (error_code != MR_ERR_OK)
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return error_code;
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serial->config = *config;
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return MR_ERR_OK;
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} else
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return -MR_ERR_IO;
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}
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mr_err_t mr_serial_uninit(mr_serial_t serial)
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{
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struct mr_serial_fifo *fifo = MR_NULL;
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if (serial->config.fifo_size != 0)
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{
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/* Check that the fifo has been allocated */
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if (serial->rx_fifo == MR_NULL || serial->tx_fifo == MR_NULL)
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return -MR_ERR_GENERIC;
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/* Release the rx-fifo memory */
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fifo = (struct mr_serial_fifo *) serial->rx_fifo;
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mr_free(fifo);
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serial->rx_fifo = MR_NULL;
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/* Release the tx-fifo memory */
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fifo = (struct mr_serial_fifo *) serial->tx_fifo;
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mr_free(fifo);
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serial->tx_fifo = MR_NULL;
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}
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/* Uninitialize the underlying hardware */
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if (serial->ops->configure != MR_NULL)
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{
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serial->config.baud_rate = 0;
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return serial->ops->configure(serial, &serial->config);
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} else
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return -MR_ERR_IO;
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}
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mr_size_t mr_serial_write(mr_serial_t serial, const mr_uint8_t *buffer, mr_size_t count)
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{
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mr_size_t send_count = count;
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if (serial->ops->write_byte != MR_NULL)
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{
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while (send_count--)
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{
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serial->ops->write_byte(serial, *buffer);
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buffer++;
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}
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return count;
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} else
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{
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// MR_LOG_E();
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return 0;
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}
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}
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mr_size_t mr_serial_write_byte(mr_serial_t serial, mr_uint8_t data)
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{
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if (serial->ops->write_byte != MR_NULL)
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{
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serial->ops->write_byte(serial, data);
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return 1;
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} else
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{
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// MR_LOG_E();
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return 0;
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}
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}
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mr_size_t mr_serial_read(mr_serial_t serial, mr_uint8_t *buffer, mr_size_t count)
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{
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struct mr_serial_fifo *fifo = MR_NULL;
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mr_size_t recv_count;
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if (serial->config.fifo_size != 0)
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{
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fifo = (struct mr_serial_fifo *) serial->rx_fifo;
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do
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{
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recv_count = mr_ringbuffer_get_data_length(&fifo->ringbuffer);
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} while (recv_count < count);
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return mr_ringbuffer_read(&fifo->ringbuffer, buffer, count);
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} else
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return 0;
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}
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mr_size_t mr_serial_read_byte(mr_serial_t serial, mr_uint8_t *data)
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{
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struct mr_serial_fifo *fifo = MR_NULL;
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mr_size_t recv_count;
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if (serial->config.fifo_size != 0)
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{
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fifo = (struct mr_serial_fifo *) serial->rx_fifo;
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do
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{
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recv_count = mr_ringbuffer_get_data_length(&fifo->ringbuffer);
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} while (recv_count < 1);
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return mr_ringbuffer_read_byte(&fifo->ringbuffer, data);
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} else
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return 0;
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}
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static mr_err_t mr_device_serial_open(mr_device_t device)
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{
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mr_serial_t serial = (mr_serial_t) device;
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return mr_serial_init(serial, &serial->config);
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}
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static mr_err_t mr_device_serial_close(mr_device_t device)
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{
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mr_serial_t serial = (mr_serial_t) device;
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return mr_serial_uninit(serial);
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}
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static mr_err_t mr_device_serial_ioctl(mr_device_t device, int cmd, void *args)
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{
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mr_serial_t serial = (mr_serial_t) device;
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struct mr_serial_config config = serial->config;
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switch (cmd & _MR_CMD_MASK)
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{
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case MR_CMD_CONFIG:
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||||
{
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config = *(struct mr_serial_config *) args;
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/* The fifo size cannot be changed once the device is opened */
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if ((config.fifo_size != serial->config.fifo_size) && (device->ref_count > 0))
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return -MR_ERR_BUSY;
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else
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return mr_serial_init(serial, &config);
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}
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case MR_CMD_SET_RX_CALLBACK:
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{
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device->rx_callback = (mr_err_t (*)(mr_device_t device, void *args)) args;
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return MR_ERR_OK;
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}
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default:return -MR_ERR_UNSUPPORTED;
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}
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}
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static mr_size_t mr_device_serial_read(mr_device_t device, mr_off_t pos, void *buffer, mr_size_t count)
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{
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mr_serial_t serial = (mr_serial_t) device;
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if (count == 0) return 0;
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return mr_serial_read(serial, buffer, count);
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}
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static mr_size_t mr_device_serial_write(mr_device_t device, mr_off_t pos, const void *buffer, mr_size_t count)
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{
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mr_serial_t serial = (mr_serial_t) device;
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if (count == 0) return 0;
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return mr_serial_write(serial, buffer, count);
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}
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mr_err_t mr_serial_add_to_container(mr_serial_t serial, const char *name, struct mr_serial_ops *ops, void *data)
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{
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mr_err_t error_code = MR_ERR_OK;
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struct mr_serial_config default_config = MR_SERIAL_CONFIG_DEFAULT;
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const static struct mr_serial_ops null_ops = {MR_NULL};
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const static struct mr_device_ops device_ops =
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{
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.open = mr_device_serial_open,
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.close = mr_device_serial_close,
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.ioctl = mr_device_serial_ioctl,
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.read = mr_device_serial_read,
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.write = mr_device_serial_write,
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};
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/* Initialize the device and add the device to the container */
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mr_device_init(&serial->device, name);
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error_code = mr_device_add_to_container(&serial->device, MR_DEVICE_TYPE_SERIAL, MR_OPEN_RDWR, &device_ops, data);
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if (error_code != MR_ERR_OK)
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return error_code;
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/* Initialize the serial fields */
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serial->config = default_config;
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serial->tx_fifo = MR_NULL;
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serial->rx_fifo = MR_NULL;
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/* Set serial's operations as null_ops if ops is null */
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serial->ops = (ops == MR_NULL) ? &null_ops : ops;
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return MR_ERR_OK;
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}
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void mr_hw_serial_isr(mr_serial_t serial, mr_uint16_t event)
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{
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switch (event & _MR_SERIAL_EVENT_MASK)
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{
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case MR_SERIAL_EVENT_RX_INT:
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{
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struct mr_serial_fifo *fifo = (struct mr_serial_fifo *) serial->rx_fifo;
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mr_uint8_t data = 0;
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/* Read data into the ring buffer */
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data = serial->ops->read_byte(serial);
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mr_ringbuffer_write_byte_force(&fifo->ringbuffer, data);
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/* Invoke the rx-callback function */
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if (serial->device.rx_callback != MR_NULL)
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{
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mr_size_t rx_length = 0;
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rx_length = mr_ringbuffer_get_data_length(&fifo->ringbuffer);
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serial->device.rx_callback(&serial->device, &rx_length);
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}
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break;
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}
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default:break;
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}
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}
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206
device/serial/serial.c
Normal file
206
device/serial/serial.c
Normal file
@@ -0,0 +1,206 @@
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/*
|
||||
* Copyright (c), mr-library Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-09 MacRsh first version
|
||||
*/
|
||||
|
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#include "serial.h"
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static mr_err_t mr_serial_open(mr_device_t device)
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{
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mr_serial_t serial = (mr_serial_t)device;
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struct mr_serial_config default_config = MR_SERIAL_CONFIG_DEFAULT;
|
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struct mr_serial_fifo *fifo = MR_NULL;
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/* Allocation the fifo memory */
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||||
if (serial->fifo_bufsz != 0)
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{
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fifo = (struct mr_serial_fifo *)mr_malloc(sizeof(struct mr_serial_fifo *) + serial->fifo_bufsz);
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if (fifo == MR_NULL)
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return - MR_ERR_NO_MEMORY;
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mr_ringbuffer_init(&fifo->ringbuffer, fifo->pool, serial->fifo_bufsz);
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serial->fifo_rx = fifo;
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fifo = MR_NULL;
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fifo = (struct mr_serial_fifo *)mr_malloc(sizeof(struct mr_serial_fifo *) + serial->fifo_bufsz);
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if (fifo == MR_NULL)
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return - MR_ERR_NO_MEMORY;
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mr_ringbuffer_init(&fifo->ringbuffer, fifo->pool, serial->fifo_bufsz);
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serial->fifo_tx = fifo;
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fifo = MR_NULL;
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}
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/* Setting serial to default-config */
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if (serial->config.baud_rate == 0)
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serial->config = default_config;
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return serial->ops->configure(serial, &serial->config);
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}
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static mr_err_t mr_serial_close(mr_device_t device)
|
||||
{
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||||
mr_serial_t serial = (mr_serial_t)device;
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struct mr_serial_fifo *fifo = MR_NULL;
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/* Release the fifo memory */
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||||
if (serial->fifo_bufsz != 0)
|
||||
{
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||||
//TODO 检测写FIFO是否输出完毕,为输出完毕则在此输出,然后再关闭串口设备
|
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fifo = (struct mr_serial_fifo *)serial->fifo_rx;
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mr_free(fifo);
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||||
serial->fifo_rx = MR_NULL;
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||||
fifo = (struct mr_serial_fifo *)serial->fifo_tx;
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||||
mr_free(fifo);
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||||
serial->fifo_tx = MR_NULL;
|
||||
}
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||||
|
||||
/* Setting serial to close-config */
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||||
serial->config.baud_rate = 0;
|
||||
|
||||
return serial->ops->configure(serial, &serial->config);
|
||||
}
|
||||
|
||||
static mr_err_t mr_serial_ioctl(mr_device_t device, int cmd, void *args)
|
||||
{
|
||||
mr_err_t ret = MR_ERR_OK;
|
||||
mr_serial_t serial = (mr_serial_t)device;
|
||||
|
||||
switch (cmd & _MR_CMD_MASK)
|
||||
{
|
||||
case MR_CMD_CONFIG:
|
||||
{
|
||||
if (args)
|
||||
{
|
||||
ret = serial->ops->configure(serial, (struct mr_serial_config *)args);
|
||||
if (ret == MR_ERR_OK)
|
||||
serial->config = *(struct mr_serial_config *)args;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default: ret = - MR_ERR_UNSUPPORTED;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static mr_size_t mr_serial_read(mr_device_t device, mr_off_t pos, void *buffer, mr_size_t size)
|
||||
{
|
||||
mr_serial_t serial = (mr_serial_t)device;
|
||||
struct mr_serial_fifo *fifo = MR_NULL;
|
||||
mr_size_t length;
|
||||
|
||||
fifo = (struct mr_serial_fifo *)serial->fifo_rx;
|
||||
|
||||
do
|
||||
{
|
||||
length = mr_ringbuffer_get_data_length(&fifo->ringbuffer);
|
||||
} while (length < size);
|
||||
|
||||
return mr_ringbuffer_read(&fifo->ringbuffer, buffer, size);
|
||||
}
|
||||
|
||||
static mr_size_t mr_serial_write(mr_device_t device, mr_off_t pos, const void *buffer, mr_size_t size)
|
||||
{
|
||||
mr_serial_t serial = (mr_serial_t)device;
|
||||
struct mr_serial_fifo *fifo = MR_NULL;
|
||||
mr_size_t length = 0;
|
||||
|
||||
fifo = (struct mr_serial_fifo *)serial->fifo_tx;
|
||||
|
||||
do
|
||||
{
|
||||
length += mr_ringbuffer_write(&fifo->ringbuffer, &buffer[length], size - length);
|
||||
} while (length < size);
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
static mr_err_t _hw_serial_configure(mr_serial_t serial, struct mr_serial_config *config)
|
||||
{
|
||||
MR_LOG_D("Serial configure error: -MR_ERR_IO");
|
||||
return - MR_ERR_IO;
|
||||
}
|
||||
|
||||
static void _hw_serial_write_byte(mr_serial_t serial, mr_uint8_t data)
|
||||
{
|
||||
MR_LOG_D("Serial write error: -MR_ERR_IO");
|
||||
}
|
||||
|
||||
static int _hw_serial_read_byte(mr_serial_t serial)
|
||||
{
|
||||
MR_LOG_D("Serial read error: -MR_ERR_IO");
|
||||
return - 1;
|
||||
}
|
||||
|
||||
mr_err_t mr_hw_serial_add_to_container(mr_serial_t serial, const char *name, struct mr_serial_ops *ops, void *data)
|
||||
{
|
||||
mr_err_t ret = MR_ERR_OK;
|
||||
const static struct mr_device_ops device_ops =
|
||||
{
|
||||
.open = mr_serial_open,
|
||||
.close = mr_serial_close,
|
||||
.ioctl = mr_serial_ioctl,
|
||||
.read = mr_serial_read,
|
||||
.write = mr_serial_write,
|
||||
};
|
||||
|
||||
MR_ASSERT(serial != MR_NULL);
|
||||
MR_ASSERT(ops != MR_NULL);
|
||||
|
||||
/* Add the serial device to the container */
|
||||
ret =
|
||||
mr_device_add_to_container(&serial->device, name, MR_DEVICE_TYPE_SERIAL, MR_OPEN_RDWR, &device_ops, data);
|
||||
if (ret != MR_ERR_OK)
|
||||
return ret;
|
||||
|
||||
/* Initialize the serial fields */
|
||||
serial->config.baud_rate = 0;
|
||||
serial->fifo_bufsz = MR_SERIAL_FIFO_BUFSZ;
|
||||
serial->fifo_rx = MR_NULL;
|
||||
serial->fifo_tx = MR_NULL;
|
||||
|
||||
/* Set serial operations as protect functions if ops is null */
|
||||
ops->configure = ops->configure ? ops->configure : _hw_serial_configure;
|
||||
ops->write_byte = ops->write_byte ? ops->write_byte : _hw_serial_write_byte;
|
||||
ops->read_byte = ops->read_byte ? ops->read_byte : _hw_serial_read_byte;
|
||||
serial->ops = ops;
|
||||
|
||||
return MR_ERR_OK;
|
||||
}
|
||||
|
||||
void mr_hw_serial_isr(mr_serial_t serial, mr_uint16_t event)
|
||||
{
|
||||
switch (event & _MR_SERIAL_EVENT_MASK)
|
||||
{
|
||||
case MR_SERIAL_EVENT_RX_INT:
|
||||
{
|
||||
struct mr_serial_fifo *fifo = (struct mr_serial_fifo *)serial->fifo_rx;
|
||||
mr_uint8_t data;
|
||||
|
||||
/* Read data into the ring buffer */
|
||||
data = serial->ops->read_byte(serial);
|
||||
mr_ringbuffer_write_byte_force(&fifo->ringbuffer, data);
|
||||
|
||||
/* Invoke the rx-callback function */
|
||||
if (serial->device.rx_callback != MR_NULL)
|
||||
{
|
||||
mr_size_t rx_length = 0;
|
||||
|
||||
rx_length = mr_ringbuffer_get_data_length(&fifo->ringbuffer);
|
||||
serial->device.rx_callback(&serial->device, &rx_length);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default:break;
|
||||
}
|
||||
}
|
||||
@@ -30,12 +30,17 @@
|
||||
#define MR_SERIAL_NRZ_NORMAL 0
|
||||
#define MR_SERIAL_NRZ_INVERTED 1
|
||||
|
||||
#define MR_SERIAL_FLOW_CONTROL_NONE 0
|
||||
#define MR_SERIAL_FLOW_CONTROL_CTSRTS 1
|
||||
|
||||
#define MR_SERIAL_FIFO_BUFSZ 32
|
||||
|
||||
#define MR_SERIAL_FIFO_MIN_SIZE MR_SERIAL_FIFO_MIN
|
||||
|
||||
#define MR_SERIAL_EVENT_RX_INT 0x1000
|
||||
#define _MR_SERIAL_EVENT_MASK 0xf000
|
||||
|
||||
/* Default config for serial_configure structure */
|
||||
/* Default config for mr_serial_configure structure */
|
||||
#define MR_SERIAL_CONFIG_DEFAULT \
|
||||
{ \
|
||||
115200, \
|
||||
@@ -44,20 +49,20 @@
|
||||
MR_SERIAL_PARITY_NONE, \
|
||||
MR_SERIAL_BIT_ORDER_LSB, \
|
||||
MR_SERIAL_NRZ_NORMAL, \
|
||||
MR_SERIAL_FIFO_MIN_SIZE \
|
||||
MR_SERIAL_FLOW_CONTROL_NONE \
|
||||
}
|
||||
|
||||
struct mr_serial_config
|
||||
{
|
||||
mr_uint32_t baud_rate;
|
||||
|
||||
mr_uint32_t data_bits: 4;
|
||||
mr_uint32_t stop_bits: 2;
|
||||
mr_uint32_t parity: 2;
|
||||
mr_uint32_t bit_order: 1;
|
||||
mr_uint32_t invert: 1;
|
||||
mr_uint32_t fifo_size: 16;
|
||||
mr_uint32_t reserved: 6;
|
||||
mr_uint16_t data_bits: 4;
|
||||
mr_uint16_t stop_bits: 2;
|
||||
mr_uint16_t parity: 2;
|
||||
mr_uint16_t bit_order: 1;
|
||||
mr_uint16_t invert: 1;
|
||||
mr_uint16_t flow_control: 1;
|
||||
mr_uint16_t reserved: 5;
|
||||
};
|
||||
|
||||
struct mr_serial_fifo
|
||||
@@ -71,7 +76,7 @@ struct mr_serial_ops
|
||||
{
|
||||
mr_err_t (*configure)(mr_serial_t serial, struct mr_serial_config *config);
|
||||
void (*write_byte)(mr_serial_t serial, mr_uint8_t data);
|
||||
mr_uint8_t (*read_byte)(mr_serial_t serial);
|
||||
int (*read_byte)(mr_serial_t serial);
|
||||
};
|
||||
|
||||
struct mr_serial
|
||||
@@ -79,20 +84,14 @@ struct mr_serial
|
||||
struct mr_device device;
|
||||
|
||||
struct mr_serial_config config;
|
||||
void *rx_fifo;
|
||||
void *tx_fifo;
|
||||
mr_size_t fifo_bufsz;
|
||||
void *fifo_rx;
|
||||
void *fifo_tx;
|
||||
|
||||
const struct mr_serial_ops *ops;
|
||||
};
|
||||
|
||||
mr_err_t mr_serial_init(mr_serial_t serial, struct mr_serial_config *config);
|
||||
mr_err_t mr_serial_uninit(mr_serial_t serial);
|
||||
mr_size_t mr_serial_write_byte(mr_serial_t serial, mr_uint8_t data);
|
||||
mr_size_t mr_serial_write(mr_serial_t serial, const mr_uint8_t *buffer, mr_size_t count);
|
||||
mr_size_t mr_serial_read(mr_serial_t serial, mr_uint8_t *buffer, mr_size_t count);
|
||||
mr_size_t mr_serial_read_byte(mr_serial_t serial, mr_uint8_t *data);
|
||||
|
||||
mr_err_t mr_serial_add_to_container(mr_serial_t serial, const char *name, struct mr_serial_ops *ops, void *data);
|
||||
mr_err_t mr_hw_serial_add_to_container(mr_serial_t serial, const char *name, struct mr_serial_ops *ops, void *data);
|
||||
void mr_hw_serial_isr(mr_serial_t serial, mr_uint16_t event);
|
||||
|
||||
#endif
|
||||
117
include/mrdef.h
117
include/mrdef.h
@@ -66,6 +66,7 @@ typedef mr_base_t mr_off_t; /**< Type for offset */
|
||||
#define MR_OPEN_RDONLY 0x1000 /**< Read only */
|
||||
#define MR_OPEN_WRONLY 0x2000 /**< Write only */
|
||||
#define MR_OPEN_RDWR 0x3000 /**< Read and Write */
|
||||
#define MR_OPEN_NONBLOCKING 0x4000
|
||||
#define MR_OPEN_ACTIVE 0x8000 /**< Active */
|
||||
#define _MR_OPEN_FLAG_MASK 0xf000
|
||||
|
||||
@@ -127,32 +128,32 @@ typedef mr_base_t mr_off_t; /**< Type for offset */
|
||||
|
||||
typedef enum mr_bool
|
||||
{
|
||||
MR_FALSE = 0, MR_TRUE = 1
|
||||
MR_FALSE = 0, MR_TRUE = 1
|
||||
} mr_bool_t;
|
||||
|
||||
typedef enum mr_level
|
||||
{
|
||||
MR_LOW = 0, MR_HIGH = 1
|
||||
MR_LOW = 0, MR_HIGH = 1
|
||||
} mr_level_t;
|
||||
|
||||
struct mr_list
|
||||
{
|
||||
struct mr_list *next; /**< point to next node. */
|
||||
struct mr_list *prev; /**< point to prev node. */
|
||||
struct mr_list *next; /**< point to next node. */
|
||||
struct mr_list *prev; /**< point to prev node. */
|
||||
};
|
||||
typedef struct mr_list *mr_list_t;
|
||||
|
||||
enum mr_container_type
|
||||
{
|
||||
MR_CONTAINER_TYPE_MISC,
|
||||
MR_CONTAINER_TYPE_DEVICE,
|
||||
_MR_CONTAINER_TYPE_MASK,
|
||||
MR_CONTAINER_TYPE_MISC,
|
||||
MR_CONTAINER_TYPE_DEVICE,
|
||||
_MR_CONTAINER_TYPE_MASK,
|
||||
};
|
||||
|
||||
struct mr_container
|
||||
{
|
||||
enum mr_container_type type;
|
||||
struct mr_list list;
|
||||
enum mr_container_type type;
|
||||
struct mr_list list;
|
||||
};
|
||||
typedef struct mr_container *mr_container_t;
|
||||
|
||||
@@ -162,87 +163,87 @@ typedef struct mr_container *mr_container_t;
|
||||
|
||||
struct mr_object
|
||||
{
|
||||
char name[MR_NAME_MAX];
|
||||
mr_uint8_t type;
|
||||
struct mr_list list;
|
||||
char name[MR_NAME_MAX];
|
||||
mr_uint8_t type;
|
||||
struct mr_list list;
|
||||
};
|
||||
typedef struct mr_object *mr_object_t;
|
||||
|
||||
struct mr_mutex
|
||||
{
|
||||
enum
|
||||
{
|
||||
MR_UNLOCK = 0,
|
||||
MR_LOCK,
|
||||
} lock;
|
||||
mr_object_t owner;
|
||||
enum
|
||||
{
|
||||
MR_UNLOCK = 0,
|
||||
MR_LOCK,
|
||||
} lock;
|
||||
mr_object_t owner;
|
||||
};
|
||||
typedef struct mr_mutex *mr_mutex_t;
|
||||
|
||||
enum mr_ringbuffer_state
|
||||
{
|
||||
MR_RINGBUFFER_EMPTY,
|
||||
MR_RINGBUFFER_FULL,
|
||||
MR_RINGBUFFER_HALF_FULL,
|
||||
MR_RINGBUFFER_EMPTY,
|
||||
MR_RINGBUFFER_FULL,
|
||||
MR_RINGBUFFER_HALF_FULL,
|
||||
};
|
||||
|
||||
struct mr_ringbuffer
|
||||
{
|
||||
mr_uint8_t *buffer;
|
||||
mr_uint16_t read_mirror: 1;
|
||||
mr_uint16_t read_index: 15;
|
||||
mr_uint16_t write_mirror: 1;
|
||||
mr_uint16_t write_index: 15;
|
||||
mr_uint16_t buffer_size;
|
||||
mr_uint8_t *buffer;
|
||||
mr_uint16_t read_mirror: 1;
|
||||
mr_uint16_t read_index: 15;
|
||||
mr_uint16_t write_mirror: 1;
|
||||
mr_uint16_t write_index: 15;
|
||||
mr_uint16_t bufsz;
|
||||
};
|
||||
typedef struct mr_ringbuffer *mr_ringbuffer_t;
|
||||
|
||||
enum mr_device_type
|
||||
{
|
||||
MR_DEVICE_TYPE_NULL,
|
||||
MR_DEVICE_TYPE_PIN,
|
||||
MR_DEVICE_TYPE_SPI_BUS,
|
||||
MR_DEVICE_TYPE_SPI,
|
||||
MR_DEVICE_TYPE_I2C_BUS,
|
||||
MR_DEVICE_TYPE_I2C,
|
||||
MR_DEVICE_TYPE_SERIAL,
|
||||
MR_DEVICE_TYPE_ADC,
|
||||
MR_DEVICE_TYPE_DAC,
|
||||
MR_DEVICE_TYPE_NULL,
|
||||
MR_DEVICE_TYPE_PIN,
|
||||
MR_DEVICE_TYPE_SPI_BUS,
|
||||
MR_DEVICE_TYPE_SPI,
|
||||
MR_DEVICE_TYPE_I2C_BUS,
|
||||
MR_DEVICE_TYPE_I2C,
|
||||
MR_DEVICE_TYPE_SERIAL,
|
||||
MR_DEVICE_TYPE_ADC,
|
||||
MR_DEVICE_TYPE_DAC,
|
||||
|
||||
MR_DEVICE_TYPE_PWM,
|
||||
MR_DEVICE_TYPE_TIMER,
|
||||
MR_DEVICE_TYPE_WDT,
|
||||
MR_DEVICE_TYPE_FLASH,
|
||||
MR_DEVICE_TYPE_SDRAM,
|
||||
/* ... */
|
||||
MR_DEVICE_TYPE_PWM,
|
||||
MR_DEVICE_TYPE_TIMER,
|
||||
MR_DEVICE_TYPE_WDT,
|
||||
MR_DEVICE_TYPE_FLASH,
|
||||
MR_DEVICE_TYPE_SDRAM,
|
||||
/* ... */
|
||||
|
||||
MR_DEVICE_TYPE_LINK,
|
||||
MR_DEVICE_TYPE_LINK_SERVICE,
|
||||
MR_DEVICE_TYPE_LINK,
|
||||
MR_DEVICE_TYPE_LINK_SERVICE,
|
||||
};
|
||||
|
||||
typedef struct mr_device *mr_device_t;
|
||||
struct mr_device_ops
|
||||
{
|
||||
mr_err_t (*open)(mr_device_t device);
|
||||
mr_err_t (*close)(mr_device_t device);
|
||||
mr_err_t (*ioctl)(mr_device_t device, int cmd, void *args);
|
||||
mr_size_t (*read)(mr_device_t device, mr_off_t pos, void *buffer, mr_size_t count);
|
||||
mr_size_t (*write)(mr_device_t device, mr_off_t pos, const void *buffer, mr_size_t count);
|
||||
mr_err_t (*open)(mr_device_t device);
|
||||
mr_err_t (*close)(mr_device_t device);
|
||||
mr_err_t (*ioctl)(mr_device_t device, int cmd, void *args);
|
||||
mr_size_t (*read)(mr_device_t device, mr_off_t pos, void *buffer, mr_size_t size);
|
||||
mr_size_t (*write)(mr_device_t device, mr_off_t pos, const void *buffer, mr_size_t size);
|
||||
};
|
||||
|
||||
struct mr_device
|
||||
{
|
||||
struct mr_object object;
|
||||
struct mr_object object;
|
||||
|
||||
mr_err_t (*rx_callback)(mr_device_t device, void *args);
|
||||
mr_err_t (*tx_callback)(mr_device_t device, void *args);
|
||||
enum mr_device_type type;
|
||||
mr_uint16_t support_flag;
|
||||
mr_uint16_t open_flag;
|
||||
mr_uint8_t ref_count;
|
||||
void *data;
|
||||
mr_err_t (*rx_callback)(mr_device_t device, void *args);
|
||||
mr_err_t (*tx_callback)(mr_device_t device, void *args);
|
||||
enum mr_device_type type;
|
||||
mr_uint16_t support_flag;
|
||||
mr_uint16_t open_flag;
|
||||
mr_uint8_t ref_count;
|
||||
void *data;
|
||||
|
||||
const struct mr_device_ops *ops;
|
||||
const struct mr_device_ops *ops;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -38,15 +38,15 @@ mr_size_t mr_ringbuffer_read_byte(mr_ringbuffer_t ringbuffer, mr_uint8_t *data);
|
||||
|
||||
mr_device_t mr_device_find(const char *name);
|
||||
mr_err_t mr_device_add_to_container(mr_device_t device,
|
||||
const char *name,
|
||||
enum mr_device_type type,
|
||||
mr_uint16_t support_flag,
|
||||
const struct mr_device_ops *ops,
|
||||
void *data);
|
||||
const char *name,
|
||||
enum mr_device_type type,
|
||||
mr_uint16_t support_flag,
|
||||
const struct mr_device_ops *ops,
|
||||
void *data);
|
||||
mr_err_t mr_device_open(mr_device_t device, mr_uint16_t flags);
|
||||
mr_err_t mr_device_close(mr_device_t device);
|
||||
mr_err_t mr_device_ioctl(mr_device_t device, int cmd, void *args);
|
||||
mr_size_t mr_device_read(mr_device_t device, mr_off_t pos, void *buf, mr_size_t count);
|
||||
mr_size_t mr_device_write(mr_device_t device, mr_off_t pos, const void *buf, mr_size_t count);
|
||||
mr_size_t mr_device_read(mr_device_t device, mr_off_t pos, void *buf, mr_size_t size);
|
||||
mr_size_t mr_device_write(mr_device_t device, mr_off_t pos, const void *buf, mr_size_t size);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -2,8 +2,8 @@
|
||||
// Created by 10632 on 2023/3/13.
|
||||
//
|
||||
|
||||
#ifndef DESIGN_MR_LIBRARY_INCLUDE_MRLOG_H_
|
||||
#define DESIGN_MR_LIBRARY_INCLUDE_MRLOG_H_
|
||||
#ifndef _MR_LOG_H_
|
||||
#define _MR_LOG_H_
|
||||
|
||||
#include <mrdef.h>
|
||||
|
||||
@@ -52,4 +52,4 @@ MR_INLINE void mr_assert_handler()
|
||||
#define MR_LOG_E(string, error) do{}while(0)
|
||||
#define MR_LOG_W(string) do{}while(0)
|
||||
|
||||
#endif //DESIGN_MR_LIBRARY_INCLUDE_MRLOG_H_
|
||||
#endif
|
||||
|
||||
@@ -28,25 +28,25 @@ do{ \
|
||||
|
||||
MR_INLINE void mr_list_init(mr_list_t list)
|
||||
{
|
||||
list->next = list;
|
||||
list->prev = list;
|
||||
list->next = list;
|
||||
list->prev = list;
|
||||
}
|
||||
|
||||
MR_INLINE void mr_list_insert_after(mr_list_t list, mr_list_t node)
|
||||
{
|
||||
list->next->prev = node;
|
||||
node->next = list->next;
|
||||
list->next->prev = node;
|
||||
node->next = list->next;
|
||||
|
||||
list->next = node;
|
||||
node->prev = list;
|
||||
list->next = node;
|
||||
node->prev = list;
|
||||
}
|
||||
|
||||
MR_INLINE void mr_list_remove(mr_list_t node)
|
||||
{
|
||||
node->next->prev = node->prev;
|
||||
node->prev->next = node->next;
|
||||
node->next->prev = node->prev;
|
||||
node->prev->next = node->next;
|
||||
|
||||
node->next = node->prev = node;
|
||||
node->next = node->prev = node;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,14 +1,14 @@
|
||||
#ifndef _MR_CONFIG_H_
|
||||
#define _MR_CONFIG_H_
|
||||
|
||||
#define MR_CONF_ENABLE 1
|
||||
#define MR_CONF_DISABLE 0
|
||||
#define MR_CONF_ENABLE 1
|
||||
#define MR_CONF_DISABLE 0
|
||||
|
||||
#include <board.h>
|
||||
|
||||
#define MR_NAME_MAX 10
|
||||
#define MR_NAME_MAX 10
|
||||
|
||||
#define MR_LIBRARY MR_CONF_ENABLE
|
||||
#define MR_LIBRARY MR_CONF_ENABLE
|
||||
|
||||
#define MR_DEVICE_PIN CONF_ENABLE
|
||||
#define MR_DEVICE_SPI CONF_ENABLE
|
||||
|
||||
Reference in New Issue
Block a user