1.新增STM32F411系列MDK示例工程。

This commit is contained in:
MacRsh
2023-12-12 16:05:28 +08:00
parent d86fde09a6
commit 0d047c80de
10 changed files with 300 additions and 456 deletions

View File

@@ -1,204 +0,0 @@
menu "Board configure"
choice
prompt "Chip type"
default MR_USING_STM32F1
config MR_USING_STM32F0
bool "STM32F0"
config MR_USING_STM32F1
bool "STM32F1"
config MR_USING_STM32F2
bool "STM32F2"
config MR_USING_STM32F3
bool "STM32F3"
config MR_USING_STM32F4
bool "STM32F4"
config MR_USING_STM32F7
bool "STM32F7"
config MR_USING_STM32G0
bool "STM32G0"
config MR_USING_STM32G4
bool "STM32G4"
config MR_USING_STM32H5
bool "STM32H5"
config MR_USING_STM32H7
bool "STM32H7"
config MR_USING_STM32L0
bool "STM32L0"
config MR_USING_STM32L1
bool "STM32L1"
config MR_USING_STM32L4
bool "STM32L4"
config MR_USING_STM32L5
bool "STM32L5"
endchoice
menu "ADC"
config MR_USING_ADC1
bool "Enable ADC1 driver"
default n
config MR_USING_ADC2
bool "Enable ADC2 driver"
default n
config MR_USING_ADC3
bool "Enable ADC3 driver"
default n
endmenu
menu "GPIO"
config MR_USING_GPIOA
bool "Enable GPIOA driver"
default n
config MR_USING_GPIOB
bool "Enable GPIOB driver"
default n
config MR_USING_GPIOC
bool "Enable GPIOC driver"
default n
config MR_USING_GPIOD
bool "Enable GPIOD driver"
default n
config MR_USING_GPIOE
bool "Enable GPIOE driver"
default n
endmenu
menu "UART"
config MR_USING_UART1
bool "Enable UART1 driver"
default n
config MR_USING_UART2
bool "Enable UART2 driver"
default n
config MR_USING_UART3
bool "Enable UART3 driver"
default n
config MR_USING_UART4
bool "Enable UART4 driver"
default n
config MR_USING_UART5
bool "Enable UART5 driver"
default n
config MR_USING_UART6
bool "Enable UART6 driver"
default n
config MR_USING_UART7
bool "Enable UART7 driver"
default n
config MR_USING_UART8
bool "Enable UART8 driver"
default n
endmenu
menu "SPI"
config MR_USING_SPI1
bool "Enable SPI1 driver"
default n
config MR_USING_SPI2
bool "Enable SPI2 driver"
default n
config MR_USING_SPI3
bool "Enable SPI3 driver"
default n
config MR_USING_SPI4
bool "Enable SPI3 driver"
default n
config MR_USING_SPI5
bool "Enable SPI5 driver"
default n
config MR_USING_SPI6
bool "Enable SPI6 driver"
default n
endmenu
menu "Timer"
config MR_USING_TIMER1
bool "Enable Timer1 driver"
default n
config MR_USING_TIMER2
bool "Enable Timer2 driver"
default n
config MR_USING_TIMER3
bool "Enable Timer3 driver"
default n
config MR_USING_TIMER4
bool "Enable Timer4 driver"
default n
config MR_USING_TIMER5
bool "Enable Timer5 driver"
default n
config MR_USING_TIMER6
bool "Enable Timer6 driver"
default n
config MR_USING_TIMER7
bool "Enable Timer7 driver"
default n
config MR_USING_TIMER8
bool "Enable Timer8 driver"
default n
config MR_USING_TIMER9
bool "Enable Timer9 driver"
default n
config MR_USING_TIMER10
bool "Enable Timer10 driver"
default n
config MR_USING_TIMER11
bool "Enable Timer11 driver"
default n
config MR_USING_TIMER12
bool "Enable Timer12 driver"
default n
config MR_USING_TIMER13
bool "Enable Timer13 driver"
default n
config MR_USING_TIMER14
bool "Enable Timer14 driver"
default n
endmenu
endmenu

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@@ -10,10 +10,6 @@
#ifdef MR_USING_ADC
#if !defined(MR_USING_ADC1) && !defined(MR_USING_ADC2) && !defined(MR_USING_ADC3)
#error "Please define at least one ADC macro like MR_USING_ADC1. Otherwise undefine MR_USING_ADC."
#else
enum drv_adc_index
{
#ifdef MR_USING_ADC1
@@ -53,27 +49,7 @@ static struct drv_adc_data adc_drv_data[] =
#endif /* MR_USING_ADC3 */
};
static struct drv_adc_channel_data adc_channel_drv_data[] =
{
{ADC_CHANNEL_0},
{ADC_CHANNEL_1},
{ADC_CHANNEL_2},
{ADC_CHANNEL_3},
{ADC_CHANNEL_4},
{ADC_CHANNEL_5},
{ADC_CHANNEL_6},
{ADC_CHANNEL_7},
{ADC_CHANNEL_8},
{ADC_CHANNEL_9},
{ADC_CHANNEL_10},
{ADC_CHANNEL_11},
{ADC_CHANNEL_12},
{ADC_CHANNEL_13},
{ADC_CHANNEL_14},
{ADC_CHANNEL_15},
{ADC_CHANNEL_16},
{ADC_CHANNEL_17},
};
static struct drv_adc_channel_data adc_channel_drv_data[] = DRV_ADC_CHANNEL_CONFIG;
static struct mr_adc adc_dev[mr_array_num(adc_drv_data)];
@@ -95,7 +71,13 @@ static int drv_adc_configure(struct mr_adc *adc, int state)
{
/* Configure ADC */
adc_data->handle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
#if defined(ADC_RESOLUTION_12B)
adc_data->handle.Init.Resolution = ADC_RESOLUTION_12B;
#elif defined(ADC_RESOLUTION_10B)
adc_data->handle.Init.Resolution = ADC_RESOLUTION_10B;
#else
adc_data->handle.Init.Resolution = ADC_RESOLUTION_8B;
#endif /* ADC_RESOLUTION_12B */
adc_data->handle.Init.ScanConvMode = DISABLE;
adc_data->handle.Init.ContinuousConvMode = DISABLE;
adc_data->handle.Init.DiscontinuousConvMode = DISABLE;
@@ -186,6 +168,4 @@ int drv_adc_init(void)
}
MR_DRV_EXPORT(drv_adc_init);
#endif /* !defined(MR_USING_ADC1) && !defined(MR_USING_ADC2) && !defined(MR_USING_ADC3) */
#endif /* MR_USING_ADC */

View File

@@ -20,7 +20,7 @@ extern "C" {
struct drv_adc_data
{
ADC_HandleTypeDef *handle;
ADC_HandleTypeDef handle;
ADC_TypeDef *instance;
};

View File

@@ -10,29 +10,7 @@
#ifdef MR_USING_PIN
#if !defined(MR_USING_GPIOA) && !defined(MR_USING_GPIOB) && !defined(MR_USING_GPIOC) && !defined(MR_USING_GPIOD) && !defined(MR_USING_GPIOE)
#error "Please define at least one GPIO macro like MR_USING_GPIOA. Otherwise undefine MR_USING_GPIO."
#else
static IRQn_Type pin_irq_map[] =
{
EXTI0_IRQn,
EXTI1_IRQn,
EXTI2_IRQn,
EXTI3_IRQn,
EXTI4_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI9_5_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
EXTI15_10_IRQn,
};
static IRQn_Type pin_irq_map[] = DRV_PIN_IRQ_MAP_CONFIG;
static int pin_irq_mask[] =
{
@@ -54,60 +32,15 @@ static int pin_irq_mask[] =
-1,
};
static struct drv_pin_port_data pin_port_drv_data[] =
{
#ifdef MR_USING_GPIOA
{GPIOA},
#else
{MR_NULL},
#endif /* MR_USING_GPIOA */
#ifdef MR_USING_GPIOB
{GPIOB},
#else
{MR_NULL},
#endif /* MR_USING_GPIOB */
#ifdef MR_USING_GPIOC
{GPIOC},
#else
{MR_NULL},
#endif /* MR_USING_GPIOC */
#ifdef MR_USING_GPIOD
{GPIOD},
#else
{MR_NULL},
#endif /* MR_USING_GPIOD */
#ifdef MR_USING_GPIOE
{GPIOE},
#else
{MR_NULL},
#endif /* MR_USING_GPIOE */
};
static struct drv_pin_port_data pin_port_drv_data[] = DRV_PIN_PORT_CONFIG;
static struct drv_pin_data pin_drv_data[] =
{
{GPIO_PIN_0},
{GPIO_PIN_1},
{GPIO_PIN_2},
{GPIO_PIN_3},
{GPIO_PIN_4},
{GPIO_PIN_5},
{GPIO_PIN_6},
{GPIO_PIN_7},
{GPIO_PIN_8},
{GPIO_PIN_9},
{GPIO_PIN_10},
{GPIO_PIN_11},
{GPIO_PIN_12},
{GPIO_PIN_13},
{GPIO_PIN_14},
{GPIO_PIN_15},
};
static struct drv_pin_data pin_drv_data[] = DRV_PIN_CONFIG;
static struct mr_pin pin_dev;
static struct drv_pin_port_data *drv_pin_get_port_data(int pin)
{
pin /= 16;
pin >>= 4;
if ((pin >= mr_array_num(pin_port_drv_data)) || (pin_port_drv_data[pin].port == MR_NULL))
{
return MR_NULL;
@@ -117,7 +50,7 @@ static struct drv_pin_port_data *drv_pin_get_port_data(int pin)
static struct drv_pin_data *drv_pin_get_data(int pin)
{
pin %= 16;
pin &= 0x0f;
if (pin >= mr_array_num(pin_drv_data))
{
return MR_NULL;
@@ -129,7 +62,7 @@ static int drv_pin_configure(struct mr_pin *pin, int number, int mode)
{
struct drv_pin_port_data *pin_port_data = drv_pin_get_port_data(number);
struct drv_pin_data *pin_data = drv_pin_get_data(number);
uint32_t exti_line = number % 16;
uint32_t exti_line = number & 0x0f;
GPIO_InitTypeDef GPIO_InitStructure = {0};
/* Check pin is valid */
@@ -139,102 +72,93 @@ static int drv_pin_configure(struct mr_pin *pin, int number, int mode)
}
/* Configure clock */
#ifdef MR_USING_GPIOA
#ifdef GPIOA
if (pin_port_data->port == GPIOA)
{
__HAL_RCC_GPIOA_CLK_ENABLE();
}
#endif /* MR_USING_GPIOA */
#ifdef MR_USING_GPIOB
#endif /* GPIOA */
#ifdef GPIOB
if (pin_port_data->port == GPIOB)
{
__HAL_RCC_GPIOB_CLK_ENABLE();
}
#endif /* MR_USING_GPIOB */
#ifdef MR_USING_GPIOC
#endif /* GPIOB */
#ifdef GPIOC
if (pin_port_data->port == GPIOC)
{
__HAL_RCC_GPIOC_CLK_ENABLE();
}
#endif /* MR_USING_GPIOC */
#ifdef MR_USING_GPIOD
#endif /* GPIOC */
#ifdef GPIOD
if (pin_port_data->port == GPIOD)
{
__HAL_RCC_GPIOD_CLK_ENABLE();
}
#endif /* MR_USING_GPIOD */
#ifdef MR_USING_GPIOE
#endif /* GPIOD */
#ifdef GPIOE
if (pin_port_data->port == GPIOE)
{
__HAL_RCC_GPIOE_CLK_ENABLE();
}
#endif /* MR_USING_GPIOE */
#endif /* GPIOE */
switch (mode)
{
case MR_PIN_MODE_NONE:
{
GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.Pull = GPIO_NOPULL;
break;
}
case MR_PIN_MODE_OUTPUT:
{
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.Pull = GPIO_NOPULL;
break;
}
case MR_PIN_MODE_OUTPUT_OD:
{
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_OD;
GPIO_InitStructure.Pull = GPIO_NOPULL;
break;
break;
}
case MR_PIN_MODE_INPUT:
{
GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
GPIO_InitStructure.Pull = GPIO_NOPULL;
break;
}
case MR_PIN_MODE_INPUT_DOWN:
{
GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
GPIO_InitStructure.Pull = GPIO_PULLDOWN;
break;
}
case MR_PIN_MODE_INPUT_UP:
{
GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
GPIO_InitStructure.Pull = GPIO_PULLUP;
break;
}
case MR_PIN_MODE_IRQ_RISING:
{
GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING;
GPIO_InitStructure.Pull = GPIO_PULLDOWN;
break;
}
case MR_PIN_MODE_IRQ_FALLING:
{
GPIO_InitStructure.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStructure.Pull = GPIO_PULLUP;
break;
}
case MR_PIN_MODE_IRQ_EDGE:
{
GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING_FALLING;
GPIO_InitStructure.Pull = GPIO_NOPULL;
break;
}
default:
{
return MR_EINVAL;
@@ -248,7 +172,6 @@ static int drv_pin_configure(struct mr_pin *pin, int number, int mode)
{
return MR_EBUSY;
}
pin_irq_mask[exti_line] = number;
HAL_NVIC_SetPriority(pin_irq_map[exti_line], 5, 0);
@@ -257,15 +180,22 @@ static int drv_pin_configure(struct mr_pin *pin, int number, int mode)
{
if ((exti_line >= 5) && (exti_line <= 9))
{
if ((pin_irq_mask[5] == -1) && (pin_irq_mask[6] == -1) && (pin_irq_mask[7] == -1) &&
(pin_irq_mask[8] == -1) && (pin_irq_mask[9] == -1))
if ((pin_irq_mask[5] == -1) &&
(pin_irq_mask[6] == -1) &&
(pin_irq_mask[7] == -1) &&
(pin_irq_mask[8] == -1) &&
(pin_irq_mask[9] == -1))
{
HAL_NVIC_DisableIRQ(pin_irq_map[exti_line]);
}
} else
{
if ((pin_irq_mask[10] == -1) && (pin_irq_mask[11] == -1) && (pin_irq_mask[12] == -1) &&
(pin_irq_mask[13] == -1) && (pin_irq_mask[14] == -1) && (pin_irq_mask[15] == -1))
if ((pin_irq_mask[10] == -1) &&
(pin_irq_mask[11] == -1) &&
(pin_irq_mask[12] == -1) &&
(pin_irq_mask[13] == -1) &&
(pin_irq_mask[14] == -1) &&
(pin_irq_mask[15] == -1))
{
HAL_NVIC_DisableIRQ(pin_irq_map[exti_line]);
}
@@ -353,45 +283,63 @@ void EXTI4_IRQHandler(void)
void EXTI9_5_IRQHandler(void)
{
if ((__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_5) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_6) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_7) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_8) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_9) != RESET))
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_5) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[5]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[6]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[7]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[8]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[9]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_5);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_6) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[6]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_6);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_7) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[7]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_7);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_8) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[8]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_8);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_9) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[9]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_9);
}
}
void EXTI15_10_IRQHandler(void)
{
if ((__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_10) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_11) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_12) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_13) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_14) != RESET)
|| (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_15) != RESET))
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_10) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[10]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[11]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[12]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[13]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[14]);
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[15]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_10);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_11) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[11]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_11);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_12) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[12]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_12);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_13) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[13]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_13);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_14) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[14]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_14);
}
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_15) != RESET)
{
mr_dev_isr(&pin_dev.dev, MR_ISR_PIN_EXTI_INT, &pin_irq_mask[15]);
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_15);
}
}
@@ -416,6 +364,4 @@ int drv_pin_init(void)
}
MR_DRV_EXPORT(drv_pin_init);
#endif /* !defined(MR_USING_GPIOA) && !defined(MR_USING_GPIOB) && !defined(MR_USING_GPIOC) && !defined(MR_USING_GPIOD) && !defined(MR_USING_GPIOE) */
#endif /* MR_USING_PIN */

View File

@@ -10,10 +10,6 @@
#ifdef MR_USING_SERIAL
#if !defined(MR_USING_UART1) && !defined(MR_USING_UART2) && !defined(MR_USING_UART3) && !defined(MR_USING_UART4) && !defined(MR_USING_UART5) && !defined(MR_USING_UART6) && !defined(MR_USING_UART7) && !defined(MR_USING_UART8)
#error "Please define at least one UART macro like MR_USING_UART1. Otherwise undefine MR_USING_SERIAL."
#else
enum drv_serial_index
{
#ifdef MR_USING_UART1
@@ -115,7 +111,6 @@ static int drv_serial_configure(struct mr_serial *serial, struct mr_serial_confi
serial_data->handle.Init.WordLength = UART_WORDLENGTH_8B;
break;
}
default:
{
return MR_EINVAL;
@@ -129,13 +124,11 @@ static int drv_serial_configure(struct mr_serial *serial, struct mr_serial_confi
serial_data->handle.Init.StopBits = UART_STOPBITS_1;
break;
}
case MR_SERIAL_STOP_BITS_2:
{
serial_data->handle.Init.StopBits = UART_STOPBITS_2;
break;
}
default:
{
return MR_EINVAL;
@@ -149,19 +142,16 @@ static int drv_serial_configure(struct mr_serial *serial, struct mr_serial_confi
serial_data->handle.Init.Parity = UART_PARITY_NONE;
break;
}
case MR_SERIAL_PARITY_ODD:
{
serial_data->handle.Init.Parity = UART_PARITY_ODD;
break;
}
case MR_SERIAL_PARITY_EVEN:
{
serial_data->handle.Init.Parity = UART_PARITY_EVEN;
break;
}
default:
{
return MR_EINVAL;
@@ -174,7 +164,6 @@ static int drv_serial_configure(struct mr_serial *serial, struct mr_serial_confi
{
break;
}
default:
{
return MR_EINVAL;
@@ -187,7 +176,6 @@ static int drv_serial_configure(struct mr_serial *serial, struct mr_serial_confi
{
break;
}
default:
{
return MR_EINVAL;
@@ -440,6 +428,4 @@ int drv_serial_init(void)
}
MR_DRV_EXPORT(drv_serial_init);
#endif /* !defined(MR_USING_UART1) && !defined(MR_USING_UART2) && !defined(MR_USING_UART3) && !defined(MR_USING_UART4) && !defined(MR_USING_UART5) && !defined(MR_USING_UART6) && !defined(MR_USING_UART7) && !defined(MR_USING_UART8) */
#endif /* MR_USING_SERIAL */

View File

@@ -10,10 +10,6 @@
#ifdef MR_USING_SPI
#if !defined(MR_USING_SPI1) && !defined(MR_USING_SPI2) && !defined(MR_USING_SPI3) && !defined(MR_USING_SPI4) && !defined(MR_USING_SPI5) && !defined(MR_USING_SPI6)
#error "Please define at least one SPI macro like MR_USING_SPI1. Otherwise undefine MR_USING_SPI."
#else
enum drv_spi_bus_index
{
#ifdef MR_USING_SPI1
@@ -134,13 +130,11 @@ static int drv_spi_bus_configure(struct mr_spi_bus *spi_bus, struct mr_spi_confi
spi_bus_data->handle.Init.Mode = SPI_MODE_MASTER;
break;
}
case MR_SPI_SLAVE:
{
spi_bus_data->handle.Init.Mode = SPI_MODE_SLAVE;
break;
}
default:
{
return MR_EINVAL;
@@ -155,28 +149,24 @@ static int drv_spi_bus_configure(struct mr_spi_bus *spi_bus, struct mr_spi_confi
spi_bus_data->handle.Init.CLKPhase = SPI_PHASE_1EDGE;
break;
}
case MR_SPI_MODE_1:
{
spi_bus_data->handle.Init.CLKPolarity = SPI_POLARITY_LOW;
spi_bus_data->handle.Init.CLKPhase = SPI_PHASE_2EDGE;
break;
}
case MR_SPI_MODE_2:
{
spi_bus_data->handle.Init.CLKPolarity = SPI_POLARITY_HIGH;
spi_bus_data->handle.Init.CLKPhase = SPI_PHASE_1EDGE;
break;
}
case MR_SPI_MODE_3:
{
spi_bus_data->handle.Init.CLKPolarity = SPI_POLARITY_HIGH;
spi_bus_data->handle.Init.CLKPhase = SPI_PHASE_2EDGE;
break;
}
default:
{
return MR_EINVAL;
@@ -190,13 +180,11 @@ static int drv_spi_bus_configure(struct mr_spi_bus *spi_bus, struct mr_spi_confi
spi_bus_data->handle.Init.DataSize = SPI_DATASIZE_8BIT;
break;
}
case MR_SPI_DATA_BITS_16:
{
spi_bus_data->handle.Init.DataSize = SPI_DATASIZE_16BIT;
break;
}
default:
{
return MR_EINVAL;
@@ -210,13 +198,11 @@ static int drv_spi_bus_configure(struct mr_spi_bus *spi_bus, struct mr_spi_confi
spi_bus_data->handle.Init.FirstBit = SPI_FIRSTBIT_LSB;
break;
}
case MR_SPI_BIT_ORDER_MSB:
{
spi_bus_data->handle.Init.FirstBit = SPI_FIRSTBIT_MSB;
break;
}
default:
{
return MR_EINVAL;
@@ -406,6 +392,4 @@ int drv_spi_bus_init(void)
}
MR_DRV_EXPORT(drv_spi_bus_init);
#endif /* !defined(MR_USING_SPI1) && !defined(MR_USING_SPI2) && !defined(MR_USING_SPI3) && !defined(MR_USING_SPI4) && !defined(MR_USING_SPI5) && !defined(MR_USING_SPI6) */
#endif /* MR_USING_SPI */

View File

@@ -10,10 +10,6 @@
#ifdef MR_USING_TIMER
#if !defined(MR_USING_TIMER1) && !defined(MR_USING_TIMER2) && !defined(MR_USING_TIMER3) && !defined(MR_USING_TIMER4) && !defined(MR_USING_TIMER5) && !defined(MR_USING_TIMER6) && !defined(MR_USING_TIMER7) && !defined(MR_USING_TIMER8) && !defined(MR_USING_TIMER9) && !defined(MR_USING_TIMER10) && !defined(MR_USING_TIMER11) && !defined(MR_USING_TIMER12) && !defined(MR_USING_TIMER13) && !defined(MR_USING_TIMER14)
#error "Please define at least one Timer macro like MR_USING_TIMER1. Otherwise undefine MR_USING_TIMER."
#else
enum drv_timer_index
{
#ifdef MR_USING_TIMER1
@@ -157,46 +153,46 @@ static struct mr_timer timer_dev[mr_array_num(timer_drv_data)];
static struct mr_timer_info timer_info[] =
{
#ifdef MR_USING_TIMER1
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER1_INFO_CONFIG,
#endif /* MR_USING_TIMER1 */
#ifdef MR_USING_TIMER2
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER2_INFO_CONFIG,
#endif /* MR_USING_TIMER2 */
#ifdef MR_USING_TIMER3
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER3_INFO_CONFIG,
#endif /* MR_USING_TIMER3 */
#ifdef MR_USING_TIMER4
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER4_INFO_CONFIG,
#endif /* MR_USING_TIMER4 */
#ifdef MR_USING_TIMER5
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER5_INFO_CONFIG,
#endif /* MR_USING_TIMER5 */
#ifdef MR_USING_TIMER6
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER6_INFO_CONFIG,
#endif /* MR_USING_TIMER6 */
#ifdef MR_USING_TIMER7
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER7_INFO_CONFIG,
#endif /* MR_USING_TIMER7 */
#ifdef MR_USING_TIMER8
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER8_INFO_CONFIG,
#endif /* MR_USING_TIMER8 */
#ifdef MR_USING_TIMER9
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER9_INFO_CONFIG,
#endif /* MR_USING_TIMER9 */
#ifdef MR_USING_TIMER10
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER10_INFO_CONFIG,
#endif /* MR_USING_TIMER10 */
#ifdef MR_USING_TIMER11
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER11_INFO_CONFIG,
#endif /* MR_USING_TIMER11 */
#ifdef MR_USING_TIMER12
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER12_INFO_CONFIG,
#endif /* MR_USING_TIMER12 */
#ifdef MR_USING_TIMER13
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER13_INFO_CONFIG,
#endif /* MR_USING_TIMER13 */
#ifdef MR_USING_TIMER14
{0, UINT16_MAX, UINT16_MAX},
DRV_TIMER14_INFO_CONFIG,
#endif /* MR_USING_TIMER14 */
};
@@ -509,6 +505,4 @@ int drv_timer_init(void)
}
MR_DRV_EXPORT(drv_timer_init);
#endif /* !defined(MR_USING_TIMER1) && !defined(MR_USING_TIMER2) && !defined(MR_USING_TIMER3) && !defined(MR_USING_TIMER4) && !defined(MR_USING_TIMER5) && !defined(MR_USING_TIMER6) && !defined(MR_USING_TIMER7) && !defined(MR_USING_TIMER8) && !defined(MR_USING_TIMER9) && !defined(MR_USING_TIMER10) && !defined(MR_USING_TIMER11) && !defined(MR_USING_TIMER12) && !defined(MR_USING_TIMER13) && !defined(MR_USING_TIMER14) */
#endif /* MR_USING_TIMER */

View File

@@ -1,52 +0,0 @@
/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-11-10 MacRsh First version
*/
#ifndef _MR_BOARD_H_
#define _MR_BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#ifdef MR_USING_STM32F0
#include "stm32f0xx.h"
#elifdef MR_USING_STM32F1
#include "stm32f1xx.h"
#elifdef MR_USING_STM32F2
#include "stm32f2xx.h"
#elifdef MR_USING_STM32F3
#include "stm32f3xx.h"
#elifdef MR_USING_STM32F4
#include "stm32f4xx.h"
#elifdef MR_USING_STM32F7
#include "stm32f7xx.h"
#elifdef MR_USING_STM32G0
#include "stm32g0xx.h"
#elifdef MR_USING_STM32G4
#include "stm32g4xx.h"
#elifdef MR_USING_STM32H5
#include "stm32h5xx.h"
#elifdef MR_USING_STM32H7
#include "stm32h7xx.h"
#elifdef MR_USING_STM32L0
#include "stm32l0xx.h"
#elifdef MR_USING_STM32L1
#include "stm32l1xx.h"
#elifdef MR_USING_STM32L4
#include "stm32l4xx.h"
#elifdef MR_USING_STM32L5
#include "stm32l5xx.h"
#else
#error "Please define your board type in mr_board.h"
#endif
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _MR_BOARD_H_ */

View File

@@ -0,0 +1,83 @@
menu "Board configure"
config MR_USING_STM32F4
bool "Enable STM32F4 driver"
default y
menu "ADC"
config MR_USING_ADC1
bool "Enable ADC1 driver"
default n
endmenu
menu "UART"
config MR_USING_UART1
bool "Enable UART1 driver"
default n
config MR_USING_UART2
bool "Enable UART2 driver"
default n
config MR_USING_UART6
bool "Enable UART6 driver"
default n
endmenu
menu "SPI"
config MR_USING_SPI1
bool "Enable SPI1 driver"
default n
config MR_USING_SPI2
bool "Enable SPI2 driver"
default n
config MR_USING_SPI3
bool "Enable SPI3 driver"
default n
config MR_USING_SPI4
bool "Enable SPI3 driver"
default n
config MR_USING_SPI5
bool "Enable SPI5 driver"
default n
endmenu
menu "Timer"
config MR_USING_TIMER1
bool "Enable Timer1 driver"
default n
config MR_USING_TIMER2
bool "Enable Timer2 driver"
default n
config MR_USING_TIMER3
bool "Enable Timer3 driver"
default n
config MR_USING_TIMER4
bool "Enable Timer4 driver"
default n
config MR_USING_TIMER5
bool "Enable Timer5 driver"
default n
config MR_USING_TIMER9
bool "Enable Timer9 driver"
default n
config MR_USING_TIMER10
bool "Enable Timer10 driver"
default n
config MR_USING_TIMER11
bool "Enable Timer11 driver"
default n
endmenu
endmenu

View File

@@ -0,0 +1,127 @@
/*
* @copyright (c) 2023, MR Development Team
*
* @license SPDX-License-Identifier: Apache-2.0
*
* @date 2023-12-12 MacRsh First version
*/
#ifndef _MR_BOARD_H_
#define _MR_BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#include "stm32f4xx.h"
#define DRV_ADC_CHANNEL_CONFIG \
{ \
{ADC_CHANNEL_0}, \
{ADC_CHANNEL_1}, \
{ADC_CHANNEL_2}, \
{ADC_CHANNEL_3}, \
{ADC_CHANNEL_4}, \
{ADC_CHANNEL_5}, \
{ADC_CHANNEL_6}, \
{ADC_CHANNEL_7}, \
{ADC_CHANNEL_8}, \
{ADC_CHANNEL_9}, \
{ADC_CHANNEL_10}, \
{ADC_CHANNEL_11}, \
{ADC_CHANNEL_12}, \
{ADC_CHANNEL_13}, \
{ADC_CHANNEL_14}, \
{ADC_CHANNEL_15}, \
{ADC_CHANNEL_16}, \
{ADC_CHANNEL_17}, \
}
#define DRV_PIN_IRQ_MAP_CONFIG \
{ \
EXTI0_IRQn, \
EXTI1_IRQn, \
EXTI2_IRQn, \
EXTI3_IRQn, \
EXTI4_IRQn, \
EXTI9_5_IRQn, \
EXTI9_5_IRQn, \
EXTI9_5_IRQn, \
EXTI9_5_IRQn, \
EXTI9_5_IRQn, \
EXTI15_10_IRQn, \
EXTI15_10_IRQn, \
EXTI15_10_IRQn, \
EXTI15_10_IRQn, \
EXTI15_10_IRQn, \
EXTI15_10_IRQn, \
}
#if !defined(GPIOD) && !defined(GPIOE)
#define DRV_PIN_PORT_CONFIG \
{ \
GPIOA, \
GPIOB, \
GPIOC, \
}
#elif defined(GPIOE)
#define DRV_PIN_PORT_CONFIG \
{ \
GPIOA, \
GPIOB, \
GPIOC, \
GPIOD, \
}
#else
#define DRV_PIN_PORT_CONFIG \
{ \
GPIOA, \
GPIOB, \
GPIOC, \
GPIOD, \
GPIOE, \
}
#endif /* GPIOD */
#define DRV_PIN_CONFIG \
{ \
GPIO_PIN_0, \
GPIO_PIN_1, \
GPIO_PIN_2, \
GPIO_PIN_3, \
GPIO_PIN_4, \
GPIO_PIN_5, \
GPIO_PIN_6, \
GPIO_PIN_7, \
GPIO_PIN_8, \
GPIO_PIN_9, \
GPIO_PIN_10, \
GPIO_PIN_11, \
GPIO_PIN_12, \
GPIO_PIN_13, \
GPIO_PIN_14, \
GPIO_PIN_15, \
}
#define DRV_TIMER1_INFO_CONFIG \
{0, UINT16_MAX, UINT16_MAX}
#define DRV_TIMER2_INFO_CONFIG \
{0, UINT16_MAX, UINT32_MAX}
#define DRV_TIMER3_INFO_CONFIG \
{0, UINT16_MAX, UINT16_MAX}
#define DRV_TIMER4_INFO_CONFIG \
{0, UINT16_MAX, UINT16_MAX}
#define DRV_TIMER5_INFO_CONFIG \
{0, UINT16_MAX, UINT32_MAX}
#define DRV_TIMER9_INFO_CONFIG \
{0, UINT16_MAX, UINT16_MAX}
#define DRV_TIMER10_INFO_CONFIG \
{0, UINT16_MAX, UINT16_MAX}
#define DRV_TIMER11_INFO_CONFIG \
{0, UINT16_MAX, UINT16_MAX}
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* _MR_BOARD_H_ */