2023-11-11 02:07:22 +08:00
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/*
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* @copyright (c) 2023, MR Development Team
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*
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* @license SPDX-License-Identifier: Apache-2.0
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*
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* @date 2023-10-18 MacRsh First version
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*/
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#ifndef _MR_DEF_H_
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#define _MR_DEF_H_
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#include <stdint.h>
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#include <stdarg.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include "mr_config.h"
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#include "mr_board.h"
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @brief MR version.
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*/
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2023-11-12 00:33:40 +08:00
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#define MR_VERSION "0.0.6"
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Compiler related.
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*/
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#if defined(__ARMCC_VERSION)
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#define MR_SECTION(x) __attribute__((section(x)))
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#define MR_USED __attribute__((used))
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#define MR_WEAK __attribute__((weak))
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#define MR_INLINE static __inline
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#elif defined (__IAR_SYSTEMS_ICC__)
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#define MR_SECTION(x) @ x
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#define MR_USED __root
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#define MR_WEAK __weak
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#define MR_INLINE static inline
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#elif defined (__GNUC__)
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#define MR_SECTION(x) __attribute__((section(x)))
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#define MR_USED __attribute__((used))
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#define MR_WEAK __attribute__((weak))
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#define MR_INLINE static __inline
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#elif defined (__ADSPBLACKFIN__)
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#define MR_SECTION(x) __attribute__((section(x)))
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#define MR_USED __attribute__((used))
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#define MR_WEAK __attribute__((weak))
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#define MR_INLINE static inline
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#elif defined (_MSC_VER)
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#define MR_SECTION(x)
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#define MR_USED
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#define MR_WEAK
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#define MR_INLINE static __inline
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#elif defined (__TASKING__)
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#define MR_SECTION(x) __attribute__((section(x)))
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#define MR_USED __attribute__((used, protect))
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#define MR_WEAK __attribute__((weak))
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#define MR_INLINE static inline
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#endif /* __ARMCC_VERSION */
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typedef int (*mr_init_fn_t)(void);
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/**
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* @brief Exports an auto initialization function.
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*/
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#define MR_INIT_EXPORT(fn, level) \
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MR_USED const mr_init_fn_t _mr_auto_init_##fn MR_SECTION(".auto_init."level) = fn
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/**
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* @brief Exports a board auto initialization function.
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*/
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#define MR_INIT_BOARD_EXPORT(fn) MR_INIT_EXPORT(fn, "1")
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2023-11-12 00:33:40 +08:00
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/**
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* @brief Exports a console auto initialization function.
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*/
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#define MR_INIT_CONSOLE_EXPORT(fn) MR_INIT_EXPORT(fn, "2")
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Exports a driver auto initialization function.
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*/
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2023-11-12 00:33:40 +08:00
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#define MR_INIT_DRV_EXPORT(fn) MR_INIT_EXPORT(fn, "3")
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Exports a device auto initialization function.
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*/
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2023-11-12 00:33:40 +08:00
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#define MR_INIT_DEV_EXPORT(fn) MR_INIT_EXPORT(fn, "4")
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Exports a app auto initialization function.
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*/
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2023-11-15 17:19:24 +08:00
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#define MR_INIT_APP_EXPORT(fn) MR_INIT_EXPORT(fn, "5")
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Error code.
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*/
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#define MR_EOK (0) /**< No error */
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#define MR_ENOMEM (-1) /**< No enough memory */
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#define MR_EIO (-2) /**< I/O error */
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#define MR_ENOTFOUND (-3) /**< Not found */
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#define MR_EBUSY (-4) /**< Resource busy */
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#define MR_EEXIST (-5) /**< Exists */
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#define MR_ENOTSUP (-6) /**< Operation not supported */
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#define MR_EINVAL (-7) /**< Invalid argument */
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/**
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* @brief Null pointer.
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*/
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#define MR_NULL ((void *)0)
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/**
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2023-11-13 01:25:01 +08:00
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* @brief Disable/enable.
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2023-11-11 02:07:22 +08:00
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*/
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#define MR_DISABLE (0) /**< Disable */
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2023-11-13 01:25:01 +08:00
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#define MR_ENABLE (1) /**< Enable */
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Double linked list structure.
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*/
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struct mr_list
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{
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struct mr_list *next; /**< Point to next node */
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struct mr_list *prev; /**< Point to prev node */
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};
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/**
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* @brief Ring buffer structure.
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*/
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struct mr_ringbuf
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{
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uint8_t *buffer; /**< Buffer pool */
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uint16_t size; /**< Buffer pool size */
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uint16_t read_mirror: 1; /**< Read mirror flag */
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uint16_t write_mirror: 1; /**< Write mirror flag */
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uint16_t reserved: 14; /**< Reserved */
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uint16_t read_index; /**< Read index */
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uint16_t write_index; /**< Write index */
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};
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/**
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* @brief Driver types.
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*/
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enum mr_drv_type
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{
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2023-11-12 00:33:40 +08:00
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Mr_Drv_Type_Gpio = 0, /**< GPIO */
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Mr_Drv_Type_Spi, /**< SPI */
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Mr_Drv_Type_I2c, /**< I2C */
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Mr_Drv_Type_Uart, /**< UART */
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Mr_Drv_Type_Adc, /**< ADC */
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Mr_Drv_Type_Dac, /**< DAC */
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Mr_Drv_Type_Timer, /**< Timer */
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2023-11-11 02:07:22 +08:00
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};
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/**
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* @brief Driver structure.
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*/
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struct mr_drv
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{
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uint32_t type; /**< Device type */
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void *ops; /**< Driver operations */
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void *data; /**< Driver data */
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};
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/**
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* @brief Device types.
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*/
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enum mr_dev_type
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{
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Mr_Dev_Type_Gpio = Mr_Drv_Type_Gpio, /**< GPIO */
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Mr_Dev_Type_Spi = Mr_Drv_Type_Spi, /**< SPI */
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Mr_Dev_Type_I2c = Mr_Drv_Type_I2c, /**< I2C */
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Mr_Dev_Type_Uart = Mr_Drv_Type_Uart, /**< UART */
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Mr_Dev_Type_Adc = Mr_Drv_Type_Adc, /**< ADC */
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Mr_Dev_Type_Dac = Mr_Drv_Type_Dac, /**< DAC */
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Mr_Dev_Type_Timer = Mr_Drv_Type_Timer, /**< Timer */
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};
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struct mr_dev;
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/**
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* @brief Synchronous/asynchronous operation flag.
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*/
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#define MR_SYNC (0) /**< Synchronous */
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#define MR_ASYNC (1) /**< Asynchronous */
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/**
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* @brief Descriptor control command.
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*/
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2023-11-17 22:55:24 +08:00
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#define MR_CTRL_SET_OFFSET ((0x01|0x80) << 24) /**< Set offset */
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#define MR_CTRL_GET_OFFSET ((0x02|0x00) << 24) /**< Get offset */
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Device control general command.
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*/
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2023-11-16 01:49:46 +08:00
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#define MR_CTRL_SET_RD_CB ((0x01|0x80) << 24) /**< Set read callback */
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#define MR_CTRL_SET_WR_CB ((0x02|0x80) << 24) /**< Set write callback */
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#define MR_CTRL_SET_SLEEP ((0x03|0x80) << 24) /**< Set sleep */
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#define MR_CTRL_SET_WAKEUP ((0x04|0x80) << 24) /**< Set wakeup */
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#define MR_CTRL_GET_RD_CB ((0x01|0x00) << 24) /**< Get read callback */
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#define MR_CTRL_GET_WR_CB ((0x02|0x00) << 24) /**< Get write callback */
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Device control command.
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*/
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2023-11-16 01:49:46 +08:00
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#define MR_CTRL_SET_CONFIG ((0x01|0x80) << 20) /**< Set configuration */
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#define MR_CTRL_SET_RD_BUFSZ ((0x02|0x80) << 20) /**< Set read buffer size */
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#define MR_CTRL_SET_WR_BUFSZ ((0x03|0x80) << 20) /**< Set write buffer size */
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#define MR_CTRL_GET_CONFIG ((0x01|0x00) << 20) /**< Get configuration */
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#define MR_CTRL_GET_RD_BUFSZ ((0x02|0x00) << 20) /**< Get read buffer size */
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#define MR_CTRL_GET_WR_BUFSZ ((0x03|0x00) << 20) /**< Get write buffer size */
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2023-11-11 02:07:22 +08:00
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/**
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* @brief ISR event.
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*/
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2023-11-16 01:49:46 +08:00
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#define MR_ISR_EVENT_RD_INTER ((0x01) << 24) /**< Read interrupt */
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#define MR_ISR_EVENT_WR_INTER ((0x02) << 24) /**< Write interrupt */
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2023-11-17 23:18:12 +08:00
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#define MR_ISR_EVENT_INTER_MASK ((0xff) << 24) /**< Interrupt mask */
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2023-11-11 02:07:22 +08:00
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/**
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* @brief Device operations structure.
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*/
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struct mr_dev_ops
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{
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int (*open)(struct mr_dev *dev);
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int (*close)(struct mr_dev *dev);
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ssize_t (*read)(struct mr_dev *dev, int off, void *buf, size_t size, int sync_or_async);
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ssize_t (*write)(struct mr_dev *dev, int off, const void *buf, size_t size, int sync_or_async);
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int (*ioctl)(struct mr_dev *dev, int off, int cmd, void *args);
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ssize_t (*isr)(struct mr_dev *dev, int event, void *args);
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};
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/**
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* @brief Magic number.
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*/
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#define MR_MAGIC_NUMBER (0xdeadbeef)
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/**
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* @brief Lock flags.
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*/
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#define MR_LFLAG_RD ((0x01) << 24) /**< Read lock */
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#define MR_LFLAG_WR ((0x02) << 24) /**< Write lock */
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#define MR_LFLAG_RDWR ((0x03) << 24) /**< Read/write lock */
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#define MR_LFLAG_NONBLOCK ((0x04) << 24) /**< Non-blocking lock */
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#define MR_LFLAG_SLEEP ((0x08) << 24) /**< Sleep lock */
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/**
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* @brief Open flags.
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*/
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#define MR_OFLAG_CLOSED (0) /**< Closed */
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#define MR_OFLAG_RDONLY ((0x01) << 24) /**< Read only */
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#define MR_OFLAG_WRONLY ((0x02) << 24) /**< Write only */
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#define MR_OFLAG_RDWR ((0x03) << 24) /**< Read/write */
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#define MR_OFLAG_NONBLOCK ((0x04) << 24) /**< Non-blocking */
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#define MR_OFLAG_DMA ((0x08) << 24) /**< DMA */
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/**
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* @brief Support flags.
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*/
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#define MR_SFLAG_NONRDWR MR_OFLAG_CLOSED /**< Non-read/write */
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#define MR_SFLAG_RDONLY MR_OFLAG_RDONLY /**< Read only */
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#define MR_SFLAG_WRONLY MR_OFLAG_WRONLY /**< Write only */
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#define MR_SFLAG_RDWR MR_OFLAG_RDWR /**< Read/write */
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#define MR_SFLAG_NONBLOCK MR_OFLAG_NONBLOCK /**< Non-blocking */
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#define MR_SFLAG_DMA MR_OFLAG_DMA /**< DMA */
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#define MR_SFLAG_NONDRV ((0x10) << 24) /**< Non-driver */
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#define MR_SFLAG_ONLY ((0x20) << 24) /**< Only */
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/**
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* @brief Device structure.
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*/
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struct mr_dev
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{
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uint32_t magic; /**< Magic number */
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2023-11-12 00:33:40 +08:00
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#ifndef MR_CFG_NAME_MAX
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#define MR_CFG_NAME_MAX (8)
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#endif /* MR_CFG_NAME_MAX */
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char name[MR_CFG_NAME_MAX]; /**< Name */
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2023-11-11 02:07:22 +08:00
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struct mr_list list; /**< List */
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struct mr_list slist; /**< Slave list */
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void *link; /**< Link */
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uint32_t type; /**< Device type */
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size_t ref_count; /**< Reference count */
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#ifdef MR_USING_RDWR_CTRL
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uint32_t sflags; /**< Support flags */
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volatile uint32_t lflags; /**< Lock flags */
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#endif /* MR_USING_RDWR_CTRL */
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struct
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{
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int desc; /**< Device descriptor */
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int (*cb)(int desc, void *args); /**< Callback function */
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} rd_cb, wr_cb; /**< Read/write callback */
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const struct mr_dev_ops *ops; /**< Device operations */
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const struct mr_drv *drv; /**< Driver */
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};
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* _MR_DEF_H_ */
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