229 lines
11 KiB
ArmAsm
Executable File
229 lines
11 KiB
ArmAsm
Executable File
.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Set sp */
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ldr r0, = _estack
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ldr r0, [r0]
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msr msp, r0
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/* Call the application's entry point.*/
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bl start_kernel
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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* @param None
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* @retval None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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*******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word entry_handler /* Window WatchDog */
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.word entry_handler /* PVD through EXTI Line detection */
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.word entry_handler /* Tamper and TimeStamps through the EXTI line */
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.word entry_handler /* RTC Wakeup through the EXTI line */
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.word entry_handler /* FLASH */
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.word entry_handler /* RCC */
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.word entry_handler /* EXTI Line0 */
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.word entry_handler /* EXTI Line1 */
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.word entry_handler /* EXTI Line2 */
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.word entry_handler /* EXTI Line3 */
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.word entry_handler /* EXTI Line4 */
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.word entry_handler /* DMA1 Stream 0 */
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.word entry_handler /* DMA1 Stream 1 */
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.word entry_handler /* DMA1 Stream 2 */
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.word entry_handler /* DMA1 Stream 3 */
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.word entry_handler /* DMA1 Stream 4 */
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.word entry_handler /* DMA1 Stream 5 */
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.word entry_handler /* DMA1 Stream 6 */
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.word entry_handler /* ADC1, ADC2 and ADC3s */
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.word entry_handler /* CAN1 TX */
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.word entry_handler /* CAN1 RX0 */
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.word entry_handler /* CAN1 RX1 */
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.word entry_handler /* CAN1 SCE */
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.word entry_handler /* External Line[9:5]s */
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.word entry_handler /* TIM1 Break and TIM9 */
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.word entry_handler /* TIM1 Update and TIM10 */
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.word entry_handler /* TIM1 Trigger and Commutation and TIM11 */
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.word entry_handler /* TIM1 Capture Compare */
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.word entry_handler /* TIM2 */
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.word entry_handler /* TIM3 */
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.word entry_handler /* TIM4 */
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.word entry_handler /* I2C1 Event */
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.word entry_handler /* I2C1 Error */
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.word entry_handler /* I2C2 Event */
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.word entry_handler /* I2C2 Error */
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.word entry_handler /* SPI1 */
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.word entry_handler /* SPI2 */
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.word entry_handler /* USART1 */
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.word entry_handler /* USART2 */
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.word entry_handler /* USART3 */
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.word entry_handler /* External Line[15:10]s */
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.word entry_handler /* RTC Alarm (A and B) through EXTI Line */
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.word entry_handler /* USB OTG FS Wakeup through EXTI line */
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.word entry_handler /* TIM8 Break and TIM12 */
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.word entry_handler /* TIM8 Update and TIM13 */
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.word entry_handler /* TIM8 Trigger and Commutation and TIM14 */
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.word entry_handler /* TIM8 Capture Compare */
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.word entry_handler /* DMA1 Stream7 */
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.word entry_handler /* FSMC */
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.word entry_handler /* SDIO */
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.word entry_handler /* TIM5 */
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.word entry_handler /* SPI3 */
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.word entry_handler /* UART4 */
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.word entry_handler /* UART5 */
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.word entry_handler /* TIM6 and DAC1&2 underrun errors */
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.word entry_handler /* TIM7 */
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.word entry_handler /* DMA2 Stream 0 */
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.word entry_handler /* DMA2 Stream 1 */
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.word entry_handler /* DMA2 Stream 2 */
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.word entry_handler /* DMA2 Stream 3 */
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.word entry_handler /* DMA2 Stream 4 */
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.word entry_handler /* Ethernet */
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.word entry_handler /* Ethernet Wakeup through EXTI line */
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.word entry_handler /* CAN2 TX */
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.word entry_handler /* CAN2 RX0 */
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.word entry_handler /* CAN2 RX1 */
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.word entry_handler /* CAN2 SCE */
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.word entry_handler /* USB OTG FS */
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.word entry_handler /* DMA2 Stream 5 */
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.word entry_handler /* DMA2 Stream 6 */
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.word entry_handler /* DMA2 Stream 7 */
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.word entry_handler /* USART6 */
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.word entry_handler /* I2C3 event */
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.word entry_handler /* I2C3 error */
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.word entry_handler /* USB OTG HS End Point 1 Out */
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.word entry_handler /* USB OTG HS End Point 1 In */
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.word entry_handler /* USB OTG HS Wakeup through EXTI */
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.word entry_handler /* USB OTG HS */
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.word entry_handler /* DCMI */
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.word entry_handler /* CRYP crypto */
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.word entry_handler /* Hash and Rng */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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@ .weak NMI_Handler
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@ .thumb_set NMI_Handler,Default_Handler
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@ .weak HardFault_Handler
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@ .thumb_set HardFault_Handler,Default_Handler
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@ .weak MemManage_Handler
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@ .thumb_set MemManage_Handler,Default_Handler
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@ .weak BusFault_Handler
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@ .thumb_set BusFault_Handler,Default_Handler
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@ .weak UsageFault_Handler
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@ .thumb_set UsageFault_Handler,Default_Handler
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@ .weak SVC_Handler
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@ .thumb_set SVC_Handler,Default_Handler
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@ .weak DebugMon_Handler
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@ .thumb_set DebugMon_Handler,Default_Handler
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@ .weak PendSV_Handler
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@ .thumb_set PendSV_Handler,Default_Handler
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@ .weak SysTick_Handler
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@ .thumb_set SysTick_Handler,Default_Handler
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@ .weak entry_handler
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@ .thumb_set entry_handler,Default_Handler
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