168 lines
4.8 KiB
C
168 lines
4.8 KiB
C
#ifndef __DM9000_H
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#define __DM9000_H
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#include "mk_sys.h"
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#include "lwip/pbuf.h"
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//////////////////////////////////////////////////////////////////////////////////
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//本程序只供学习使用，未经作者许可，不得用于其它任何用途
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//ALIENTEK战舰STM32开发板V3
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//DM9000驱动代码
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//正点原子@ALIENTEK
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//技术论坛:www.openedv.com
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//创建日期:2015/3/15
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//版本：V1.0
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//版权所有，盗版必究。
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//Copyright(C) 广州市星翼电子科技有限公司 2009-2019
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//All rights reserved
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//////////////////////////////////////////////////////////////////////////////////
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#define DM9000_RST PGout(8) //DM9000复位引脚
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#define DM9000_INT PFin(11) //DM9000中断引脚
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//DM9000地址结构体
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typedef struct
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{
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vu16 REG;
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vu16 DATA;
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}DM9000_TypeDef;
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//使用NOR/SRAM的 Bank1.sector2,地址位HADDR[27,26]=01 A7作为数据命令区分线
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//注意设置时STM32内部会右移一位对其!
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#define DM9000_BASE ((volatile u32)(0x64000000|0x000000FE))
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#define DM9000 ((DM9000_TypeDef *) DM9000_BASE)
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#define DM9000_ID 0X90000A46 //DM9000 ID
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#define DM9000_PKT_MAX 1536 //DM9000最大接收包长度
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#define DM9000_PHY 0X40 //DM9000 PHY寄存器访问标志
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//DM9000寄存器
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#define DM9000_NCR 0X00
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#define DM9000_NSR 0X01
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#define DM9000_TCR 0X02
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#define DM9000_TSRI 0X03
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#define DM9000_TSRII 0X04
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#define DM9000_RCR 0X05
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#define DM9000_RSR 0X06
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#define DM9000_ROCR 0X07
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#define DM9000_BPTR 0X08
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#define DM9000_FCTR 0X09
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#define DM9000_FCR 0X0A
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#define DM9000_EPCR 0X0B
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#define DM9000_EPAR 0X0C
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#define DM9000_EPDRL 0X0D
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#define DM9000_EPDRH 0X0E
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#define DM9000_WCR 0X0F
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#define DM9000_PAR 0X10 //物理地址0X10~0X15
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#define DM9000_MAR 0X16 //多播地址0X16~0X1D
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#define DM9000_GPCR 0X1E
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#define DM9000_GPR 0X1F
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#define DM9000_TRPAL 0X22
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#define DM9000_TRPAH 0X23
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#define DM9000_RWPAL 0X24
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#define DM9000_RWPAH 0X25
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#define DM9000_VIDL 0X28
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#define DM9000_VIDH 0X29
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#define DM9000_PIDL 0X2A
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#define DM9000_PIDH 0X2B
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#define DM9000_CHIPR 0X2C
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#define DM9000_TCR2 0X2D
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#define DM9000_OCR 0X2E
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#define DM9000_SMCR 0X2F
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#define DM9000_ETXCSR 0X30
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#define DM9000_TCSCR 0X31
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#define DM9000_RCSCSR 0X32
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#define DM9000_MRCMDX 0XF0
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#define DM9000_MRCMDX1 0XF1
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#define DM9000_MRCMD 0XF2
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#define DM9000_MRRL 0XF4
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#define DM9000_MRRH 0XF5
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#define DM9000_MWCMDX 0XF6
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#define DM9000_MWCMD 0XF8
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#define DM9000_MWRL 0XFA
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#define DM9000_MWRH 0XFB
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#define DM9000_TXPLL 0XFC
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#define DM9000_TXPLH 0XFD
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#define DM9000_ISR 0XFE
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#define DM9000_IMR 0XFF
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#define NCR_RST 0X01
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#define NSR_SPEED 0X80
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#define NSR_LINKST 0X40
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#define NSR_WAKEST 0X20
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#define NSR_TX2END 0X08
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#define NSR_TX1END 0X04
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#define NSR_RXOV 0X02
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#define RCR_DIS_LONG 0X20
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#define RCR_DIS_CRC 0X10
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#define RCR_ALL 0X08
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#define RCR_RXEN 0X01
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#define IMR_PAR 0X80
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#define IMR_ROOI 0X08
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#define IMR_POI 0X04 //使能接收溢出中断
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#define IMR_PTI 0X02 //使能发送中断
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#define IMR_PRI 0X01 //使能接收中断
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#define ISR_LNKCHGS (1<<5)
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#define ISR_ROOS (1<<3)
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#define ISR_ROS (1<<2)
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#define ISR_PTS (1<<1)
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#define ISR_PRS (1<<0)
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#define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS)
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//DM9000内部PHY寄存器
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#define DM9000_PHY_BMCR 0X00
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#define DM9000_PHY_BMSR 0X01
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#define DM9000_PHY_PHYID1 0X02
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#define DM9000_PHY_PHYID2 0X03
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#define DM9000_PHY_ANAR 0X04
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#define DM9000_PHY_ANLPAR 0X05
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#define DM9000_PHY_ANER 0X06
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#define DM9000_PHY_DSCR 0X10
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#define DM9000_PHY_DSCSR 0X11
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#define DM9000_PHY_10BTCSR 0X12
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#define DM9000_PHY_PWDOR 0X13
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#define DM9000_PHY_SCR 0X14
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//DM9000工作模式定义
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enum DM9000_PHY_mode
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{
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DM9000_10MHD = 0, //10M半双工
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DM9000_100MHD = 1, //100M半双工
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DM9000_10MFD = 4, //10M全双工
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DM9000_100MFD = 5, //100M全双工
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DM9000_AUTO = 8, //自动协商
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};
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//DM9000配置结构体
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struct dm9000_config
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{
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enum DM9000_PHY_mode mode; //工作模式
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u8 imr_all; //中断类型
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u16 queue_packet_len; //每个数据包大小
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u8 mac_addr[6]; //MAC地址
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u8 multicase_addr[8]; //组播地址
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};
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extern struct dm9000_config dm9000cfg; //dm9000配置结构体
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u8 DM9000_Init(u8 mode);
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u16 DM9000_ReadReg(u16 reg);
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void DM9000_WriteReg(u16 reg,u16 data);
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u16 DM9000_PHY_ReadReg(u16 reg);
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void DM9000_PHY_WriteReg(u16 reg,u16 data);
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u32 DM9000_Get_DeiviceID(void);
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u8 DM9000_Get_SpeedAndDuplex(void);
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void DM9000_Set_PHYMode(u8 mode);
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void DM9000_Set_MACAddress(u8 *macaddr);
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void DM9000_Set_Multicast(u8 *multicastaddr);
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void DM9000_Reset(void);
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void DM9000_SendPacket(struct pbuf *p);
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struct pbuf *DM9000_Receive_Packet(void);
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void DMA9000_ISRHandler(void);
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#endif
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