82 lines
3.5 KiB
C
82 lines
3.5 KiB
C
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#include "stm32f10x_conf.h"
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#include <string.h>
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// 使用NOR/SRAM的 Bank1.sector3,地址位HADDR[27,26]=10
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// 对IS61LV25616/IS62WV25616,地址线范围为A0~A17
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// 对IS61LV51216/IS62WV51216,地址线范围为A0~A18
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#define Bank1_SRAM3_ADDR ((u32)(0x68000000))
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// 初始化外部SRAM
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void FSMC_SRAM_Init(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef readWriteTiming;
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GPIO_InitTypeDef GPIO_InitStructure;
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memset(&FSMC_NORSRAMInitStructure, 0, sizeof(FSMC_NORSRAMInitStructure));
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memset(&readWriteTiming, 0, sizeof(readWriteTiming));
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memset(&GPIO_InitStructure, 0, sizeof(GPIO_InitStructure));
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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GPIO_InitStructure.GPIO_Pin = 0xFF33; // PORTD复用推挽输出
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; // 复用推挽输出
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = 0xFF83; // PORTE复用推挽输出
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = 0xF03F; // PORTD复用推挽输出
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GPIO_Init(GPIOF, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = 0x043F; // PORTD复用推挽输出
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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readWriteTiming.FSMC_AddressSetupTime = 0; // 地址建立时间（ADDSET）为1个HCLK 1/36M=27ns
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readWriteTiming.FSMC_AddressHoldTime = 0; // 地址保持时间（ADDHLD）模式A未用到
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readWriteTiming.FSMC_DataSetupTime = 3; // 数据保持时间（DATAST）为3个HCLK 4/72M=55ns(对EM的SRAM芯片)
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readWriteTiming.FSMC_BusTurnAroundDuration = 0;
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readWriteTiming.FSMC_CLKDivision = 0x00;
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readWriteTiming.FSMC_DataLatency = 0x00;
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readWriteTiming.FSMC_AccessMode = FSMC_AccessMode_A; // 模式A
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; // 这里我们使用NE3 ，也就对应BTCR[4],[5]。
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; // FSMC_MemoryType_SRAM; //SRAM
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; // 存储器数据宽度为16bit
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; // FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; // 存储器写使能
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; // 读写使用相同的时序
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &readWriteTiming;
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &readWriteTiming; // 读写同样时序
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); // 初始化FSMC配置
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FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); // 使能BANK3
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}
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int sram_test(void)
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{
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vs32 *sram3_addr = (vs32 *)Bank1_SRAM3_ADDR;
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int i = 0;
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for (i = 0; i < 1024 * 1024 / 4; i++)
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{
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sram3_addr[i] = i;
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}
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for (i = 0; i < 1024 * 1024 / 4; i++)
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{
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if (i != sram3_addr[i])
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{
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return 0;
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}
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}
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return 1;
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}
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