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中断完善

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This commit is contained in:
zhangzheng
2024-04-09 19:28:50 +08:00
parent 6eac1dad30
commit c69aa81664
12 changed files with 87 additions and 82 deletions
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6
.vscode/launch.json vendored
View File

@@ -46,9 +46,9 @@
"environment": [],
"externalConsole": false,
// "miDebuggerPath": "/opt/homebrew/bin/arm-none-eabi-gdb",
"miDebuggerPath": "/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
// "miDebuggerPath": "/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/arm-none-eabi-gdb",
"miDebuggerServerAddress": "127.0.0.1:3333",
// "miDebuggerPath": "/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
"miDebuggerPath": "/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
"miDebuggerServerAddress": "127.0.0.1:33333",
"MIMode": "gdb",
"setupCommands": [
{

4
.vscode/settings.json vendored
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@@ -62,7 +62,9 @@
"u_log.h": "c",
"elf.h": "c",
"u_vmam.h": "c",
"u_arch_hard.h": "c"
"u_arch_hard.h": "c",
"arm_gicv2.h": "c",
"sche_arch.h": "c"
},
"cortex-debug.showRTOS": false,
"cortex-debug.variableUseNaturalFormat": false,

6
mkrtos_configs/aarch64_qemu_defconfig
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@@ -12,9 +12,9 @@ CONFIG_INIT_TASK_OFFSET=0x10000
CONFIG_BOOTFS_OFFSET=0x02000000
CONFIG_MK_MPU_CFG=n
CONFIG_FT_ADDR_NR=16
CONFIG_SYS_SCHE_HZ=100
CONFIG_USER_ISR_START_NO=16
CONFIG_IRQ_REG_TAB_SIZE=80
CONFIG_SYS_SCHE_HZ=1000
CONFIG_USER_ISR_START_NO=0
CONFIG_IRQ_REG_TAB_SIZE=288
CONFIG_REGION_NUM=8
CONFIG_OBJ_MAP_TAB_SIZE=32
CONFIG_OBJ_MAP_ENTRY_SIZE=170

7
mkrtos_knl/arch/aarch64/aarch64_qemu/arch.c
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@@ -44,13 +44,19 @@ void sys_reset(void)
{
/*TODO:*/
}
umword_t arch_get_isr_no(void)
{
return gicv2_get_irqnr(arm_gicv2_get_global());
}
void arch_disable_irq(int inx)
{
/*TODO:*/
gic2_set_mask(arm_gicv2_get_global(), inx);
}
void arch_enable_irq(int inx)
{
/*TODO:*/
gic2_set_unmask(arm_gicv2_get_global(), inx);
}
uint32_t arch_get_sys_clk(void)
{
@@ -60,6 +66,7 @@ uint32_t arch_get_sys_clk(void)
void arch_set_enable_irq_prio(int inx, int sub_prio, int pre_prio)
{
/*TODO:*/
gic2_set_prio(arm_gicv2_get_global(), inx, pre_prio);
}
extern char _data_boot[], _edata_boot[];
extern char _text_boot[], _etext_boot[];

48
mkrtos_knl/arch/aarch64/aarch64_qemu/arch.h
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@@ -11,12 +11,14 @@
#pragma once
#include "types.h"
#include <thread_arch.h>
#include <aarch64_ptregs.h>
#include <asm/mm.h>
#include <mmu.h>
#include <thread_arch.h>
#define ARCH_WORD_SIZE 64
#define LOG_INTR_NO 37 // USART1_IRQn
#define SYSTICK_INTR_NO 30
#define LOG_INTR_NO 37 // USART1_IRQn
/// @brief 线程信息
typedef struct
@@ -26,8 +28,7 @@ typedef struct
umword_t lr;
umword_t pc;
} pf_s_t;
typedef struct pf
{
typedef struct pf {
struct
{
mword_t regs[31]; //!< 基础寄存器
@@ -45,8 +46,7 @@ typedef struct pf
mword_t stackframe[2];
} pf_t;
typedef struct sp_info
{
typedef struct sp_info {
mword_t x19;
mword_t x20;
mword_t x21;
@@ -60,7 +60,7 @@ typedef struct sp_info
mword_t fp; // x29
mword_t sp;
mword_t pc;
mword_t u_sp;//user_sp
mword_t u_sp; // user_sp
} sp_info_t;
#define _barrier() __asm__ __volatile__("" : : : "memory")
@@ -70,19 +70,18 @@ typedef struct sp_info
#define _dsb(ins) \
asm volatile("dsb " #ins : : : "memory")
#define __arch_getl(a) (*(volatile unsigned int *)(a))
#define __arch_getl(a) (*(volatile unsigned int *)(a))
#define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v))
#define __iormb() _barrier()
#define __iowmb() _barrier()
#define readl(c) ({ unsigned int __v = __arch_getl(c); __iormb(); __v; })
#define readl(c) ({ unsigned int __v = __arch_getl(c); __iormb(); __v; })
#define writel(v, c) ({ unsigned int __v = v; __iowmb(); __arch_putl(__v,c); })
#define read_reg(addr) (*((volatile umword_t *)(addr)))
#define write_reg(addr, data) \
do \
{ \
do { \
_barrier(); \
(*((volatile umword_t *)(addr))) = data; \
_barrier(); \
@@ -90,8 +89,7 @@ typedef struct sp_info
#define read_reg32(addr) (*((volatile uint32_t *)(addr)))
#define write_reg32(addr, data) \
do \
{ \
do { \
_barrier(); \
(*((volatile uint32_t *)(addr))) = (uint32_t)data; \
_barrier(); \
@@ -124,25 +122,22 @@ static inline int arch_get_current_cpu_id(void)
}
#define is_run_knl() \
({ \
/*TODO:*/ \
})
({/*TODO:*/ \
0})
void to_sche(void);
#define get_sp() ( \
{ \
mword_t sp; \
do \
{ \
do { \
asm volatile("mov %0, sp" : "=r"(sp)); \
} while (0); \
sp; \
})
#define set_sp(sp) ( \
{ \
do \
{ \
do { \
asm volatile("mov sp, %0" : : "r"(sp)); \
} while (0); \
})
@@ -150,11 +145,8 @@ static inline umword_t arch_get_sp(void)
{
return get_sp();
}
static inline umword_t arch_get_isr_no(void)
{
/*TODO:获取中断号*/
return 0;
}
umword_t arch_get_isr_no(void);
static inline void arch_set_knl_sp(umword_t sp)
{
set_sp(sp);
@@ -178,8 +170,7 @@ void arch_set_enable_irq_prio(int inx, int sub_prio, int pre_prio);
* 开中断
*/
#define sti() \
do \
{ \
do { \
asm volatile( \
"msr daifclr, #3" \
: \
@@ -191,8 +182,7 @@ void arch_set_enable_irq_prio(int inx, int sub_prio, int pre_prio);
* 关中断
*/
#define cli() \
do \
{ \
do { \
asm volatile( \
"msr daifset, #3" \
: \

75
mkrtos_knl/arch/aarch64/arm_gicv2.h
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@@ -1,10 +1,10 @@
#pragma once
#include <types.h>
#include <arch.h>
#include <printk.h>
#include <util.h>
#include <assert.h>
#include <printk.h>
#include <types.h>
#include <util.h>
// #include <timer.h>
/*
* ID0-ID15，分配给SGI (一般会将0-7给REE,8-15给TEE)
@@ -14,8 +14,7 @@
* ID1024-ID8191，reserved
* 8192及其以上，LPI
*/
typedef struct gic
{
typedef struct gic {
uint16_t irqs_number; //!< 支持的irq数量
addr_t disp_base_addr; //!< 分发器起始地址
@@ -25,33 +24,33 @@ typedef struct gic
// #define GIC2_BASE (0xFF840000)
// #define GIC2_GICD_BASE (GIC2_BASE + 0x1000)
#define GICD_CTLR(GIC2_GICD_BASE) (0x0 + GIC2_GICD_BASE)
#define GICD_TYPER(GIC2_GICD_BASE) (0x4 + GIC2_GICD_BASE)
#define GICD_IIDR(GIC2_GICD_BASE) (0x8 + GIC2_GICD_BASE)
#define GICD_IGROUPRn(GIC2_GICD_BASE) (0x80 + GIC2_GICD_BASE)
#define GICD_ISENABLERn(GIC2_GICD_BASE) (0x100 + GIC2_GICD_BASE)
#define GICD_ICENABLERn(GIC2_GICD_BASE) (0x180 + GIC2_GICD_BASE)
#define GICD_ISPENDRn(GIC2_GICD_BASE) (0x200 + GIC2_GICD_BASE)
#define GICD_ICPENDRn(GIC2_GICD_BASE) (0x280 + GIC2_GICD_BASE)
#define GICD_ISACTIVERn(GIC2_GICD_BASE) (0x300 + GIC2_GICD_BASE)
#define GICD_ICACTIVERn(GIC2_GICD_BASE) (0x380 + GIC2_GICD_BASE)
#define GICD_CTLR(GIC2_GICD_BASE) (0x0 + GIC2_GICD_BASE)
#define GICD_TYPER(GIC2_GICD_BASE) (0x4 + GIC2_GICD_BASE)
#define GICD_IIDR(GIC2_GICD_BASE) (0x8 + GIC2_GICD_BASE)
#define GICD_IGROUPRn(GIC2_GICD_BASE) (0x80 + GIC2_GICD_BASE)
#define GICD_ISENABLERn(GIC2_GICD_BASE) (0x100 + GIC2_GICD_BASE)
#define GICD_ICENABLERn(GIC2_GICD_BASE) (0x180 + GIC2_GICD_BASE)
#define GICD_ISPENDRn(GIC2_GICD_BASE) (0x200 + GIC2_GICD_BASE)
#define GICD_ICPENDRn(GIC2_GICD_BASE) (0x280 + GIC2_GICD_BASE)
#define GICD_ISACTIVERn(GIC2_GICD_BASE) (0x300 + GIC2_GICD_BASE)
#define GICD_ICACTIVERn(GIC2_GICD_BASE) (0x380 + GIC2_GICD_BASE)
#define GICD_IPRIORITYRn(GIC2_GICD_BASE) (0x400 + GIC2_GICD_BASE)
#define GICD_ITARGETSRn(GIC2_GICD_BASE) (0x800 + GIC2_GICD_BASE)
#define GICD_ICFGRn(GIC2_GICD_BASE) (0xC00 + GIC2_GICD_BASE)
#define GICD_SGIR(GIC2_GICD_BASE) (0xf00 + GIC2_GICD_BASE)
#define GICD_CPENDSGIRn(GIC2_GICD_BASE) (0xf10 + GIC2_GICD_BASE)
#define GICD_SPENDSGIRn(GIC2_GICD_BASE) (0xf20 + GIC2_GICD_BASE)
#define GICD_ITARGETSRn(GIC2_GICD_BASE) (0x800 + GIC2_GICD_BASE)
#define GICD_ICFGRn(GIC2_GICD_BASE) (0xC00 + GIC2_GICD_BASE)
#define GICD_SGIR(GIC2_GICD_BASE) (0xf00 + GIC2_GICD_BASE)
#define GICD_CPENDSGIRn(GIC2_GICD_BASE) (0xf10 + GIC2_GICD_BASE)
#define GICD_SPENDSGIRn(GIC2_GICD_BASE) (0xf20 + GIC2_GICD_BASE)
// #define (GIC2_GICC_BASE) (GIC2_BASE + 0x2000)
#define GICC_CTLR(GIC2_GICC_BASE) (0x0 + GIC2_GICC_BASE)
#define GICC_PMR(GIC2_GICC_BASE) (0x4 + GIC2_GICC_BASE)
#define GICC_BPR(GIC2_GICC_BASE) (0x8 + GIC2_GICC_BASE)
#define GICC_IAR(GIC2_GICC_BASE) (0xc + GIC2_GICC_BASE)
#define GICC_EOIR(GIC2_GICC_BASE) (0x10 + GIC2_GICC_BASE)
#define GICC_RPR(GIC2_GICC_BASE) (0x14 + GIC2_GICC_BASE)
#define GICC_CTLR(GIC2_GICC_BASE) (0x0 + GIC2_GICC_BASE)
#define GICC_PMR(GIC2_GICC_BASE) (0x4 + GIC2_GICC_BASE)
#define GICC_BPR(GIC2_GICC_BASE) (0x8 + GIC2_GICC_BASE)
#define GICC_IAR(GIC2_GICC_BASE) (0xc + GIC2_GICC_BASE)
#define GICC_EOIR(GIC2_GICC_BASE) (0x10 + GIC2_GICC_BASE)
#define GICC_RPR(GIC2_GICC_BASE) (0x14 + GIC2_GICC_BASE)
#define GICC_HPPIR(GIC2_GICC_BASE) (0x18 + GIC2_GICC_BASE)
#define GICC_APRn(GIC2_GICC_BASE) (0xd0 + GIC2_GICC_BASE)
#define GICC_IIDR(GIC2_GICC_BASE) (0x00FC + GIC2_GICC_BASE)
#define GICC_APRn(GIC2_GICC_BASE) (0xd0 + GIC2_GICC_BASE)
#define GICC_IIDR(GIC2_GICC_BASE) (0x00FC + GIC2_GICC_BASE)
#define MAX_INTR_NO 1020
@@ -227,14 +226,12 @@ static inline void gic_dist_init(gic_t *irq)
{
gic_disable(irq);
for (int i = 32; i < irq->irqs_number; i++)
{
for (int i = 32; i < irq->irqs_number; i++) {
gic2_set_unmask(irq, i);
gic2_set_edge_mode(irq, i, 0);
gic2_clear_active(irq, i);
}
for (int i = 0; i < 16; i++)
{
for (int i = 0; i < 16; i++) {
gic2_set_unmask(irq, i);
}
@@ -243,8 +240,7 @@ static inline void gic_dist_init(gic_t *irq)
static inline void gic_inter_init(gic_t *irq)
{
for (int i = 0; i < 32; i++)
{
for (int i = 0; i < 32; i++) {
gic2_set_prio(irq, i, 0xa0);
}
@@ -258,8 +254,7 @@ static inline void gic2_eoi_irq(gic_t *irq, int inx)
static inline void gic_init(gic_t *irq, addr_t disp_addr, addr_t inter_addr)
{
irq->irqs_number = ((read_reg32(GICD_TYPER(disp_addr)) & 0x1ful) + 1) * 32;
if (irq->irqs_number > MAX_INTR_NO)
{
if (irq->irqs_number > MAX_INTR_NO) {
irq->irqs_number = MAX_INTR_NO;
}
irq->disp_base_addr = disp_addr;
@@ -271,6 +266,14 @@ static inline void gic_init(gic_t *irq, addr_t disp_addr, addr_t inter_addr)
gic_inter_init(irq);
}
gic_t *arm_gicv2_get_global(void);
static inline uint32_t gicv2_get_irqnr(gic_t *m_gic)
{
uint32_t irqstat =
read_reg32(GICC_IAR(m_gic->inter_base_addr));
uint32_t irqnr = irqstat & 0x3ff;
return irqnr;
}
// static inline void gic_handle_irq(void)
// {
// extern gic_t m_irq;

3
mkrtos_knl/drivers/aarch64_qemu/systick/systick.c
View File

@@ -9,11 +9,12 @@ umword_t sys_tick_cnt_get(void)
return sys_tick_cnt;
}
#include <asm/arm_local_reg.h>
#include <arm_gicv2.h>
extern void handle_timer_irq(void);
void SysTick_Handler(void)
{
handle_timer_irq(); // TODO:定时器的处理应该被分流，这里处理还有点问题，而且最好采用通用定时器
gic2_eoi_irq(arm_gicv2_get_global(), arch_get_isr_no());
// 进行上下文切换
sys_tick_cnt++;
thread_timeout_check(1);

2
mkrtos_knl/inc/knl/thread.h
View File

@@ -123,7 +123,7 @@ typedef struct thread
umword_t magic; //!< maigc
} thread_t;
static inline void thread_set_msg_buf(thread_t *th, void *msg, void *umsg)
static inline void thread_set_msg_bug(thread_t *th, void *msg, void *umsg)
{
th->msg.msg = msg;
th->msg.umsg = umsg;

2
mkrtos_knl/knl/syscall.c
View File

@@ -38,7 +38,7 @@ void syscall_entry(entry_frame_t *entry)
goto end;
}
}
sti();
if (kobj->invoke_func)
{
kobj->invoke_func(kobj, sys_p, msg_tag_init(entry->regs[0]), entry);

6
mkrtos_knl/knl/thread_knl.c
View File

@@ -101,7 +101,7 @@ static void knl_init_1(void)
task_knl_init(&knl_task);
thread_knl_pf_set(knl_thread, knl_main);
thread_bind(knl_thread, &knl_task.kobj);
thread_set_msg_buf(knl_thread, knl_msg_buf, knl_msg_buf);
thread_set_msg_bug(knl_thread, knl_msg_buf, knl_msg_buf);
thread_ready(knl_thread, FALSE);
slist_init(&del_task_head);
@@ -146,7 +146,7 @@ static void knl_init_2(void)
assert(task_vma_alloc(&init_task->mm_space.mem_vma,
vma_addr_create(VPAGE_PROT_RO, VMA_ADDR_RESV, CONFIG_BOOT_FS_VADDR),
cpio_get_size(cpio_images), (paddr_t)cpio_images, 0) >= 0);
thread_set_msg_buf(init_thread, (void *)init_msg_buf, (void *)CONFIG_MSG_BUF_VADDR);
thread_set_msg_bug(init_thread, (void *)init_msg_buf, (void *)CONFIG_MSG_BUF_VADDR);
thread_user_pf_set(init_thread, (void *)(entry), (void *)0xdeaddead,
NULL, 0);
#else
@@ -156,7 +156,7 @@ static void knl_init_2(void)
void *sp_addr = (char *)init_task->mm_space.mm_block + app->i.stack_offset - app->i.data_offset;
void *sp_addr_top = (char *)sp_addr + app->i.stack_size;
thread_set_msg_buf(init_thread, (char *)(init_task->mm_space.mm_block) + app->i.ram_size, (char *)(init_task->mm_space.mm_block) + app->i.ram_size);
thread_set_msg_bug(init_thread, (char *)(init_task->mm_space.mm_block) + app->i.ram_size, (char *)(init_task->mm_space.mm_block) + app->i.ram_size);
thread_user_pf_set(init_thread, (void *)(CONFIG_KNL_TEXT_ADDR + CONFIG_INIT_TASK_OFFSET), (void *)((umword_t)sp_addr_top - 8),
init_task->mm_space.mm_block, 0);
#endif

8
mkrtos_script/build_qemu_aarch64.sh
View File

@@ -1,9 +1,9 @@
#!/bin/bash
export TOOLCHAIN=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
# export TOOLCHAIN=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/
# export TOOLCHAIN_LIB=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
# export TOOLCHAIN=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/
# export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
export TOOLCHAIN=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/
export TOOLCHAIN_LIB=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
export BOARD=aarch64_qemu
export CROSS_COMPILE_NAME=aarch64-none-elf-

2
mkrtos_user/server/shell/src/main.c
View File

@@ -5,8 +5,10 @@
#include <string.h>
#include <shell_port.h>
#include <pm_cli.h>
#include <u_sleep.h>
int main(int argc, char *args[])
{
u_sleep_ms(100);
for (int i = 0; i < argc; i++)
{
printf("args[%d]:%s\n ", i, args[i]);