lby/mkrtos-real
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

完善mcu的支持

Browse Source
This commit is contained in:
zhangzheng
2024-04-11 18:51:14 +08:00
parent acb21792bb
commit 609c96f0ac
26 changed files with 56 additions and 484 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
mkrtos_bootstrap/bsp/STM32F1/link.lds
View File

@@ -49,7 +49,11 @@ SECTIONS
KEEP (*(SORT(.mkrtos.init.*)))
_mkrtos_init_end = .;
. = ALIGN(4);
cpio_start = .;
*(.cpio*)
. = ALIGN(4096);
cpio_end = .;
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */

2
mkrtos_bootstrap/bsp/STM32F1/mk_sys.h
View File

@@ -66,5 +66,5 @@
#define SWD_ENABLE 0X01
#define JTAG_SWD_ENABLE 0X00
void jump2kernel(void);
void jump2kernel(addr_t cpio_start, addr_t cpio_end);
#endif

2
mkrtos_bootstrap/bsp/STM32F1/stm32_start.c
View File

@@ -10,7 +10,7 @@ void sram_init(void)
{
FSMC_SRAM_Init();
}
void jump2kernel(void)
void jump2kernel(addr_t cpio_start, addr_t cpio_end)
{
#if CONFIG_KNL_EXRAM
sram_init();

2
mkrtos_bootstrap/bsp/STM32F4/mk_sys.h
View File

@@ -65,5 +65,5 @@
#define SWD_ENABLE 0X01
#define JTAG_SWD_ENABLE 0X00
void jump2kernel(void);
void jump2kernel(addr_t cpio_start, addr_t cpio_end);
#endif

2
mkrtos_bootstrap/bsp/STM32F4/stm32_start.c
View File

@@ -2,7 +2,7 @@
#include <mk_sys.h>
//! 内核镜像的开始地址
#define KERNEL_IMG_START_ADDR (0X8000000 + 0x2000)
void jump2kernel(void)
void jump2kernel(addr_t cpio_start, addr_t cpio_end)
{
uint32_t jump_addr;
void (*_main)(void);

3
mkrtos_knl/arch/cortex-m3/stm32f1/CMakeLists.txt
View File

@@ -19,5 +19,6 @@ target_include_directories(
${CMAKE_SOURCE_DIR}/mkrtos_knl/inc/lib
${CMAKE_SOURCE_DIR}/mkrtos_knl/inc/knl
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/inc
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/armv7m/stm32f1
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/${CONFIG_CPU_TYPE}
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/
)

2
mkrtos_knl/arch/cortex-m3/stm32f1/arch.h
View File

@@ -12,6 +12,8 @@
#include "types.h"
#include "arch.h"
#define PAGE_SIZE 512
#define LOG_INTR_NO 38 // USART2_IRQn
/// @brief 线程信息

10
mkrtos_knl/arch/cortex-m4/CMakeLists.txt
View File

@@ -1,12 +1,18 @@
cmake_minimum_required(VERSION 3.13)
file(GLOB deps *.c *.S)
list(REMOVE_ITEM deps ${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/link.lds.S)
add_library(arch STATIC ${deps})
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__MPU_PRESENT=1 -DUSE_STDPERIPH_DRIVER=1 ")
message(=======${CONFIG_CPU_TYPE})
target_include_directories(
arch
PUBLIC
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/${CONFIG_CPU_TYPE}
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/
)
if (${CONFIG_CPU_TYPE} STREQUAL "stm32f4" )
if(${BOARD} STREQUAL "STM32F407VET6" )
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DSTM32F40_41xxx ")
@@ -14,7 +20,7 @@ if (${CONFIG_CPU_TYPE} STREQUAL "stm32f4" )
target_include_directories(
arch
PUBLIC
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${ARCH}/${CONFIG_CPU_TYPE}
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/${CONFIG_CPU_TYPE}
${CMAKE_SOURCE_DIR}/mkrtos_knl/inc/knl
${CMAKE_SOURCE_DIR}/mkrtos_bsp/STM32/STM32F4xx_DSP_StdPeriph_Lib_V1.9.0/Libraries/STM32F4xx_StdPeriph_Driver/inc

2
mkrtos_knl/arch/cortex-m4/link.lds
View File

@@ -1,7 +1,7 @@
ENTRY(Reset_Handler)
MEMORY
{
RAM (arw) : ORIGIN = 0x20000000, LENGTH = 0x800000
RAM (arw) : ORIGIN = 0x20000000, LENGTH = 0x2000000
FLASH (arx) : ORIGIN = 0x8000000 + 0x2000, LENGTH = 0x10000 - 0x2000
}
SECTIONS

3
mkrtos_knl/arch/cortex-m4/mm_space.c
View File

@@ -14,12 +14,13 @@
#include "mpu.h"
#include "assert.h"
#if CONFIG_MK_MPU_CFG
void mm_space_init(mm_space_t *mm_space, int is_knl)
int mm_space_init(mm_space_t *mm_space, int is_knl)
{
for (int i = 0; i < CONFIG_REGION_NUM; i++)
{
mm_space->pt_regions[i].region_inx = -1;
}
return 0;
}
region_info_t *mm_space_alloc_pt_region(mm_space_t *m_space)
{

3
mkrtos_knl/arch/cortex-m4/stm32f4/CMakeLists.txt
View File

@@ -13,7 +13,8 @@ add_library(knl_bsp STATIC ${deps})
target_include_directories(
knl_bsp
PUBLIC
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/armv7m/stm32f4
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/${CONFIG_CPU_TYPE}
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/inc
${CMAKE_SOURCE_DIR}/mkrtos_knl/inc/lib
${CMAKE_SOURCE_DIR}/mkrtos_knl/inc/knl

2
mkrtos_knl/arch/cortex-m4/stm32f4/arch.h
View File

@@ -12,6 +12,8 @@
#include "types.h"
#include "arch.h"
#define PAGE_SIZE 512
#define LOG_INTR_NO 37 // USART1_IRQn
/// @brief 线程信息

3
mkrtos_knl/arch/cortex-m4/thread_arch.h Normal file
View File

@@ -0,0 +1,3 @@
#pragma once
#define THREAD_BLOCK_SIZE CONFIG_THREAD_BLOCK_SIZE //!< 线程块大小，栈在块的顶部

7
mkrtos_knl/arch/cortex-m4/thread_armv7m.c
View File

@@ -12,7 +12,7 @@
#include "types.h"
#include "thread.h"
#include "printk.h"
#include "thread_armv7m.h"
#include "thread_task_arch.h"
#include "app.h"
#include "mm_wrap.h"
#include "arch.h"
@@ -45,7 +45,7 @@ void thread_user_pf_set(thread_t *cur_th, void *pc, void *user_sp, void *ram, um
cur_pf->pf_s.xpsr = 0x01000000L;
cur_pf->pf_s.lr = (umword_t)NULL; //!< 线程退出时调用的函数
cur_pf->pf_s.pc = (umword_t)pc | 0x1;
cur_pf->rg1[5] = (umword_t)ram;
cur_pf->regs[5] = (umword_t)ram;
cur_th->sp.knl_sp = ((char *)cur_th + THREAD_BLOCK_SIZE - 8);
cur_th->sp.user_sp = cur_pf;
@@ -53,3 +53,6 @@ void thread_user_pf_set(thread_t *cur_th, void *pc, void *user_sp, void *ram, um
// printk("exc_regs:%x %x %x\n", cur_pf->pf_s.pc, cur_th->sp.user_sp, ram);
}
void task_knl_init(task_t *knl_tk)
{
}

3
mkrtos_knl/drivers/stm32f1/CMakeLists.txt
View File

@@ -13,4 +13,7 @@ target_include_directories(
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/inc
${CMAKE_SOURCE_DIR}/mkrtos_bsp/STM32/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/CMSIS/CM3/CoreSupport
${CMAKE_SOURCE_DIR}/mkrtos_bsp/STM32/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/CMSIS/Include
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/
)

1
mkrtos_knl/drivers/stm32f4/CMakeLists.txt
View File

@@ -13,4 +13,5 @@ target_include_directories(
${CMAKE_SOURCE_DIR}/mkrtos_knl/inc/drv
${CMAKE_SOURCE_DIR}/mkrtos_bsp/STM32/STM32F4xx_DSP_StdPeriph_Lib_V1.9.0/Libraries/CMSIS/Include
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/inc
${CMAKE_SOURCE_DIR}/mkrtos_knl/arch/${CONFIG_ARCH}/
)

6
mkrtos_script/build_f1.sh
View File

@@ -2,10 +2,12 @@
# export TOOLCHAIN=/home/zhangzheng/mkrtos-tools/gcc/gcc-arm-none-eabi-5_4-2016q3/bin/
# export TOOLCHAIN_LIB=/home/zhangzheng/mkrtos-tools/gcc/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7-m
export TOOLCHAIN=/home/zhangzheng/gcc-arm/gcc-arm-none-eabi-10.3-2021.10/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp
# export TOOLCHAIN=/home/zhangzheng/gcc-arm/gcc-arm-none-eabi-10.3-2021.10/bin/
# export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp
# export TOOLCHAIN=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/bin/
# export TOOLCHAIN_LIB=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp
export TOOLCHAIN=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7-m/
export BOARD=STM32F103ZET6
export CROSS_COMPILE_NAME=arm-none-eabi-

8
mkrtos_script/build_f4.sh
View File

@@ -1,10 +1,14 @@
#!/bin/bash
export TOOLCHAIN=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu
# export TOOLCHAIN=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/
# export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu
# export TOOLCHAIN=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/bin/
# export TOOLCHAIN_LIB=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard
export TOOLCHAIN=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7e-m/fpu
export BOARD=STM32F407VET6
export CROSS_COMPILE_NAME=arm-none-eabi-
set -e
cmake -G Ninja -B build/$KNL .
cd build/$KNL && ninja

18
mkrtos_script/build_svr.sh
View File

@@ -1,18 +0,0 @@
#!/bin/bash
export TOOLCHAIN=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7-m
# export TOOLCHAIN=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/bin/
# export TOOLCHAIN_LIB=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp
export KEN_OFFSET=0x2000
export INIT_OFFSET=0x10000
export BOOTFS_ADDR_OFFSET=0x21000
export KNL_DATA=0x20000000
export KNL_DATA_SIZE=10M
export BOARD=STM32F2x
export ARCH=cortex-m3
export PYTHON_EXECUTABLE=python3
set -e
cmake -G Ninja -B build/$KNL .
cd build/$KNL && ninja

19
mkrtos_script/build_zcu102.sh
View File

@@ -1,19 +0,0 @@
#!/bin/bash
# export TOOLCHAIN=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/
# export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/armv7-m
export TOOLCHAIN=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/bin/
# export TOOLCHAIN_LIB=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp
export TOOLCHAIN_LIB=/Users/zhangzheng/gcc-arm-none-eabi-10.3-2021.10/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard
export KEN_OFFSET=0x2000
export INIT_OFFSET=0x10000
export BOOTFS_ADDR_OFFSET=0x22000
export KNL_DATA=0x20000000
export CPU_TYPE=zcu102
export BOARD=zcu102
export ARCH=cortex-r5
export PYTHON_EXECUTABLE=python3
set -e
cmake -G Ninja -B build/$KNL .
cd build/$KNL && ninja

4
mkrtos_user/server/fs/cpiofs/CMakeLists.txt
View File

@@ -6,7 +6,7 @@ file(
)
# list(REMOVE_ITEM deps mkrtos_user/server/fs/cpiofs/ram_disk_drv/*.*)
message(==========="START_SRC:${START_SRC}")
add_executable(
cpiofs.elf
${deps}
@@ -59,6 +59,8 @@ add_custom_target(
mkdir -p ${CMAKE_SOURCE_DIR}/build/output/cpio
COMMAND
cp cpiofs.bin ${CMAKE_SOURCE_DIR}/build/output/cpio/cpiofs
COMMAND
cp cpiofs.elf ${CMAKE_SOURCE_DIR}/build/output/cpiofs.elf
)
if ((DEFINED CONFIG_ELF_LAUNCH) AND (CONFIG_ELF_LAUNCH STREQUAL "y"))
add_custom_target(

2
mkrtos_user/server/fs/cpiofs/heap_stack.c
View File

@@ -1,6 +1,6 @@
#include <u_util.h>
#if !IS_ENABLED(CONFIG_MMU)
#define HEAP_SIZE 512
#define HEAP_SIZE 1024
#define STACK_SIZE (2048)
#if defined(__CC_ARM)

2
mkrtos_user/server/init/src/init.cfg
View File

@@ -1,8 +1,8 @@
#一次读取一行，每行代表启动的应用程序，暂时不支持参数
# fatfs
# cpiofs
# dm9000_drv
# net
# cpiofs
sh
# lcd_drv

2
mkrtos_user/server/init/src/pm.c
View File

@@ -210,7 +210,7 @@ int pm_rpc_run_app(const char *path, int flags)
int ret;
printf("pm run %s.\n", path);
char *args[] = {
(char *)path,
"xx",/*TODO:*修正参数传递*/
"-t",
};
ret = app_load(path, u_get_global_env(), &pid, args, 2, NULL, 0);

BIN
virt.dtb
View File

Binary file not shown.

426
virt.dts
View File

@@ -1,426 +0,0 @@
/dts-v1/;
/ {
interrupt-parent = <0x8005>;
model = "linux,dummy-virt";
#size-cells = <0x02>;
#address-cells = <0x02>;
compatible = "linux,dummy-virt";
psci {
migrate = <0xc4000005>;
cpu_on = <0xc4000003>;
cpu_off = <0x84000002>;
cpu_suspend = <0xc4000001>;
method = "smc";
compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci";
};
memory@40000000 {
reg = <0x00 0x40000000 0x00 0x80000000>;
device_type = "memory";
};
platform-bus@c000000 {
interrupt-parent = <0x8005>;
ranges = <0x00 0x00 0xc000000 0x2000000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
compatible = "qemu,platform\0simple-bus";
};
fw-cfg@9020000 {
dma-coherent;
reg = <0x00 0x9020000 0x00 0x18>;
compatible = "qemu,fw-cfg-mmio";
};
virtio_mmio@a000000 {
dma-coherent;
interrupts = <0x00 0x10 0x01>;
reg = <0x00 0xa000000 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000200 {
dma-coherent;
interrupts = <0x00 0x11 0x01>;
reg = <0x00 0xa000200 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000400 {
dma-coherent;
interrupts = <0x00 0x12 0x01>;
reg = <0x00 0xa000400 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000600 {
dma-coherent;
interrupts = <0x00 0x13 0x01>;
reg = <0x00 0xa000600 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000800 {
dma-coherent;
interrupts = <0x00 0x14 0x01>;
reg = <0x00 0xa000800 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000a00 {
dma-coherent;
interrupts = <0x00 0x15 0x01>;
reg = <0x00 0xa000a00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000c00 {
dma-coherent;
interrupts = <0x00 0x16 0x01>;
reg = <0x00 0xa000c00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a000e00 {
dma-coherent;
interrupts = <0x00 0x17 0x01>;
reg = <0x00 0xa000e00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001000 {
dma-coherent;
interrupts = <0x00 0x18 0x01>;
reg = <0x00 0xa001000 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001200 {
dma-coherent;
interrupts = <0x00 0x19 0x01>;
reg = <0x00 0xa001200 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001400 {
dma-coherent;
interrupts = <0x00 0x1a 0x01>;
reg = <0x00 0xa001400 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001600 {
dma-coherent;
interrupts = <0x00 0x1b 0x01>;
reg = <0x00 0xa001600 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001800 {
dma-coherent;
interrupts = <0x00 0x1c 0x01>;
reg = <0x00 0xa001800 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001a00 {
dma-coherent;
interrupts = <0x00 0x1d 0x01>;
reg = <0x00 0xa001a00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001c00 {
dma-coherent;
interrupts = <0x00 0x1e 0x01>;
reg = <0x00 0xa001c00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a001e00 {
dma-coherent;
interrupts = <0x00 0x1f 0x01>;
reg = <0x00 0xa001e00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002000 {
dma-coherent;
interrupts = <0x00 0x20 0x01>;
reg = <0x00 0xa002000 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002200 {
dma-coherent;
interrupts = <0x00 0x21 0x01>;
reg = <0x00 0xa002200 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002400 {
dma-coherent;
interrupts = <0x00 0x22 0x01>;
reg = <0x00 0xa002400 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002600 {
dma-coherent;
interrupts = <0x00 0x23 0x01>;
reg = <0x00 0xa002600 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002800 {
dma-coherent;
interrupts = <0x00 0x24 0x01>;
reg = <0x00 0xa002800 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002a00 {
dma-coherent;
interrupts = <0x00 0x25 0x01>;
reg = <0x00 0xa002a00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002c00 {
dma-coherent;
interrupts = <0x00 0x26 0x01>;
reg = <0x00 0xa002c00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a002e00 {
dma-coherent;
interrupts = <0x00 0x27 0x01>;
reg = <0x00 0xa002e00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003000 {
dma-coherent;
interrupts = <0x00 0x28 0x01>;
reg = <0x00 0xa003000 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003200 {
dma-coherent;
interrupts = <0x00 0x29 0x01>;
reg = <0x00 0xa003200 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003400 {
dma-coherent;
interrupts = <0x00 0x2a 0x01>;
reg = <0x00 0xa003400 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003600 {
dma-coherent;
interrupts = <0x00 0x2b 0x01>;
reg = <0x00 0xa003600 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003800 {
dma-coherent;
interrupts = <0x00 0x2c 0x01>;
reg = <0x00 0xa003800 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003a00 {
dma-coherent;
interrupts = <0x00 0x2d 0x01>;
reg = <0x00 0xa003a00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003c00 {
dma-coherent;
interrupts = <0x00 0x2e 0x01>;
reg = <0x00 0xa003c00 0x00 0x200>;
compatible = "virtio,mmio";
};
virtio_mmio@a003e00 {
dma-coherent;
interrupts = <0x00 0x2f 0x01>;
reg = <0x00 0xa003e00 0x00 0x200>;
compatible = "virtio,mmio";
};
gpio-keys {
compatible = "gpio-keys";
poweroff {
gpios = <0x8007 0x03 0x00>;
linux,code = <0x74>;
label = "GPIO Key Poweroff";
};
};
pl061@9030000 {
phandle = <0x8007>;
clock-names = "apb_pclk";
clocks = <0x8000>;
interrupts = <0x00 0x07 0x04>;
gpio-controller;
#gpio-cells = <0x02>;
compatible = "arm,pl061\0arm,primecell";
reg = <0x00 0x9030000 0x00 0x1000>;
};
pcie@10000000 {
interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x03 0x04 0x00 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x04 0x04 0x00 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x04 0x04 0x800 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x05 0x04 0x800 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x06 0x04 0x800 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x05 0x04 0x1000 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x06 0x04 0x1000 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x03 0x04 0x1000 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x01 0x8005 0x00 0x00 0x00 0x06 0x04 0x1800 0x00 0x00 0x02 0x8005 0x00 0x00 0x00 0x03 0x04 0x1800 0x00 0x00 0x03 0x8005 0x00 0x00 0x00 0x04 0x04 0x1800 0x00 0x00 0x04 0x8005 0x00 0x00 0x00 0x05 0x04>;
#interrupt-cells = <0x01>;
ranges = <0x1000000 0x00 0x00 0x00 0x3eff0000 0x00 0x10000 0x2000000 0x00 0x10000000 0x00 0x10000000 0x00 0x2eff0000>;
reg = <0x00 0x3f000000 0x00 0x1000000>;
msi-map = <0x00 0x8006 0x00 0x10000>;
dma-coherent;
bus-range = <0x00 0x0f>;
linux,pci-domain = <0x00>;
#size-cells = <0x02>;
#address-cells = <0x03>;
device_type = "pci";
compatible = "pci-host-ecam-generic";
};
pl031@9010000 {
clock-names = "apb_pclk";
clocks = <0x8000>;
interrupts = <0x00 0x02 0x04>;
reg = <0x00 0x9010000 0x00 0x1000>;
compatible = "arm,pl031\0arm,primecell";
};
pl011@9000000 {
clock-names = "uartclk\0apb_pclk";
clocks = <0x8000 0x8000>;
interrupts = <0x00 0x01 0x04>;
reg = <0x00 0x9000000 0x00 0x1000>;
compatible = "arm,pl011\0arm,primecell";
};
pmu {
interrupts = <0x01 0x07 0xf04>;
compatible = "arm,armv8-pmuv3";
};
intc@8000000 {
phandle = <0x8005>;
interrupts = <0x01 0x09 0x04>;
reg = <0x00 0x8000000 0x00 0x10000 0x00 0x8010000 0x00 0x10000 0x00 0x8030000 0x00 0x10000 0x00 0x8040000 0x00 0x10000>;
compatible = "arm,cortex-a15-gic";
ranges;
#size-cells = <0x02>;
#address-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x03>;
v2m@8020000 {
phandle = <0x8006>;
reg = <0x00 0x8020000 0x00 0x1000>;
msi-controller;
compatible = "arm,gic-v2m-frame";
};
};
flash@0 {
bank-width = <0x04>;
reg = <0x00 0x00 0x00 0x4000000 0x00 0x4000000 0x00 0x4000000>;
compatible = "cfi-flash";
};
cpus {
#size-cells = <0x00>;
#address-cells = <0x01>;
cpu-map {
socket0 {
cluster0 {
core0 {
cpu = <0x8004>;
};
core1 {
cpu = <0x8003>;
};
core2 {
cpu = <0x8002>;
};
core3 {
cpu = <0x8001>;
};
};
};
};
cpu@0 {
phandle = <0x8004>;
reg = <0x00>;
enable-method = "psci";
compatible = "arm,cortex-a53";
device_type = "cpu";
};
cpu@1 {
phandle = <0x8003>;
reg = <0x01>;
enable-method = "psci";
compatible = "arm,cortex-a53";
device_type = "cpu";
};
cpu@2 {
phandle = <0x8002>;
reg = <0x02>;
enable-method = "psci";
compatible = "arm,cortex-a53";
device_type = "cpu";
};
cpu@3 {
phandle = <0x8001>;
reg = <0x03>;
enable-method = "psci";
compatible = "arm,cortex-a53";
device_type = "cpu";
};
};
timer {
interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
always-on;
compatible = "arm,armv8-timer\0arm,armv7-timer";
};
apb-pclk {
phandle = <0x8000>;
clock-output-names = "clk24mhz";
clock-frequency = <0x16e3600>;
#clock-cells = <0x00>;
compatible = "fixed-clock";
};
chosen {
stdout-path = "/pl011@9000000";
rng-seed = <0x3d77ef5c 0xe9333410 0xb1bb44e9 0xc5c8fed4 0xaa58c7b5 0x6f6a25fd 0xdd2eda37 0xd6e1ece3>;
kaslr-seed = <0x3a9234e7 0x85d9a529>;
};
};