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vcpu代码整理

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This commit is contained in:
zhangzheng
2024-05-12 02:56:37 +00:00
parent fe0e41c0f7
commit 2a648382e9
11 changed files with 161 additions and 149 deletions
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6
.vscode/launch.json vendored
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@@ -50,9 +50,9 @@
// "miDebuggerPath": "/home/zhangzheng/gcc-arm/gcc-arm-none-eabi-10.3-2021.10/bin/arm-none-eabi-gdb",
// "miDebuggerPath": "/home/zhangzheng/gcc-arm-none-eabi-5_4-2016q3/bin/arm-none-eabi-gdb",
// "miDebuggerPath": "/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
"miDebuggerPath": "/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
"miDebuggerServerAddress": "127.0.0.1:33333",
"miDebuggerPath": "/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
// "miDebuggerPath": "/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/aarch64-none-elf-gdb",
"miDebuggerServerAddress": "127.0.0.1:3333",
"MIMode": "gdb",
"setupCommands": [
{

34
mkrtos_knl/arch/aarch64/aarch64_qemu/arch.h
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@@ -57,26 +57,17 @@ typedef struct pf
typedef struct sysregs
{
umword_t hcr_el2;
umword_t hstr_el2;
umword_t sp_el0;
umword_t sp_el1;
umword_t elr_el1;
umword_t spsr_el1;
umword_t sctlr_el1;
umword_t cpacr_el1;
umword_t ttbr0_el1;
umword_t ttbr1_el1;
umword_t tcr_el1;
umword_t esr_el1;
umword_t far_el1;
umword_t par_el1;
umword_t mair_el1;
umword_t vbar_el1;
umword_t contextidr_el1;
umword_t tpidr_el0;
umword_t tpidr_el1;
umword_t tpidrro_el0;
// 32bits sysregs.
@@ -103,7 +94,25 @@ typedef struct sysregs
umword_t cntv_cval_el0;
} sysregs_t;
typedef struct hyp_sysregs
{
umword_t par_el1;
umword_t hcr_el2;
umword_t cntv_cval_el0;
umword_t cntkctl_el1;
umword_t cntv_ctl_el0;
umword_t tpidr_el1;
umword_t sp_el1;
umword_t elr_el1;
umword_t vbar_el1;
umword_t cpacr_el1;
umword_t spsr_fiq;
umword_t spsr_irq;
umword_t spsr_el1;
umword_t spsr_abt;
umword_t spsr_und;
umword_t csselr_el1;
} hyp_sysregs_t;
typedef struct sp_info
{
umword_t x19;
@@ -119,9 +128,10 @@ typedef struct sp_info
umword_t fp; // x29
umword_t sp;
umword_t pc;
umword_t u_sp; // user_sp
umword_t tpidr_el0;
// umword_t u_sp; // user_sp
// umword_t tpidr_el0;
hyp_sysregs_t hyp;
#if IS_ENABLED(CONFIG_VCPU)
sysregs_t sysregs;
#endif

11
mkrtos_knl/arch/aarch64/aarch64_qemu/vector.S
View File

@@ -232,10 +232,7 @@ cpu_switch_to:
stp x25, x26, [x8], #16
stp x27, x28, [x8], #16
stp x29, x9, [x8], #16
mrs x9, sp_el1
stp lr, x9, [x8], #16
mrs x9, tpidr_el0
str x9, [x8]
str lr, [x8]
mov x8, x1
ldp x19, x20, [x8], #16
@@ -244,10 +241,6 @@ cpu_switch_to:
ldp x25, x26, [x8], #16
ldp x27, x28, [x8], #16
ldp x29, x9, [x8], #16
ldr lr, [x8], #8
ldr lr, [x8]
mov sp, x9
ldr x9, [x8], #8
msr sp_el1, x9
ldr x9, [x8]
msr tpidr_el0, x9
ret

203
mkrtos_knl/arch/aarch64/sche_arch.c
View File

@@ -23,138 +23,127 @@ static void sw_mmu(thread_t *next_thread)
// _dsb(sy);
write_sysreg(p_next_dir | (next_task->mm_space.asid << 48) /*TODO:*/, vttbr_el2); // 切换用户态页表
_isb();
// asm volatile("ic iallu");
// _dsb(ish);
// asm volatile("ic iallu");
// _dsb(ish);
// asm volatile("tlbi vmalle1");
// _dsb(ish);
// _isb();
// mword_t vttbr;
// // FIXME: could do a compare for the current VMID before loading
// // the vttbr and the isb
// asm volatile(
// "mrs %[vttbr], vttbr_el2\n"
// "msr vttbr_el2, %[asid] \n"
// "isb \n"
// "dsb ishst \n"
// "tlbi ipas2e1, %[ipa] \n"
// "dsb ish \n"
// "tlbi vmalle1 \n"
// "dsb ish \n"
// "msr vttbr_el2, %[vttbr]\n"
// :
// [vttbr] "=&r" (vttbr)
// :
// [ipa] "r" ((unsigned long)va >> 12),
// [asid] "r" (1 << 48)
// :
// "memory");
#if IS_ENABLED(CONFIG_VCPU)
if (cur_th->is_vcpu || next_thread->is_vcpu)
{
// 如果支持VCPU，则切换系统寄存器等
sche_arch_sw_sysregs(cur_th, next_thread);
// asm volatile("tlbi alle1is");
// _dsb(ish);
// _isb();
}
#endif
// asm volatile("tlbi vmalle1");
// _dsb(ish);
// _isb();
// mword_t vttbr;
// // FIXME: could do a compare for the current VMID before loading
// // the vttbr and the isb
// asm volatile(
// "mrs %[vttbr], vttbr_el2\n"
// "msr vttbr_el2, %[asid] \n"
// "isb \n"
// "dsb ishst \n"
// "tlbi ipas2e1, %[ipa] \n"
// "dsb ish \n"
// "tlbi vmalle1 \n"
// "dsb ish \n"
// "msr vttbr_el2, %[vttbr]\n"
// :
// [vttbr] "=&r" (vttbr)
// :
// [ipa] "r" ((unsigned long)va >> 12),
// [asid] "r" (1 << 48)
// :
// "memory");
}
}
static void sche_arch_sw_sysregs(thread_t *cur_th, thread_t *next_th)
static void shce_arch_sw_sysregs(thread_t *cur_th, thread_t *next_th)
{
cur_th->sp.hyp.tpidr_el1 = read_sysreg(tpidr_el1);
cur_th->sp.hyp.sp_el1 = read_sysreg(sp_el1);
cur_th->sp.hyp.par_el1 = read_sysreg(par_el1);
cur_th->sp.hyp.hcr_el2 = read_sysreg(hcr_el2);
cur_th->sp.hyp.cntv_cval_el0 = read_sysreg(cntv_cval_el0);
cur_th->sp.hyp.cntkctl_el1 = read_sysreg(cntkctl_el1);
cur_th->sp.hyp.cntv_ctl_el0 = read_sysreg(cntv_ctl_el0);
cur_th->sp.hyp.elr_el1 = read_sysreg(elr_el1);
cur_th->sp.hyp.vbar_el1 = read_sysreg(vbar_el1);
cur_th->sp.hyp.cpacr_el1 = read_sysreg(cpacr_el1);
cur_th->sp.hyp.spsr_fiq = read_sysreg(spsr_fiq);
cur_th->sp.hyp.spsr_irq = read_sysreg(spsr_irq);
cur_th->sp.hyp.spsr_el1 = read_sysreg(spsr_el1);
cur_th->sp.hyp.spsr_abt = read_sysreg(spsr_abt);
cur_th->sp.hyp.spsr_und = read_sysreg(spsr_und);
cur_th->sp.hyp.csselr_el1 = read_sysreg(csselr_el1);
write_sysreg(next_th->sp.hyp.tpidr_el1, tpidr_el1); // 线程id
write_sysreg(next_th->sp.hyp.sp_el1, sp_el1); // el1的sp
write_sysreg(next_th->sp.hyp.par_el1, par_el1); // 翻译的物理地址
write_sysreg(next_th->sp.hyp.hcr_el2, hcr_el2); // 虚拟化控制寄存器
write_sysreg(next_th->sp.hyp.cntv_cval_el0, cntv_cval_el0);
write_sysreg(next_th->sp.hyp.cntkctl_el1, cntkctl_el1);
write_sysreg(next_th->sp.hyp.cntv_ctl_el0, cntv_ctl_el0);
write_sysreg(next_th->sp.hyp.elr_el1, elr_el1); // 异常返回地址寄存器
write_sysreg(next_th->sp.hyp.vbar_el1, vbar_el1); // 中断向量表寄存器
write_sysreg(next_th->sp.hyp.cpacr_el1, cpacr_el1); // 浮点控制
write_sysreg(next_th->sp.hyp.spsr_fiq, spsr_fiq);
write_sysreg(next_th->sp.hyp.spsr_irq, spsr_irq);
write_sysreg(next_th->sp.hyp.spsr_el1, spsr_el1); // 异常返回控制寄存器
write_sysreg(next_th->sp.hyp.spsr_abt, spsr_abt);
write_sysreg(next_th->sp.hyp.spsr_und, spsr_und);
write_sysreg(next_th->sp.hyp.csselr_el1, csselr_el1);
#if IS_ENABLED(SCHE_DEBUG)
printk("cur hcr_el2:0x%lx next hcr_el2:0x%lx\n", cur_th->sp.hyp.hcr_el2, next_th->sp.hyp.hcr_el2);
#endif
}
static void hype_sche_arch_sw_sysregs(thread_t *cur_th, thread_t *next_th)
{
if (cur_th->is_vcpu)
{
cur_th->sp.sysregs.hcr_el2 = read_sysreg(hcr_el2);
printk("cur hcr_el2:0x%lx TGE:%d\n", cur_th->sp.sysregs.hcr_el2, !!(cur_th->sp.sysregs.hcr_el2 & (1<<27)));
cur_th->sp.sysregs.hstr_el2 = read_sysreg(hstr_el2);
cur_th->sp.sysregs.sp_el0 = read_sysreg(sp_el0);
// cur_th->sp.sysregs.sp_el1 = read_sysreg(sp_el1);
cur_th->sp.sysregs.elr_el1 = read_sysreg(elr_el1);
cur_th->sp.sysregs.spsr_el1 = read_sysreg(spsr_el1);
cur_th->sp.sysregs.sctlr_el1 = read_sysreg(sctlr_el1);
cur_th->sp.sysregs.cpacr_el1 = read_sysreg(cpacr_el1);
cur_th->sp.sysregs.ttbr0_el1 = read_sysreg(ttbr0_el1);
cur_th->sp.sysregs.ttbr1_el1 = read_sysreg(ttbr1_el1);
cur_th->sp.sysregs.tcr_el1 = read_sysreg(tcr_el1);
cur_th->sp.sysregs.esr_el1 = read_sysreg(esr_el1);
cur_th->sp.sysregs.far_el1 = read_sysreg(far_el1);
cur_th->sp.sysregs.par_el1 = read_sysreg(par_el1);
cur_th->sp.sysregs.mair_el1 = read_sysreg(mair_el1);
cur_th->sp.sysregs.vbar_el1 = read_sysreg(vbar_el1);
cur_th->sp.sysregs.contextidr_el1 = read_sysreg(contextidr_el1);
// cur_th->sp.sysregs.tpidr_el0 = read_sysreg(tpidr_el0);
cur_th->sp.sysregs.tpidr_el1 = read_sysreg(tpidr_el1);
cur_th->sp.sysregs.tpidrro_el0 = read_sysreg(tpidrro_el0);
#if IS_ENABLED(SCHE_DEBUG)
printk("store cur_th sysregs:\n");
printk("\tsp_el0:0x%lx\n", cur_th->sp.sysregs.sp_el0);
// printk("\tsp_el1:0x%lx\n", cur_th->sp.sysregs.sp_el1);
printk("\telr_el1:0x%lx\n", cur_th->sp.sysregs.elr_el1);
printk("\tspsr_el1:0x%lx\n", cur_th->sp.sysregs.spsr_el1);
printk("\tsctlr_el1:0x%lx\n", cur_th->sp.sysregs.sctlr_el1);
printk("\tcpacr_el1:0x%lx\n", cur_th->sp.sysregs.cpacr_el1);
printk("\tttbr0_el1:0x%lx\n", cur_th->sp.sysregs.ttbr0_el1);
printk("\tttbr1_el1:0x%lx\n", cur_th->sp.sysregs.ttbr1_el1);
printk("\ttcr_el1:0x%lx\n", cur_th->sp.sysregs.tcr_el1);
printk("\tesr_el1:0x%lx\n", cur_th->sp.sysregs.esr_el1);
printk("\tfar_el1:0x%lx\n", cur_th->sp.sysregs.far_el1);
printk("\tpar_el1:0x%lx\n", cur_th->sp.sysregs.par_el1);
printk("\tmair_el1:0x%lx\n", cur_th->sp.sysregs.mair_el1);
printk("\tvbar_el1:0x%lx\n", cur_th->sp.sysregs.vbar_el1);
printk("\tcontextidr_el1:0x%lx\n", cur_th->sp.sysregs.contextidr_el1);
// printk("\ttpidr_el0:0x%lx\n", cur_th->sp.sysregs.tpidr_el0);
printk("\ttpidr_el1:0x%lx\n", cur_th->sp.sysregs.tpidr_el1);
printk("\ttpidrro_el0:0x%lx\n", cur_th->sp.sysregs.tpidrro_el0);
#endif
}
if (next_th->is_vcpu)
{
// if (atomic_read(&cur_th->time_count) != 0)
{
write_sysreg(next_th->sp.sysregs.hcr_el2, hcr_el2);
printk("next hcr_el2:0x%lx TGE:%d\n", next_th->sp.sysregs.hcr_el2, !!(next_th->sp.sysregs.hcr_el2 & (1<<27)));
write_sysreg(next_th->sp.sysregs.hstr_el2, hstr_el2);
write_sysreg(next_th->sp.sysregs.sp_el0, sp_el0);
// write_sysreg(next_th->sp.sysregs.sp_el1, sp_el1);
write_sysreg(next_th->sp.sysregs.elr_el1, elr_el1);
write_sysreg(next_th->sp.sysregs.spsr_el1, spsr_el1);
write_sysreg(next_th->sp.sysregs.sctlr_el1, sctlr_el1);
write_sysreg(next_th->sp.sysregs.cpacr_el1, cpacr_el1);
write_sysreg(next_th->sp.sysregs.ttbr0_el1, ttbr0_el1);
write_sysreg(next_th->sp.sysregs.ttbr1_el1, ttbr1_el1);
write_sysreg(next_th->sp.sysregs.tcr_el1, tcr_el1);
write_sysreg(next_th->sp.sysregs.esr_el1, esr_el1);
write_sysreg(next_th->sp.sysregs.far_el1, far_el1);
write_sysreg(next_th->sp.sysregs.par_el1, par_el1);
write_sysreg(next_th->sp.sysregs.mair_el1, mair_el1);
write_sysreg(next_th->sp.sysregs.vbar_el1, vbar_el1);
write_sysreg(next_th->sp.sysregs.contextidr_el1, contextidr_el1);
// write_sysreg(next_th->sp.sysregs.tpidr_el0, tpidr_el0);
write_sysreg(next_th->sp.sysregs.tpidr_el1, tpidr_el1);
write_sysreg(next_th->sp.sysregs.tpidrro_el0, tpidrro_el0);
write_sysreg(next_th->sp.sysregs.hstr_el2, hstr_el2);
write_sysreg(next_th->sp.sysregs.sp_el0, sp_el0);
write_sysreg(next_th->sp.sysregs.sctlr_el1, sctlr_el1);
write_sysreg(next_th->sp.sysregs.ttbr0_el1, ttbr0_el1);
write_sysreg(next_th->sp.sysregs.ttbr1_el1, ttbr1_el1);
write_sysreg(next_th->sp.sysregs.tcr_el1, tcr_el1);
write_sysreg(next_th->sp.sysregs.esr_el1, esr_el1);
write_sysreg(next_th->sp.sysregs.far_el1, far_el1);
write_sysreg(next_th->sp.sysregs.mair_el1, mair_el1);
write_sysreg(next_th->sp.sysregs.contextidr_el1, contextidr_el1);
write_sysreg(next_th->sp.sysregs.tpidrro_el0, tpidrro_el0);
#if IS_ENABLED(SCHE_DEBUG)
printk("restore next_th sysregs:\n");
printk("\tsp_el0:0x%lx\n", next_th->sp.sysregs.sp_el0);
// printk("\tsp_el1:0x%lx\n", next_th->sp.sysregs.sp_el1);
printk("\telr_el1:0x%lx\n", next_th->sp.sysregs.elr_el1);
printk("\tspsr_el1:0x%lx\n", next_th->sp.sysregs.spsr_el1);
printk("\tsctlr_el1:0x%lx\n", next_th->sp.sysregs.sctlr_el1);
printk("\tcpacr_el1:0x%lx\n", next_th->sp.sysregs.cpacr_el1);
printk("\tttbr0_el1:0x%lx\n", next_th->sp.sysregs.ttbr0_el1);
printk("\tttbr1_el1:0x%lx\n", next_th->sp.sysregs.ttbr1_el1);
printk("\ttcr_el1:0x%lx\n", next_th->sp.sysregs.tcr_el1);
printk("\tesr_el1:0x%lx\n", next_th->sp.sysregs.esr_el1);
printk("\tfar_el1:0x%lx\n", next_th->sp.sysregs.far_el1);
printk("\tpar_el1:0x%lx\n", next_th->sp.sysregs.par_el1);
printk("\tmair_el1:0x%lx\n", next_th->sp.sysregs.mair_el1);
printk("\tvbar_el1:0x%lx\n", next_th->sp.sysregs.vbar_el1);
printk("\tcontextidr_el1:0x%lx\n", next_th->sp.sysregs.contextidr_el1);
// printk("\ttpidr_el0:0x%lx\n", next_th->sp.sysregs.tpidr_el0);
printk("\ttpidr_el1:0x%lx\n", next_th->sp.sysregs.tpidr_el1);
printk("\ttpidrro_el0:0x%lx\n", next_th->sp.sysregs.tpidrro_el0);
printk("restore next_th sysregs:\n");
printk("\tsp_el0:0x%lx\n", next_th->sp.sysregs.sp_el0);
printk("\tsctlr_el1:0x%lx\n", next_th->sp.sysregs.sctlr_el1);
printk("\tttbr0_el1:0x%lx\n", next_th->sp.sysregs.ttbr0_el1);
printk("\tttbr1_el1:0x%lx\n", next_th->sp.sysregs.ttbr1_el1);
printk("\ttcr_el1:0x%lx\n", next_th->sp.sysregs.tcr_el1);
printk("\tesr_el1:0x%lx\n", next_th->sp.sysregs.esr_el1);
printk("\tfar_el1:0x%lx\n", next_th->sp.sysregs.far_el1);
printk("\tmair_el1:0x%lx\n", next_th->sp.sysregs.mair_el1);
printk("\tcontextidr_el1:0x%lx\n", next_th->sp.sysregs.contextidr_el1);
printk("\ttpidrro_el0:0x%lx\n", next_th->sp.sysregs.tpidrro_el0);
#endif
}
}
}
void sche_arch_sw_context(void)
@@ -170,12 +159,22 @@ void sche_arch_sw_context(void)
assert(next_th->magic == THREAD_MAGIC);
// 这里切换页表
sw_mmu(next_th);
shce_arch_sw_sysregs(cur_th, next_th);
#if IS_ENABLED(CONFIG_VCPU)
if (cur_th->is_vcpu || next_th->is_vcpu)
{
// 如果支持VCPU，则切换系统寄存器等
hype_sche_arch_sw_sysregs(cur_th, next_th);
// asm volatile("tlbi alle1is");
// _dsb(ish);
// _isb();
}
#endif
sw_mmu(next_th); // 切换mmu
assert(arch_get_current_cpu_id() == cur_th->cpu);
// 切换上下文
pev_sp = cpu_switch_to(&cur_th->sp, &next_th->sp);
next_th = cur_th; // 当前就是下一个
pev_sp = cpu_switch_to(&cur_th->sp, &next_th->sp); // 切换上下文
next_th = cur_th; // 当前就是下一个
cur_th = container_of(pev_sp, thread_t, sp);
atomic_inc(&cur_th->time_count); /**FIXME:临时处理，代表切换完成*/
}

37
mkrtos_knl/arch/aarch64/thread_aarch64.c
View File

@@ -24,34 +24,47 @@
#endif
void thread_arch_init(thread_t *th, umword_t flags)
{
#if IS_ENABLED(CONFIG_VCPU)
th->sp.hyp.par_el1 = read_sysreg(par_el1);
th->sp.hyp.cntv_cval_el0 = read_sysreg(cntv_cval_el0);
th->sp.hyp.cntkctl_el1 = read_sysreg(cntkctl_el1);
th->sp.hyp.cntv_ctl_el0 = read_sysreg(cntv_ctl_el0);
th->sp.hyp.tpidr_el1 = 0;
th->sp.hyp.sp_el1 = 0;
th->sp.hyp.elr_el1 = 0;
th->sp.hyp.vbar_el1 = 0;
th->sp.hyp.cpacr_el1 = read_sysreg(cpacr_el1);
th->sp.hyp.spsr_fiq = 0;
th->sp.hyp.spsr_irq = 0;
th->sp.hyp.spsr_el1 = 0;
th->sp.hyp.spsr_abt = 0;
th->sp.hyp.spsr_und = 0;
th->sp.hyp.csselr_el1 = read_sysreg(csselr_el1);
#if !IS_ENABLED(CONFIG_VCPU)
th->sp.hyp.hcr_el2 = read_sysreg(hcr_el2);
#else
if (flags & THREAD_CREATE_VM)
{
th->is_vcpu = TRUE;
//| (1UL << 34)
// asm volatile("msr HCR_EL2, %x0" : : "r"(Hcr_host_bits | (1UL << 13) | (1UL << 14)));
// asm volatile("msr HSTR_EL2, %x0" : : "r"(Hstr_vm));
th->sp.sysregs.hcr_el2 = 0x30023f|(1UL<<10) |(3UL<<13) | (1UL<<31);//read_sysreg(hcr_el2);0x30023f|(1UL<<10) |(3UL<<13)
th->sp.sysregs.hstr_el2 = read_sysreg(hstr_el2);
th->sp.hyp.hcr_el2 = 0x30023f | (1UL << 10) | (3UL << 13) | (1UL << 31); // read_sysreg(hcr_el2);0x30023f|(1UL<<10) |(3UL<<13)
th->sp.sysregs.hstr_el2 = Hstr_vm; // read_sysreg(hstr_el2);
th->sp.sysregs.sp_el0 = read_sysreg(sp_el0);
th->sp.sysregs.sp_el1 = read_sysreg(sp_el1);
th->sp.sysregs.elr_el1 = read_sysreg(elr_el1);
th->sp.sysregs.spsr_el1 = read_sysreg(spsr_el1);
th->sp.sysregs.sctlr_el1 = read_sysreg(sctlr_el1);
th->sp.sysregs.cpacr_el1 = read_sysreg(cpacr_el1);
th->sp.sysregs.ttbr0_el1 = read_sysreg(ttbr0_el1);
th->sp.sysregs.ttbr1_el1 = read_sysreg(ttbr1_el1);
th->sp.sysregs.tcr_el1 = read_sysreg(tcr_el1);
th->sp.sysregs.esr_el1 = read_sysreg(esr_el1);
th->sp.sysregs.far_el1 = read_sysreg(far_el1);
th->sp.sysregs.par_el1 = read_sysreg(par_el1);
th->sp.sysregs.mair_el1 = read_sysreg(mair_el1);
th->sp.sysregs.vbar_el1 = read_sysreg(vbar_el1);
th->sp.sysregs.contextidr_el1 = read_sysreg(contextidr_el1);
th->sp.sysregs.tpidr_el0 = read_sysreg(tpidr_el0);
th->sp.sysregs.tpidr_el1 = read_sysreg(tpidr_el1);
th->sp.sysregs.tpidrro_el0 = read_sysreg(tpidrro_el0);
}
else
{
th->sp.hyp.hcr_el2 = read_sysreg(hcr_el2);
}
#endif
}
@@ -82,7 +95,7 @@ void thread_user_pf_set(thread_t *cur_th, void *pc, void *user_sp, void *ram, um
cur_th->sp.x20 = 0;
cur_th->sp.pc = (mword_t)ret_form_run;
cur_th->sp.sp = (umword_t)pt;
cur_th->sp.u_sp = (umword_t)user_sp;
cur_th->sp.hyp.sp_el1 = (umword_t)user_sp;
}
void task_knl_init(task_t *knl_tk)
{

3
mkrtos_knl/arch/aarch64/thread_armv8.c
View File

@@ -72,10 +72,13 @@ void thread_sync_entry(entry_frame_t *regs)
syscall_entry(regs);
return;
case 0x00:
printk(" ec:0x%x\n", ec);
return;
case 0x07:
printk(" ec:0x%x\n", ec);
break;
case 0x03:
printk(" ec:0x%x\n", ec);
default:
printk("unknown ec:0x%x\n", ec);
break;

3
mkrtos_knl/knl/irq.c
View File

@@ -100,9 +100,6 @@ void entry_handler(void)
{
assert(isr_no < CONFIG_IRQ_REG_TAB_SIZE);
}
if (isr_no!=30 && isr_no!=0) {
printk("isr_no:%d\n", isr_no);
}
if (!irq_check_usability(isr_no))
{
if (irqs[isr_no].irq_tigger_func)

8
mkrtos_script/build_qemu_aarch64.sh
View File

@@ -1,9 +1,9 @@
#!/bin/bash
# export TOOLCHAIN=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/
# export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
export TOOLCHAIN=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/
export TOOLCHAIN_LIB=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
export TOOLCHAIN=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/bin/
export TOOLCHAIN_LIB=/home/zhangzheng/gcc-arm-10.3-2021.07-aarch64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
# export TOOLCHAIN=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin/
# export TOOLCHAIN_LIB=/home/mkrtos-smart/toolchains/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/lib/gcc/aarch64-none-elf/10.3.1
export BOARD=aarch64_qemu
export CROSS_COMPILE_NAME=aarch64-none-elf-

2
mkrtos_user/lib/mkrtos-musl

Submodule mkrtos_user/lib/mkrtos-musl updated: e271ed124f...4b102a28ae

2
mkrtos_user/server/init/src/test/thread_vcpu_test.S
View File

@@ -1,5 +1,4 @@
.text
.align 12
.global thread_vcpu_test_fn
.type thread_vcpu_test_fn,%function
thread_vcpu_test_fn:
@@ -32,7 +31,6 @@ thread_vcpu_test_fn:
// mov x0, #0x80000
msr elr_el1, x0
eret
.align 12
el0_entry:
//mrs x0, sp_el0
mov x0, #0x10000000

1
mkrtos_user/server/init/src/test/thread_vcpu_test.c
View File

@@ -26,7 +26,6 @@ int thread_vcpu_test(void)
{
return -ENOENT;
}
tag = factory_create_thread_vcpu(FACTORY_PROT, vpage_create_raw3(KOBJ_ALL_RIGHTS, 0, th1_hd));
if (msg_tag_get_prot(tag) < 0)
{