161 lines
3.9 KiB
C
161 lines
3.9 KiB
C
/*
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* Copyright (c) 2014-2016 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <lk/debug.h>
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#include <stdlib.h>
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#include <arch.h>
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#include <arch/atomic.h>
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#include <arch/ops.h>
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#include <arch/arm64.h>
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#include <arch/arm64/mmu.h>
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#include <arch/mp.h>
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#include <kernel/thread.h>
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#include <lk/init.h>
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#include <lk/main.h>
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#include <platform.h>
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#include <lk/trace.h>
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#include <assert.h>
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#define LOCAL_TRACE 0
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#if WITH_SMP
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/* smp boot lock */
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static spin_lock_t arm_boot_cpu_lock = 1;
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static volatile int secondaries_to_init = 0;
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#endif
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static void arm64_cpu_early_init(void) {
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/* set the vector base */
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ARM64_WRITE_SYSREG(VBAR_EL1, (uint64_t)&arm64_exception_base);
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arch_enable_fiqs();
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}
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void arch_early_init(void) {
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arm64_cpu_early_init();
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platform_init_mmu_mappings();
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}
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void arch_stacktrace(uint64_t fp, uint64_t pc)
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{
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struct arm64_stackframe frame;
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if (!fp) {
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frame.fp = (uint64_t)__builtin_frame_address(0);
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frame.pc = (uint64_t)arch_stacktrace;
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} else {
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frame.fp = fp;
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frame.pc = pc;
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}
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printf("stack trace:\n");
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while (frame.fp) {
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printf("0x%llx\n", frame.pc);
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/* Stack frame pointer should be 16 bytes aligned */
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if (frame.fp & 0xF)
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break;
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frame.pc = *((uint64_t *)(frame.fp + 8));
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frame.fp = *((uint64_t *)frame.fp);
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}
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}
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void arch_init(void) {
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#if WITH_SMP
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arch_mp_init_percpu();
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LTRACEF("midr_el1 0x%llx\n", ARM64_READ_SYSREG(midr_el1));
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secondaries_to_init = SMP_MAX_CPUS - 1; /* TODO: get count from somewhere else, or add cpus as they boot */
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lk_init_secondary_cpus(secondaries_to_init);
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LTRACEF("releasing %d secondary cpus\n", secondaries_to_init);
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/* release the secondary cpus */
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spin_unlock(&arm_boot_cpu_lock);
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/* flush the release of the lock, since the secondary cpus are running without cache on */
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arch_clean_cache_range((addr_t)&arm_boot_cpu_lock, sizeof(arm_boot_cpu_lock));
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#endif
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}
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void arch_quiesce(void) {
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}
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void arch_idle(void) {
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__asm__ volatile("wfi");
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}
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void arch_chain_load(void *entry, ulong arg0, ulong arg1, ulong arg2, ulong arg3) {
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PANIC_UNIMPLEMENTED;
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}
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/* switch to user mode, set the user stack pointer to user_stack_top, put the svc stack pointer to the top of the kernel stack */
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void arch_enter_uspace(vaddr_t entry_point, vaddr_t user_stack_top) {
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DEBUG_ASSERT(IS_ALIGNED(user_stack_top, 16));
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thread_t *ct = get_current_thread();
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vaddr_t kernel_stack_top = (uintptr_t)ct->stack + ct->stack_size;
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kernel_stack_top = ROUNDDOWN(kernel_stack_top, 16);
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/* set up a default spsr to get into 64bit user space:
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* zeroed NZCV
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* no SS, no IL, no D
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* all interrupts enabled
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* mode 0: EL0t
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*/
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uint32_t spsr = 0;
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arch_disable_ints();
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asm volatile(
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"mov sp, %[kstack];"
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"msr sp_el0, %[ustack];"
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"msr elr_el1, %[entry];"
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"msr spsr_el1, %[spsr];"
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"eret;"
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:
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: [ustack]"r"(user_stack_top),
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[kstack]"r"(kernel_stack_top),
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[entry]"r"(entry_point),
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[spsr]"r"(spsr)
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: "memory");
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__UNREACHABLE;
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}
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#if WITH_SMP
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/* called from assembly */
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void arm64_secondary_entry(ulong);
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void arm64_secondary_entry(ulong asm_cpu_num) {
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uint cpu = arch_curr_cpu_num();
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if (cpu != asm_cpu_num)
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return;
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arm64_cpu_early_init();
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spin_lock(&arm_boot_cpu_lock);
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spin_unlock(&arm_boot_cpu_lock);
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/* run early secondary cpu init routines up to the threading level */
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lk_init_level(LK_INIT_FLAG_SECONDARY_CPUS, LK_INIT_LEVEL_EARLIEST, LK_INIT_LEVEL_THREADING - 1);
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arch_mp_init_percpu();
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LTRACEF("cpu num %d\n", cpu);
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/* we're done, tell the main cpu we're up */
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atomic_add(&secondaries_to_init, -1);
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__asm__ volatile("sev");
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lk_secondary_cpu_entry();
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}
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#endif
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