This seems to be somewhat properly emulated in qemu. qemu-system-arm -machine lm3s6965evb -cpu cortex-m3
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/*
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* Copyright (c) 2012 Ian McKellar
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <stdarg.h>
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#include <reg.h>
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#include <debug.h>
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#include <stdio.h>
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#include <lib/cbuf.h>
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#include <kernel/thread.h>
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#include <platform/debug.h>
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#include <arch/ops.h>
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#include <target/debugconfig.h>
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#include <arch/arm/cm.h>
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#include "ti_driverlib.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_types.h"
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#define DEBUG_UART UART0_BASE
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static cbuf_t debug_rx_buf;
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void stellaris_uart0_irq(void)
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{
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arm_cm_irq_entry();
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//
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// Get the interrrupt status.
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//
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unsigned long ulStatus = UARTIntStatus(DEBUG_UART, true);
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//
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// Clear the asserted interrupts.
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//
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UARTIntClear(DEBUG_UART, ulStatus);
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//
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// Loop while there are characters in the receive FIFO.
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//
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bool resched = false;
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while (UARTCharsAvail(DEBUG_UART)) {
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//
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// Read the next character from the UART and write it back to the UART.
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//
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unsigned char c = UARTCharGetNonBlocking(DEBUG_UART);
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cbuf_write_char(&debug_rx_buf, c, false);
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resched = true;
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}
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arm_cm_irq_exit(resched);
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}
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void stellaris_debug_early_init(void)
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{
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SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
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/* we only support UART0 right now */
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STATIC_ASSERT(DEBUG_UART == UART0_BASE);
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if (DEBUG_UART == UART0_BASE) {
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#if defined(PART_LM4F120H5QR)
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/* Set GPIO A0 and A1 as UART pins. */
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GPIOPinConfigure(GPIO_PA0_U0RX);
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GPIOPinConfigure(GPIO_PA1_U0TX);
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GPIOPinTypeUART(GPIO_PORTA_AHB_BASE, GPIO_PIN_0 | GPIO_PIN_1);
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#endif
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}
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UARTConfigSetExpClk(DEBUG_UART, SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8|UART_CONFIG_STOP_ONE|UART_CONFIG_PAR_NONE);
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UARTEnable(DEBUG_UART);
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}
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void stellaris_debug_init(void)
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{
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cbuf_initialize(&debug_rx_buf, 16);
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/* Enable the UART interrupt. */
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UARTIntEnable(DEBUG_UART, UART_INT_RX | UART_INT_RT);
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NVIC_EnableIRQ(INT_UART0 - 16);
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}
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void platform_dputc(char c)
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{
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if (c == '\n') {
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platform_dputc('\r');
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}
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UARTCharPut(DEBUG_UART, c);
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}
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int platform_dgetc(char *c, bool wait)
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{
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return cbuf_read_char(&debug_rx_buf, c, wait);
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}
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