133 lines
5.0 KiB
C
133 lines
5.0 KiB
C
/*
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* Copyright (c) 2012 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <debug.h>
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#include <compiler.h>
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#include <stm32f0xx.h>
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#include <arch/arm/cm.h>
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#include <platform/stm32.h>
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#include <target/debugconfig.h>
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#include <lib/cbuf.h>
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/* un-overridden irq handler */
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void stm32_dummy_irq(void)
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{
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arm_cm_irq_entry();
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panic("unhandled irq\n");
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}
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/* a list of default handlers that are simply aliases to the dummy handler */
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#define DEFAULT_HANDLER(x) \
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void stm32_##x(void) __WEAK_ALIAS("stm32_dummy_irq");
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DEFAULT_HANDLER(WWDG_IRQ)
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DEFAULT_HANDLER(PVD_IRQ)
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DEFAULT_HANDLER(RTC_IRQ)
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DEFAULT_HANDLER(FLASH_IRQ)
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DEFAULT_HANDLER(RCC_IRQ)
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DEFAULT_HANDLER(EXTI0_1_IRQ)
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DEFAULT_HANDLER(EXTI2_3_IRQ)
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DEFAULT_HANDLER(EXTI4_15_IRQ)
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DEFAULT_HANDLER(TSC_IRQ)
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DEFAULT_HANDLER(DMA1_Channel1_IRQ)
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DEFAULT_HANDLER(DMA1_Channel2_3_IRQ)
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DEFAULT_HANDLER(DMA1_Channel4_5_6_7_IRQ)
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DEFAULT_HANDLER(ADC1_COMP_IRQ)
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DEFAULT_HANDLER(TIM1_BRK_UP_TRG_COM_IRQ)
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DEFAULT_HANDLER(TIM1_CC_IRQ)
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DEFAULT_HANDLER(TIM2_IRQ)
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DEFAULT_HANDLER(TIM3_IRQ)
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DEFAULT_HANDLER(TIM6_DAC_IRQ)
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DEFAULT_HANDLER(TIM7_IRQ)
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DEFAULT_HANDLER(TIM14_IRQ)
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DEFAULT_HANDLER(TIM15_IRQ)
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DEFAULT_HANDLER(TIM16_IRQ)
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DEFAULT_HANDLER(TIM17_IRQ)
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DEFAULT_HANDLER(I2C1_IRQ)
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DEFAULT_HANDLER(I2C2_IRQ)
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DEFAULT_HANDLER(SPI1_IRQ)
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DEFAULT_HANDLER(SPI2_IRQ)
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DEFAULT_HANDLER(USART1_IRQ)
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DEFAULT_HANDLER(USART2_IRQ)
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DEFAULT_HANDLER(USART3_4_IRQ)
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DEFAULT_HANDLER(CEC_CAN_IRQ)
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DEFAULT_HANDLER(USB_IRQ)
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#define VECTAB_ENTRY(x) [x##n] = stm32_##x
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/* appended to the end of the main vector table */
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const void *const __SECTION(".text.boot.vectab2") vectab2[] = {
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VECTAB_ENTRY(WWDG_IRQ), // Window WatchDog Interrupt
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#ifdef PVD_IRQ
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VECTAB_ENTRY(PVD_IRQ), // PVD through EXTI Line detect Interrupt
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#endif
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VECTAB_ENTRY(RTC_IRQ), // RTC through EXTI Line Interrupt
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VECTAB_ENTRY(FLASH_IRQ), // FLASH Interrupt
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VECTAB_ENTRY(RCC_IRQ), // RCC Interrupt
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VECTAB_ENTRY(EXTI0_1_IRQ), // EXTI Line 0 and 1 Interrupts
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VECTAB_ENTRY(EXTI2_3_IRQ), // EXTI Line 2 and 3 Interrupts
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VECTAB_ENTRY(EXTI4_15_IRQ), // EXTI Line 4 to 15 Interrupts
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#ifdef TSC_IRQ
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VECTAB_ENTRY(TSC_IRQ), // Touch sense controller Interrupt
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#endif
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VECTAB_ENTRY(DMA1_Channel1_IRQ), // DMA1 Channel 1 Interrupt
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VECTAB_ENTRY(DMA1_Channel2_3_IRQ), // DMA1 Channel 2 and Channel 3 Interrupts
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VECTAB_ENTRY(DMA1_Channel4_5_6_7_IRQ), // DMA1 Channels 4-7 Interrupts
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VECTAB_ENTRY(ADC1_COMP_IRQ), // ADC1, COMP1 and COMP2 Interrupts
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VECTAB_ENTRY(TIM1_BRK_UP_TRG_COM_IRQ), // TIM1 Break, Update, Trigger and Commutation Interrupts
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VECTAB_ENTRY(TIM1_CC_IRQ), // TIM1 Capture Compare Interrupt
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#ifdef TIM2_IRQ
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VECTAB_ENTRY(TIM2_IRQ), // TIM2 Interrupt
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#endif
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#ifdef TIM3_IRQ
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VECTAB_ENTRY(TIM3_IRQ), // TIM3 Interrupt
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#endif
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VECTAB_ENTRY(TIM6_DAC_IRQ), // TIM6 and DAC Interrupts
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#ifdef TIM7_IRQ
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VECTAB_ENTRY(TIM7_IRQ), // TIM7 Interrupts
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#endif
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#ifdef TIM14_IRQ
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VECTAB_ENTRY(TIM14_IRQ), // TIM14 Interrupt
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#endif
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#ifdef TIM15_IRQ
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VECTAB_ENTRY(TIM15_IRQ), // TIM15 Interrupt
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#endif
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#ifdef TIM16_IRQ
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VECTAB_ENTRY(TIM16_IRQ), // TIM16 Interrupt
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#endif
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#ifdef TIM17_IRQ
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VECTAB_ENTRY(TIM17_IRQ), // TIM17 Interrupt
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#endif
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VECTAB_ENTRY(I2C1_IRQ), // I2C1 Interrupt
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VECTAB_ENTRY(I2C2_IRQ), // I2C2 Interrupt
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VECTAB_ENTRY(SPI1_IRQ), // SPI1 Interrupt
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VECTAB_ENTRY(SPI2_IRQ), // SPI2 Interrupt
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VECTAB_ENTRY(USART1_IRQ), // USART1 Interrupt
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VECTAB_ENTRY(USART2_IRQ), // USART2 Interrupt
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VECTAB_ENTRY(USART3_4_IRQ), // USART3 and USART4 Interrupts
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#ifdef CEC_CAN_IRQ
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VECTAB_ENTRY(CEC_CAN_IRQ), // CEC Interrupt
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#endif
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VECTAB_ENTRY(USB_IRQ), // USB Low Priority global Interrupt
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};
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