d5f394859d
Had to rearrange the proble logic somewhat, but now the bus manager will assign consequtive bus numbers as it finds bridges and recursively drills down to discover the entire bus structure. Does not assign resources yet, but need to do this in the first pass to find all of the devices before can figure out how much space they occupy.
61 lines
1.5 KiB
C++
61 lines
1.5 KiB
C++
/*
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* Copyright (c) 2021 Travis Geiseblrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#pragma once
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#include <sys/types.h>
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#include <dev/bus/pci.h>
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#include <lk/cpp.h>
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#include "device.h"
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namespace pci {
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class bus;
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// bridge device, holds a list of busses that it is responsible for
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class bridge : public device {
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public:
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bridge(pci_location_t loc, bus *bus);
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~bridge() override;
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DISALLOW_COPY_ASSIGN_AND_MOVE(bridge);
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static status_t probe(pci_location_t loc, bus *parent_bus, bridge **out_bridge);
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// called when a sub bridge is assigned a new secondary bus.
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// if this extends our subordinate bus, recursively call the parent bridge.
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void extend_subordinate_range(uint8_t new_secondary_bus);
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void assign_bus_numbers(uint8_t primary, uint8_t secondary, uint8_t subordinate_bus);
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void add_bus(bus *b) { secondary_bus_ = b; }
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void dump(size_t indent = 0) override;
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// config accessors
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uint8_t primary_bus() const { return config_.type1.primary_bus; }
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uint8_t secondary_bus() const { return config_.type1.secondary_bus; }
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uint8_t subordinate_bus() const { return config_.type1.subordinate_bus; }
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template <typename T>
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struct range {
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T base;
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T limit;
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};
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range<uint32_t> io_range();
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range<uint32_t> mem_range();
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range<uint64_t> prefetch_range();
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private:
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bus *secondary_bus_ = nullptr;
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};
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} // pci
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