d1f4b4a546
A decent 8 core riscv64 board with dual ethernet and 2 or 4GB ram. Fairly easy to bring up on, though not a lot of docs at the moment.
40 lines
1.4 KiB
C
40 lines
1.4 KiB
C
/*
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* Copyright (c) 2024 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#pragma once
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// Taken from device tree from booted Linux system
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// memory and irq layout of Spacemit-K1
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#define MEMORY_BASE_PHYS (0)
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// up to 16 GB of ram
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#define MEMORY_APERTURE_SIZE (16ULL * 1024 * 1024 * 1024)
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// map all of 0-2GB into kernel space in one shot
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#define PERIPHERAL_BASE_PHYS (0x80000000UL)
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#define PERIPHERAL_BASE_SIZE (0x80000000UL) // 2GB
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// use the giant mapping at the bottom of the kernel as our peripheral space
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#define PERIPHERAL_BASE_VIRT (KERNEL_ASPACE_BASE + PERIPHERAL_BASE_PHYS)
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// interrupts
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#define IRQ_VIRTIO_BASE 1
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#define IRQ_UART0 0x2a
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#define NUM_IRQS 0x9f
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// addresses of some peripherals
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#define CLINT_BASE 0xe4000000
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#define CLINT_BASE_VIRT (PERIPHERAL_BASE_VIRT + CLINT_BASE - PERIPHERAL_BASE_PHYS)
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#define PLIC_BASE 0xe0000000
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#define PLIC_BASE_VIRT (PERIPHERAL_BASE_VIRT + PLIC_BASE - PERIPHERAL_BASE_PHYS)
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#define UART0_BASE 0xd4017000
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#define UART0_BASE_VIRT (PERIPHERAL_BASE_VIRT + UART0_BASE - PERIPHERAL_BASE_PHYS)
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#define DRAM_BASE 0
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#define DRAM_BASE_VIRT (PERIPHERAL_BASE_VIRT + DRAM_BASE - PERIPHERAL_BASE_PHYS)
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#define DRAM_BASE2 0x10000000UL
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#define DRAM_BASE2_VIRT (PERIPHERAL_BASE_VIRT + DRAM_BASE2 - PERIPHERAL_BASE_PHYS)
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