Travis Geiselbrecht 7c9906a5ff [arch][riscv] Initial implementation of MMU for RISC-V ...

Implements both SV39 and SV48. No 32bit support yet.

Currently implements basic setup of paging in start.S by mapping a large
chunk of memory into both an identity map and to the bottom of the
kernel address space. Run the kernel out of this physical mapping.

Added basic arch mmu support for querying existing paging structures and
mapping 4K pages. No unmap support as of yet.

System boots with mmu on when running supervisor test on qemu. Untested
on real hardware as of yet.

2020-05-10 17:09:48 -07:00

..

include/platform

[arch][riscv] Initial implementation of MMU for RISC-V

2020-05-10 17:09:48 -07:00

platform_p.h

[platform][riscv-virt] added support for QEMU's riscv 'virt' machine

2019-11-02 14:19:36 -07:00

platform.c

[arch][riscv] Initial implementation of MMU for RISC-V

2020-05-10 17:09:48 -07:00

plic.c

[platform][qemu-riscv] Fixup qemu-riscv target

2020-01-19 14:48:25 -08:00

rules.mk

[arch][riscv] Initial implementation of MMU for RISC-V

2020-05-10 17:09:48 -07:00

uart.c

[platform][qemu-riscv] add virtio to bring it up to par with arm virt machine

2020-01-19 16:17:34 -08:00