e03d4196a3
Move common logic into a default routine in platform/power that other platforms can reuse to implement the general default shutdown logic. Add helper routines to print the cause. Refactor the platforms that had substantial halt logic to reuse the default implementation.
97 lines
2.7 KiB
C
97 lines
2.7 KiB
C
/*
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* Copyright (c) 2009 Corey Tabaka
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <stdarg.h>
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#include <lk/reg.h>
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#include <stdio.h>
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#include <kernel/thread.h>
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#include <arch/x86.h>
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#include <lib/cbuf.h>
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#include <platform.h>
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#include <platform/interrupts.h>
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#include <platform/pc.h>
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#include <platform/console.h>
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#include <platform/keyboard.h>
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#include <platform/debug.h>
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#include "platform_p.h"
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#ifndef DEBUG_BAUD_RATE
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#define DEBUG_BAUD_RATE 115200
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#endif
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#ifndef DEBUG_COM_PORT
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#define DEBUG_COM_PORT 1
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#endif
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static const int uart_baud_rate = DEBUG_BAUD_RATE;
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static const int uart_io_port = (DEBUG_COM_PORT == 1) ? COM1_REG :
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(DEBUG_COM_PORT == 2) ? COM2_REG :
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(DEBUG_COM_PORT == 3) ? COM3_REG :
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COM4_REG;
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static const int uart_irq = (DEBUG_COM_PORT == 1 || DEBUG_COM_PORT == 3) ? INT_COM1_COM3 : INT_COM2_COM4;
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cbuf_t console_input_buf;
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static enum handler_return uart_irq_handler(void *arg) {
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unsigned char c;
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bool resched = false;
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while (inp(uart_io_port + 5) & (1<<0)) {
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c = inp(uart_io_port + 0);
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cbuf_write_char(&console_input_buf, c, false);
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resched = true;
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}
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return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
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}
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void platform_init_debug_early(void) {
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/* configure the uart */
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const int divisor = 115200 / uart_baud_rate;
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/* get basic config done so that tx functions */
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outp(uart_io_port + 1, 0); // mask all irqs
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outp(uart_io_port + 3, 0x80); // set up to load divisor latch
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outp(uart_io_port + 0, divisor & 0xff); // lsb
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outp(uart_io_port + 1, divisor >> 8); // msb
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outp(uart_io_port + 3, 3); // 8N1
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outp(uart_io_port + 2, 0x07); // enable FIFO, clear, 14-byte threshold
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outp(uart_io_port + 4, 0x3); // drive flow control bits high
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}
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void platform_init_debug(void) {
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/* finish uart init to get rx going */
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cbuf_initialize(&console_input_buf, 1024);
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register_int_handler(uart_irq, uart_irq_handler, NULL);
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unmask_interrupt(uart_irq);
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outp(uart_io_port + 1, 0x1); // enable receive data available interrupt
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// modem control register: Auxiliary Output 2 is another IRQ enable bit
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const uint8_t mcr = inp(uart_io_port + 4);
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outp(uart_io_port + 4, mcr | 0x8);
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}
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static void debug_uart_putc(char c) {
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while ((inp(uart_io_port + 5) & (1<<6)) == 0)
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;
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outp(uart_io_port + 0, c);
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}
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void platform_dputc(char c) {
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if (c == '\n')
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platform_dputc('\r');
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cputc(c);
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debug_uart_putc(c);
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}
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int platform_dgetc(char *c, bool wait) {
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return cbuf_read_char(&console_input_buf, c, wait);
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}
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