b7d69d8804
I have a bulldozer machine here that curiously starts the APIC IDs for the cpus at 16 and counts up. This is a problem since the current code assumes that the boot cpu is 0, and would try to start itself (apic id 16) later because it thought it was the first secondary. Fix this by re-reading the APIC id on the boot cpu and patching the percpu structure a bit into boot. Kinda a hack but avoids having to detect the APIC, find the type of ID to read, etc. Also means that practically speaking the system is using the full 32bit APIC IDs if that feature is present, since now the local apic id is entirely read from the local apic as it should be (if present). Fixes #475
124 lines
3.4 KiB
C
124 lines
3.4 KiB
C
/*
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* Copyright (c) 2024 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <arch/x86/mp.h>
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#include <assert.h>
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#include <lk/trace.h>
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#include <lk/err.h>
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#include <lk/init.h>
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#include <lk/main.h>
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#include <arch/mp.h>
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#include <string.h>
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#include <arch/x86.h>
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#include <arch/x86/descriptor.h>
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#include <arch/arch_ops.h>
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#include <sys/types.h>
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#include <arch/x86/lapic.h>
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#include <arch/x86/feature.h>
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#define LOCAL_TRACE 0
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#if WITH_SMP
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// the boot cpu's percpu struct
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static x86_percpu_t x86_boot_percpu;
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// pointer to an array of percpu structs for each of the secondary cpus
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static x86_percpu_t *x86_ap_percpus;
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x86_percpu_t *x86_get_percpu_for_cpu(uint cpu_num) {
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DEBUG_ASSERT(cpu_num < SMP_MAX_CPUS);
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if (cpu_num == 0) {
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return &x86_boot_percpu;
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}
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DEBUG_ASSERT(x86_ap_percpus);
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return &x86_ap_percpus[cpu_num - 1];
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}
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void x86_configure_percpu_early(uint cpu_num, uint apic_id) {
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x86_percpu_t *percpu = x86_get_percpu_for_cpu(cpu_num);
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// initialize the percpu structure for this cpu
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percpu->self = percpu;
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percpu->cpu_num = cpu_num;
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percpu->apic_id = apic_id;
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#if ARCH_X86_64
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// use the 64-bit gs base msr to set up a pointer to the percpu struct
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write_msr(X86_MSR_IA32_KERNEL_GS_BASE, 0);
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write_msr(X86_MSR_IA32_GS_BASE, (uint64_t)percpu);
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#else
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// set up a gs descriptor for this cpu
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uint16_t selector = PERCPU_SELECTOR_BASE + cpu_num * 8;
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x86_set_gdt_descriptor(selector, percpu, sizeof(*percpu), 1, 0, 1, SEG_TYPE_DATA_RW, 0, 1);
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x86_set_gs(selector);
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#endif
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}
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status_t arch_mp_send_ipi(mp_cpu_mask_t target, mp_ipi_t ipi) {
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LTRACEF("cpu %u target 0x%x, ipi 0x%x\n", arch_curr_cpu_num(), target, ipi);
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DEBUG_ASSERT(arch_ints_disabled());
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uint curr_cpu_num = arch_curr_cpu_num();
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// translate the target bitmap to apic id
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while (target) {
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uint cpu_num = __builtin_ctz(target);
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target &= ~(1u << cpu_num);
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// skip the current cpu
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if (cpu_num == curr_cpu_num) {
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continue;
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}
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x86_percpu_t *percpu = x86_get_percpu_for_cpu(cpu_num);
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uint32_t apic_id = percpu->apic_id;
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// send the ipi to the target cpu
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lapic_send_ipi(apic_id, ipi);
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}
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return NO_ERROR;
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}
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void x86_secondary_entry(uint cpu_num) {
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// Read the local apic id from the local apic.
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// NOTE: assumes a local apic is present but since this is a secondary cpu,
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// it should be a safe assumption.
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lapic_enable_on_local_cpu();
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uint32_t apic_id = lapic_get_apic_id();
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x86_configure_percpu_early(cpu_num, apic_id);
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x86_early_init_percpu();
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// run early secondary cpu init routines up to the threading level
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lk_init_level(LK_INIT_FLAG_SECONDARY_CPUS, LK_INIT_LEVEL_EARLIEST, LK_INIT_LEVEL_THREADING - 1);
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dprintf(INFO, "SMP: secondary cpu %u started, apic id %u\n", arch_curr_cpu_num(), apic_id);
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lk_secondary_cpu_entry();
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// should never get here except for an error condition
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for (;;);
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}
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status_t x86_allocate_percpu_array(uint num_cpus) {
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x86_ap_percpus = memalign(_Alignof(x86_percpu_t), num_cpus * sizeof(x86_percpu_t));
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if (!x86_ap_percpus) {
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return ERR_NO_MEMORY;
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}
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memset(x86_ap_percpus, 0, num_cpus * sizeof(x86_percpu_t));
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return NO_ERROR;
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}
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#else
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void x86_configure_percpu_early(uint cpu_num, uint apic_id) {}
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#endif |