b7d69d8804
I have a bulldozer machine here that curiously starts the APIC IDs for the cpus at 16 and counts up. This is a problem since the current code assumes that the boot cpu is 0, and would try to start itself (apic id 16) later because it thought it was the first secondary. Fix this by re-reading the APIC id on the boot cpu and patching the percpu structure a bit into boot. Kinda a hack but avoids having to detect the APIC, find the type of ID to read, etc. Also means that practically speaking the system is using the full 32bit APIC IDs if that feature is present, since now the local apic id is entirely read from the local apic as it should be (if present). Fixes #475
192 lines
4.8 KiB
ArmAsm
192 lines
4.8 KiB
ArmAsm
/*
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* Copyright (c) 2009 Corey Tabaka
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* Copyright (c) 2015 Intel Corporation
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* Copyright (c) 2016 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <lk/asm.h>
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#include <arch/x86/descriptor.h>
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#include <arch/x86/mmu.h>
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#include <hw/multiboot.h>
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#define PHYS_LOAD_ADDRESS (MEMBASE + KERNEL_LOAD_OFFSET)
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#define PHYS_ADDR_DELTA (KERNEL_BASE + KERNEL_LOAD_OFFSET - PHYS_LOAD_ADDRESS)
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#define PHYS(x) ((x) - PHYS_ADDR_DELTA)
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.section ".text.boot"
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.global _start
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_start:
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jmp real_start
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.align 4
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/* flags for multiboot header */
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#define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_PAGE_ALIGN | MULTIBOOT_MEMORY_INFO | MULTIBOOT_AOUT_KLUDGE)
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.type multiboot_header,STT_OBJECT
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multiboot_header:
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/* magic */
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.int MULTIBOOT_HEADER_MAGIC
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/* flags */
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.int MULTIBOOT_HEADER_FLAGS
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/* checksum */
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.int -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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/* header_addr */
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.int PHYS(multiboot_header)
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/* load_addr */
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.int PHYS(_start)
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/* load_end_addr */
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.int PHYS(__data_end)
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/* bss_end_addr */
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.int PHYS(__bss_end)
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/* entry_addr */
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.int PHYS(real_start)
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real_start:
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cmpl $MULTIBOOT_BOOTLOADER_MAGIC, %eax
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jne 0f
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movl %ebx, PHYS(_multiboot_info)
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0:
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/* load our new gdt by physical pointer */
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lgdt PHYS(_gdtr_phys)
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movw $DATA_SELECTOR, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %ss
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movw %ax, %gs
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movw %ax, %ss
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/* load initial stack pointer */
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movl $PHYS(_kstack + 4096), %esp
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/*We jumped here in protected mode in a code segment that migh not longer
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be valid , do a long jump to our code segment, we use retf instead of
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ljmp to be able to use relative labels */
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pushl $CODE_SELECTOR /*Pushing our code segment */
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pushl $PHYS(.Lfarjump) /*and jump address */
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retf /*This instruction will jump to codesel:farjump */
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.Lfarjump:
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/* zero the bss section */
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bss_setup:
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movl $PHYS(__bss_start), %edi /* starting address of the bss */
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movl $PHYS(__bss_end), %ecx /* find the length of the bss in bytes */
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subl %edi, %ecx
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shrl $2, %ecx /* convert to 32 bit words, since the bss is aligned anyway */
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2:
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movl $0, (%edi)
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addl $4, %edi
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loop 2b
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paging_setup:
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#if X86_LEGACY
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/* map the first 16MB 1:1 with 4KB pages and again at 0x8000.0000 */
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/* set up 4 page tables worth of entries */
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movl $PHYS(kernel_pt), %edi
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movl $1024*4,%ecx
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movl $X86_KERNEL_PT_FLAGS, %eax
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.Lfill_pt:
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movl %eax, (%edi)
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addl $4, %edi
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addl $4096, %eax
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loop .Lfill_pt
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/* set up the page dir with 4 entries at 0 and 0x8000.0000 pointing
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* to 4 page tables that will map physical address 0 - 16MB
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*/
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movl $PHYS(kernel_pd), %esi
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movl $PHYS(kernel_pd) + 512*4, %edi
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movl $PHYS(kernel_pt) + X86_KERNEL_PT_FLAGS, %eax
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movl %eax, (%esi)
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movl %eax, (%edi)
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addl $4096, %eax
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movl %eax, 4(%esi)
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movl %eax, 4(%edi)
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addl $4096, %eax
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movl %eax, 8(%esi)
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movl %eax, 8(%edi)
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addl $4096, %eax
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movl %eax, 12(%esi)
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movl %eax, 12(%edi)
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#else
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/* map the first 1GB 1:1 using 4MB pages */
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movl $PHYS(kernel_pd), %esi
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movl $0x100, %ecx
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xor %eax, %eax
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.Lfill_pd:
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mov %eax, %edx
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orl $X86_KERNEL_PD_LP_FLAGS, %edx
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movl %edx, (%esi)
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addl $4, %esi
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addl $0x00400000, %eax
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loop .Lfill_pd
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/* map the first 1GB to KERNEL_ASPACE_BASE */
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movl $(PHYS(kernel_pd) + 0x800), %esi
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movl $0x100, %ecx
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xor %eax, %eax
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.Lfill_pd2:
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mov %eax, %edx
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orl $X86_KERNEL_PD_LP_FLAGS, %edx
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movl %edx, (%esi)
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addl $4, %esi
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addl $0x00400000, %eax
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loop .Lfill_pd2
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/* enable PSE (4MB pages) */
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mov %cr4, %eax
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orl $(1<<4), %eax
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mov %eax, %cr4
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#endif
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/* Set PD in CR3 */
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movl $PHYS(kernel_pd), %eax
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mov %eax, %cr3
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/* save a copy of the address of the kernel page directory */
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movl %eax, PHYS(kernel_pd_phys)
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/* Enabling Paging and from this point we are in */
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mov %cr0, %eax
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btsl $(31), %eax
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mov %eax, %cr0
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/* load the high kernel stack */
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movl $(_kstack + 4096), %esp
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/* reload the high gdtr */
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lgdt PHYS(_gdtr)
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/* branch to the high address */
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movl $main_lk, %eax
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jmp *%eax
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main_lk:
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/* set up the idt */
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call setup_idt
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/* set up the percpu data structure pointer for the boot cpu */
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/* NOTE: sets the first cpu as APIC id 0 for now, which may not be correct. Fixed later in boot. */
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pushl $0
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pushl $0
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call x86_configure_percpu_early
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/* call the main module */
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call lk_main
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0: /* just sit around waiting for interrupts */
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hlt /* interrupts will unhalt the processor */
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pause
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jmp 0b /* so jump back to halt to conserve power */
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