acfe991c7f
Support mp lk start on RISC-V. Several changes throughout were required: - Add signal in asm start to force secondary harts to wait for bss to be cleared. - Use mhartid in arch_curr_cpu_num, PLIC, and CLINT - Use tp register as thread pointer instead of global variable. - Support sending IPIs between harts using CLINT - Add spinlock implementation
22 lines
535 B
Makefile
22 lines
535 B
Makefile
LOCAL_DIR := $(GET_LOCAL_DIR)
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MODULE := $(LOCAL_DIR)
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PLATFORM := sifive
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VARIANT := sifive_u
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WITH_SMP := 1
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SMP_MAX_CPUS := 5
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GLOBAL_DEFINES += SIFIVE_FREQ=500000000 # 500 MHz
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MEMBASE ?= 0x080000000
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MEMSIZE ?= 0x200000000 # 8 GiB
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MODULE_SRCS := $(LOCAL_DIR)/target.c
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# set some global defines based on capability
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GLOBAL_DEFINES += TARGET_HAS_DEBUG_LED=1
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GLOBAL_DEFINES += PLATFORM_HAS_DYNAMIC_TIMER=1
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GLOBAL_DEFINES += ARCH_RISCV_CLINT_BASE=0x02000000
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GLOBAL_DEFINES += ARCH_RISCV_MTIME_RATE=1000000 # 1 MHz
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include make/module.mk |