acfe991c7f
Support mp lk start on RISC-V. Several changes throughout were required: - Add signal in asm start to force secondary harts to wait for bss to be cleared. - Use mhartid in arch_curr_cpu_num, PLIC, and CLINT - Use tp register as thread pointer instead of global variable. - Support sending IPIs between harts using CLINT - Add spinlock implementation
110 lines
3.1 KiB
Plaintext
110 lines
3.1 KiB
Plaintext
OUTPUT_FORMAT("elf%BITS%-littleriscv", "elf%BITS%-bigriscv", "elf%BITS%-littleriscv")
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OUTPUT_ARCH(riscv)
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ENTRY(_start)
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SECTIONS
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{
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. = %KERNEL_BASE% + %KERNEL_LOAD_OFFSET%;
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_start = .;
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/* text/read-only data */
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/* set the load address to physical MEMBASE */
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.text : AT(%MEMBASE% + %KERNEL_LOAD_OFFSET%) {
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KEEP(*(.text.boot))
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*(.text .text*)
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*(.gnu.linkonce.t.*)
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}
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) }
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.rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) }
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.rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) }
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.rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) }
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.rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
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.rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
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.rel.got : { *(.rel.got) }
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.rela.got : { *(.rela.got) }
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.rel.ctors : { *(.rel.ctors) }
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.rela.ctors : { *(.rela.ctors) }
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.rel.dtors : { *(.rel.dtors) }
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.rela.dtors : { *(.rela.dtors) }
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.rel.init : { *(.rel.init) }
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.rela.init : { *(.rela.init) }
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.rel.fini : { *(.rel.fini) }
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.rela.fini : { *(.rela.fini) }
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.rel.bss : { *(.rel.bss) }
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.rela.bss : { *(.rela.bss) }
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.rel.plt : { *(.rel.plt) }
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.rela.plt : { *(.rela.plt) }
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.init : { *(.init) }
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.plt : { *(.plt) }
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.rodata : ALIGN(4) {
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__rodata_start = .;
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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*(.srodata*)
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}
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/*
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* extra linker scripts tend to insert sections just after .rodata,
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* so we want to make sure this symbol comes after anything inserted above,
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* but not aligned to the next section necessarily.
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*/
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.dummy_post_rodata : {
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__rodata_end = .;
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}
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.data : ALIGN(4) {
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__data_start_rom = .;
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/* in one segment binaries, the rom data address is on top of the ram data address */
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__data_start = .;
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*(.data .data.* .gnu.linkonce.d.*)
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PROVIDE( __global_pointer$ = . + (4K / 2) );
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*(.sdata .sdata.*)
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__ctor_list = .;
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KEEP(*(.ctors .init_array))
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__ctor_end = .;
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__dtor_list = .;
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KEEP(*(.dtors .fini_array))
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__dtor_end = .;
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*(.got*)
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*(.dynamic)
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}
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/*
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* extra linker scripts tend to insert sections just after .data,
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* so we want to make sure this symbol comes after anything inserted above,
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* but not aligned to the next section necessarily.
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*/
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.dummy_post_data : {
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__data_end = .;
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}
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/* uninitialized data (in same segment as writable data) */
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.bss : ALIGN(4) {
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__bss_start = .;
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/* regular bss */
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*(.bss .bss.*)
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*(.sbss .sbss.*)
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*(.gnu.linkonce.b.*)
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. = ALIGN(4);
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__bss_end = .;
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}
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/* Align the end to ensure anything after the kernel ends up on its own pages */
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. = ALIGN(4096);
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_end = .;
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. = %KERNEL_BASE% + %MEMSIZE%;
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_end_of_ram = .;
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/* Strip unnecessary stuff */
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/DISCARD/ : { *(.comment .note .eh_frame) }
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}
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