124 lines
4.5 KiB
C
124 lines
4.5 KiB
C
/*
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* Copyright (c) 2015 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <assert.h>
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#include <lk/compiler.h>
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#include <lk/trace.h>
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#include <arch/riscv.h>
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#include <kernel/thread.h>
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#include <platform.h>
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#include <arch/riscv/iframe.h>
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#define LOCAL_TRACE 0
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static const char *cause_to_string(long cause) {
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switch (cause) {
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case RISCV_EXCEPTION_IADDR_MISALIGN:
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return "Instruction address misaligned";
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case RISCV_EXCEPTION_IACCESS_FAULT:
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return "Instruction access fault";
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case RISCV_EXCEPTION_ILLEGAL_INS:
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return "Illegal instruction";
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case RISCV_EXCEPTION_BREAKPOINT:
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return "Breakpoint";
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case RISCV_EXCEPTION_LOAD_ADDR_MISALIGN:
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return "Load address misaligned";
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case RISCV_EXCEPTION_LOAD_ACCESS_FAULT:
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return "Load access fault";
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case RISCV_EXCEPTION_STORE_ADDR_MISALIGN:
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return "Store/AMO address misaligned";
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case RISCV_EXCEPTION_STORE_ACCESS_FAULT:
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return "Store/AMO access fault";
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case RISCV_EXCEPTION_ENV_CALL_U_MODE:
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return "Environment call from U-mode";
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case RISCV_EXCEPTION_ENV_CALL_S_MODE:
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return "Environment call from S-mode";
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case RISCV_EXCEPTION_ENV_CALL_M_MODE:
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return "Environment call from M-mode";
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case RISCV_EXCEPTION_INS_PAGE_FAULT:
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return "Instruction page fault";
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case RISCV_EXCEPTION_LOAD_PAGE_FAULT:
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return "Load page fault";
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case RISCV_EXCEPTION_STORE_PAGE_FAULT:
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return "Store/AMO page fault";
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}
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return "Unknown";
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}
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static void dump_iframe(struct riscv_short_iframe *frame, bool kernel) {
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printf("a0 %#16lx a1 %#16lx a2 %#16lx a3 %#16lx\n", frame->a0, frame->a1, frame->a2, frame->a3);
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printf("a4 %#16lx a5 %#16lx a6 %#16lx a7 %#16lx\n", frame->a4, frame->a5, frame->a6, frame->a7);
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printf("t0 %#16lx t1 %#16lx t2 %#16lx t3 %#16lx\n", frame->t0, frame->t1, frame->t2, frame->t3);
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printf("t5 %#16lx t6 %#16lx\n", frame->t5, frame->t6);
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if (!kernel) {
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printf("gp %#16lx tp %#16lx sp %#lx\n", frame->gp, frame->tp, frame->sp);
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}
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}
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__NO_RETURN __NO_INLINE
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static void fatal_exception(long cause, ulong epc, struct riscv_short_iframe *frame, bool kernel) {
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if (cause < 0) {
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printf("unhandled interrupt cause %#lx, epc %#lx, tval %#lx\n", cause, epc,
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riscv_csr_read(RISCV_CSR_XTVAL));
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} else {
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printf("unhandled exception cause %#lx (%s), epc %#lx, tval %#lx\n", cause,
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cause_to_string(cause), epc, riscv_csr_read(RISCV_CSR_XTVAL));
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}
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dump_iframe(frame, kernel);
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platform_halt(HALT_ACTION_HALT, HALT_REASON_SW_PANIC);
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}
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// weak reference, can override this somewhere else
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__WEAK
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void riscv_syscall_handler(struct riscv_short_iframe *frame) {
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printf("unhandled syscall handler\n");
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dump_iframe(frame, false);
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platform_halt(HALT_ACTION_HALT, HALT_REASON_SW_PANIC);
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}
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// called from assembly
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void riscv_exception_handler(long cause, ulong epc, struct riscv_short_iframe *frame, bool kernel);
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void riscv_exception_handler(long cause, ulong epc, struct riscv_short_iframe *frame, bool kernel) {
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LTRACEF("hart %u cause %#lx epc %#lx status %#lx kernel %d\n",
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riscv_current_hart(), cause, epc, frame->status, kernel);
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enum handler_return ret = INT_NO_RESCHEDULE;
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// top bit of the cause register determines if it's an interrupt or not
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if (cause < 0) {
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switch (cause & LONG_MAX) {
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#if WITH_SMP
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case RISCV_INTERRUPT_XSWI: // machine software interrupt
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ret = riscv_software_exception();
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break;
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#endif
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case RISCV_INTERRUPT_XTIM: // machine timer interrupt
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ret = riscv_timer_exception();
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break;
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case RISCV_INTERRUPT_XEXT: // machine external interrupt
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ret = riscv_platform_irq();
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break;
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default:
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fatal_exception(cause, epc, frame, kernel);
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}
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} else {
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// all synchronous traps go here
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switch (cause) {
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case RISCV_EXCEPTION_ENV_CALL_U_MODE: // ecall from user mode
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riscv_syscall_handler(frame);
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break;
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default:
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fatal_exception(cause, epc, frame, kernel);
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}
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}
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if (ret == INT_RESCHEDULE) {
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thread_preempt();
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}
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}
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