936ee8ac81
Doesn't do much but provided the detection path for it and ability to hold initialized state. The higher level platform code is going to need to use it directly so will mostly just provide an api for access to it. Moved ACPI sniffing back to just after the VM is initialized instead of all the way into platform_init(). This should try to ensure that all drivers that come up afterwards will have ioapics discovered in case future development tries to enable and use them, kicking the machine out of virtual-wire-mode.
301 lines
10 KiB
C
301 lines
10 KiB
C
/*
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* Copyright (c) 2009 Corey Tabaka
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* Copyright (c) 2015 Intel Corporation
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* Copyright (c) 2016 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <lk/err.h>
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#include <lk/init.h>
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#include <lk/trace.h>
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#include <arch/x86/mmu.h>
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#include <arch/x86/apic.h>
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#include <platform.h>
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#include <platform/pc.h>
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#include <platform/console.h>
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#include <platform/keyboard.h>
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#include <dev/uart.h>
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#include <hw/multiboot.h>
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#include <arch/x86.h>
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#include <arch/mmu.h>
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#include <malloc.h>
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#include <assert.h>
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#include <inttypes.h>
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#include <kernel/vm.h>
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#include "platform_p.h"
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#if WITH_DEV_BUS_PCI
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#include <dev/bus/pci.h>
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#endif
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#if WITH_LIB_MINIP
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#include <lib/minip.h>
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#endif
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#if WITH_LIB_ACPI_LITE
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#include <lib/acpi_lite.h>
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static bool found_acpi = false;
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#endif
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#define LOCAL_TRACE 0
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/* multiboot information passed in, if present */
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extern uint32_t _multiboot_info;
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#define DEFAULT_MEMEND (16*1024*1024)
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extern uint64_t __code_start;
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extern uint64_t __code_end;
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extern uint64_t __rodata_start;
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extern uint64_t __rodata_end;
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extern uint64_t __data_start;
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extern uint64_t __data_end;
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extern uint64_t __bss_start;
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extern uint64_t __bss_end;
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/* based on multiboot (or other methods) we support up to 16 arenas */
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#define NUM_ARENAS 16
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static pmm_arena_t mem_arena[NUM_ARENAS];
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/* parse an array of multiboot mmap entries */
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static status_t parse_multiboot_mmap(const memory_map_t *mmap, const size_t mmap_length, size_t *found_mem_arenas) {
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for (uint i = 0; i < mmap_length / sizeof(memory_map_t); i++) {
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uint64_t base = mmap[i].base_addr_low | (uint64_t)mmap[i].base_addr_high << 32;
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uint64_t length = mmap[i].length_low | (uint64_t)mmap[i].length_high << 32;
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dprintf(SPEW, "\ttype %u addr %#" PRIx64 " len %#" PRIx64 "\n",
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mmap[i].type, base, length);
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if (mmap[i].type == MB_MMAP_TYPE_AVAILABLE) {
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/* do some sanity checks to cut out small arenas */
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if (length < PAGE_SIZE * 2) {
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continue;
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}
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/* align the base and length */
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uint64_t oldbase = base;
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base = PAGE_ALIGN(base);
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if (base > oldbase) {
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length -= base - oldbase;
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}
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length = ROUNDDOWN(length, PAGE_SIZE);
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/* ignore memory < 1MB */
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if (base < 1*MB) {
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/* skip everything < 1MB */
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continue;
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}
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/* ignore everything that extends past the size PHYSMAP maps into the kernel.
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* see arch/x86/arch.c mmu_initial_mappings
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*/
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if (base >= PHYSMAP_SIZE) {
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continue;
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}
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uint64_t end = base + length;
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if (end > PHYSMAP_SIZE) {
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end = PHYSMAP_SIZE;
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DEBUG_ASSERT(end > base);
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length = end - base;
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dprintf(INFO, "PC: trimmed memory to %" PRIu64 " bytes\n", PHYSMAP_SIZE);
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}
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/* initialize a new pmm arena */
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mem_arena[*found_mem_arenas].name = "memory";
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mem_arena[*found_mem_arenas].base = base;
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mem_arena[*found_mem_arenas].size = length;
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mem_arena[*found_mem_arenas].priority = 1;
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mem_arena[*found_mem_arenas].flags = PMM_ARENA_FLAG_KMAP;
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(*found_mem_arenas)++;
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if (*found_mem_arenas == countof(mem_arena)) {
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break;
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}
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}
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}
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return NO_ERROR;
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}
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/* Walk through the multiboot structure and attempt to discover all of the runs
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* of physical memory to bootstrap the pmm areas.
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* Returns number of arenas initialized in passed in pointer
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*/
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static status_t platform_parse_multiboot_info(size_t *found_mem_arenas) {
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*found_mem_arenas = 0;
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dprintf(SPEW, "PC: multiboot address %#" PRIx32 "\n", _multiboot_info);
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if (_multiboot_info == 0) {
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return ERR_NOT_FOUND;
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}
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/* bump the multiboot pointer up to the kernel mapping */
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/* TODO: test that it's within range of the kernel mapping */
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const multiboot_info_t *multiboot_info = (void *)((uintptr_t)_multiboot_info + KERNEL_BASE);
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dprintf(SPEW, "\tflags %#x\n", multiboot_info->flags);
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// legacy multiboot memory size field
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if (multiboot_info->flags & MB_INFO_MEM_SIZE) {
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dprintf(SPEW, "PC: multiboot memory lower %#x upper %#" PRIx64 "\n",
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multiboot_info->mem_lower * 1024U, multiboot_info->mem_upper * 1024ULL);
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if ((multiboot_info->flags & MB_INFO_MMAP) == 0) {
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// There is no mmap to give us a more detailed memory map
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// so we'll need to use this one. Synthesize a fake mmap array to pass
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// to the mmap code.
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memory_map_t mmap[2] = {};
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mmap[0].length_low = multiboot_info->mem_lower * 1024U;
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mmap[0].type = MB_MMAP_TYPE_AVAILABLE;
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mmap[1].base_addr_low = 1 * 1024U * 1024U;
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mmap[1].length_low = multiboot_info->mem_upper * 1024U;
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mmap[1].type = MB_MMAP_TYPE_AVAILABLE;
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parse_multiboot_mmap(mmap, 2 * sizeof(memory_map_t), found_mem_arenas);
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}
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}
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// more modern multiboot mmap array
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if (multiboot_info->flags & MB_INFO_MMAP) {
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const memory_map_t *mmap = (const memory_map_t *)(uintptr_t)multiboot_info->mmap_addr;
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mmap = (void *)((uintptr_t)mmap + KERNEL_BASE);
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dprintf(SPEW, "PC: multiboot memory map, length %u:\n", multiboot_info->mmap_length);
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parse_multiboot_mmap(mmap, multiboot_info->mmap_length, found_mem_arenas);
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}
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if (multiboot_info->flags & MB_INFO_FRAMEBUFFER) {
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dprintf(SPEW, "PC: multiboot framebuffer info present\n");
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dprintf(SPEW, "\taddress %#" PRIx64 " pitch %u width %u height %u bpp %hhu type %u\n",
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multiboot_info->framebuffer_addr, multiboot_info->framebuffer_pitch,
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multiboot_info->framebuffer_width, multiboot_info->framebuffer_height,
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multiboot_info->framebuffer_bpp, multiboot_info->framebuffer_type);
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if (multiboot_info->framebuffer_type == MULTIBOOT_FRAMEBUFFER_TYPE_RGB) {
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dprintf(SPEW, "\tcolor bit layout: R %u:%u G %u:%u B %u:%u\n",
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multiboot_info->framebuffer_red_field_position, multiboot_info->framebuffer_red_mask_size,
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multiboot_info->framebuffer_green_field_position, multiboot_info->framebuffer_green_mask_size,
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multiboot_info->framebuffer_blue_field_position, multiboot_info->framebuffer_blue_mask_size);
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}
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}
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return NO_ERROR;
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}
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void platform_early_init(void) {
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/* get the debug output working */
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platform_init_debug_early();
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/* get the text console working */
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platform_init_console();
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/* initialize the interrupt controller */
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platform_init_interrupts();
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/* look at multiboot to determine our memory size */
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size_t found_arenas;
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platform_parse_multiboot_info(&found_arenas);
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if (found_arenas <= 0) {
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/* if we couldn't find any memory, initialize a default arena */
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mem_arena[0] = (pmm_arena_t) {
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.name = "memory",
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.base = MEMBASE,
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.size = DEFAULT_MEMEND,
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.priority = 1,
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.flags = PMM_ARENA_FLAG_KMAP
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};
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found_arenas = 1;
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printf("PC: WARNING failed to detect memory map from multiboot, using default\n");
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}
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DEBUG_ASSERT(found_arenas > 0 && found_arenas <= countof(mem_arena));
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/* add the arenas we just set up to the pmm */
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uint64_t total_mem = 0;
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for (size_t i = 0; i < found_arenas; i++) {
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pmm_add_arena(&mem_arena[i]);
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total_mem += mem_arena[i].size;
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}
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dprintf(INFO, "PC: total memory detected %" PRIu64 " bytes\n", total_mem);
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}
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// Look for the ACPI tables just after the vm is initialized.
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void platform_init_postvm(uint level) {
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#if WITH_LIB_ACPI_LITE
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// Look for the root ACPI table
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status_t err = acpi_lite_init(0);
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if (err != NO_ERROR) {
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return;
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}
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found_acpi = true;
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if (LOCAL_TRACE) {
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acpi_lite_dump_tables(false);
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}
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acpi_lite_dump_madt_table();
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#endif
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platform_init_interrupts_postvm();
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platform_init_timer();
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}
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LK_INIT_HOOK(platform_init_postvm, platform_init_postvm, LK_INIT_LEVEL_VM);
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void platform_init(void) {
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platform_init_debug();
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platform_init_keyboard(&console_input_buf);
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// Look for secondary cpus
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#if WITH_SMP
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platform_start_secondary_cpus();
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#endif
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#if WITH_DEV_BUS_PCI
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bool pci_initted = false;
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if (found_acpi) {
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// TODO: handle interrupt source overrides from the MADT table
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// try to find the mcfg table
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const struct acpi_mcfg_table *table = (const struct acpi_mcfg_table *)acpi_get_table_by_sig(ACPI_MCFG_SIG);
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if (table) {
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if (table->header.length >= sizeof(*table) + sizeof(struct acpi_mcfg_entry)) {
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const struct acpi_mcfg_entry *entry = (const void *)(table + 1);
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printf("PCI MCFG: segment %#hx bus [%hhu...%hhu] address %#llx\n",
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entry->segment, entry->start_bus, entry->end_bus, entry->base_address);
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// try to initialize pci based on the MCFG ecam aperture
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status_t err = pci_init_ecam(entry->base_address, entry->segment, entry->start_bus, entry->end_bus);
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if (err == NO_ERROR) {
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pci_bus_mgr_init();
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pci_initted = true;
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}
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}
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}
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}
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// fall back to legacy pci if we couldn't find the pcie aperture
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if (!pci_initted) {
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status_t err = pci_init_legacy();
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if (err == NO_ERROR) {
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pci_bus_mgr_init();
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}
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}
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#endif
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platform_init_mmu_mappings();
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}
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#if WITH_LIB_MINIP
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void _start_minip(uint level) {
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extern status_t e1000_register_with_minip(void);
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status_t err = e1000_register_with_minip();
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if (err == NO_ERROR) {
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minip_start_dhcp();
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}
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}
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LK_INIT_HOOK(start_minip, _start_minip, LK_INIT_LEVEL_APPS - 1);
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#endif
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