d6fa4d5b80
-Add interrupt controller and timer support for qemu virt machine -Switch tty read to irq driven as well
131 lines
3.0 KiB
C
131 lines
3.0 KiB
C
/*
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* Copyright (c) 2021 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <lk/reg.h>
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#include <lk/trace.h>
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#include <lib/cbuf.h>
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#include <kernel/thread.h>
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#include <platform.h>
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#include <platform/interrupts.h>
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#include <platform/debug.h>
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#include <platform/virt.h>
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#include <sys/types.h>
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#include "platform_p.h"
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// goldfish tty
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// from https://github.com/qemu/qemu/blob/master/hw/char/goldfish_tty.c
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volatile unsigned int * const goldfish_tty_base = (void *)VIRT_GF_TTY_MMIO_BASE;
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// registers
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enum {
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REG_PUT_CHAR = 0x00,
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REG_BYTES_READY = 0x04,
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REG_CMD = 0x08,
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REG_DATA_PTR = 0x10,
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REG_DATA_LEN = 0x14,
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REG_DATA_PTR_HIGH = 0x18,
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REG_VERSION = 0x20,
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};
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// commands
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enum {
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CMD_INT_DISABLE = 0x00,
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CMD_INT_ENABLE = 0x01,
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CMD_WRITE_BUFFER = 0x02,
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CMD_READ_BUFFER = 0x03,
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};
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#define RXBUF_SIZE 128
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static char uart_rx_buf_data[RXBUF_SIZE];
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static cbuf_t uart_rx_buf;
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static char transfer_buf[1]; // static pointer used to transfer MMIO data
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static void write_reg(int reg, uint32_t val) {
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goldfish_tty_base[reg / 4] = val;
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}
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static uint32_t read_reg(int reg) {
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return goldfish_tty_base[reg / 4];
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}
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static enum handler_return uart_irq_handler(void *arg) {
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bool resched = false;
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// use a DMA read of one byte if a byte is ready
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if (read_reg(REG_BYTES_READY) > 0) {
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write_reg(REG_CMD, CMD_READ_BUFFER);
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char c = transfer_buf[0];
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cbuf_write_char(&uart_rx_buf, c, false);
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resched = true;
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}
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return resched ? INT_RESCHEDULE : INT_NO_RESCHEDULE;
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}
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void goldfish_tty_early_init(void) {
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// make sure irqs are disabled
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write_reg(REG_CMD, CMD_INT_DISABLE);
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// set up the transfer buffer for receives
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write_reg(REG_DATA_PTR, (uint32_t)transfer_buf);
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write_reg(REG_DATA_PTR_HIGH, 0);
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write_reg(REG_DATA_LEN, sizeof(transfer_buf));
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}
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void goldfish_tty_init(void) {
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/* finish uart init to get rx going */
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cbuf_initialize_etc(&uart_rx_buf, RXBUF_SIZE, uart_rx_buf_data);
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register_int_handler(GOLDFISH_TTY_IRQ, uart_irq_handler, NULL);
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unmask_interrupt(GOLDFISH_TTY_IRQ);
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write_reg(REG_CMD, CMD_INT_ENABLE);
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}
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void uart_putc(char c) {
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write_reg(REG_PUT_CHAR, c);
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}
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int uart_getc(char *c, bool wait) {
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#if 1
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return cbuf_read_char(&uart_rx_buf, c, wait);
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#else
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return platform_pgetc(c, false);
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#endif
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}
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void platform_dputc(char c) {
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if (c == '\n')
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platform_dputc('\r');
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uart_putc(c);
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}
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int platform_dgetc(char *c, bool wait) {
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int ret = uart_getc(c, wait);
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return ret;
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}
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/* panic-time getc/putc */
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void platform_pputc(char c) {
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return uart_putc(c);
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}
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int platform_pgetc(char *c, bool wait) {
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// use a DMA read of one byte if a byte is ready
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if (read_reg(REG_BYTES_READY) > 0) {
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write_reg(REG_CMD, CMD_READ_BUFFER);
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*c = transfer_buf[0];
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return 0;
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}
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return -1;
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}
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