7c2c8d8e56
Move a copy of the PLIC driver out of one of the platforms and make the setup of the interrupt controller a bit more dynamic.
297 lines
8.8 KiB
C
297 lines
8.8 KiB
C
/*
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* Copyright (c) 2018 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <inttypes.h>
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#include <lk/err.h>
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#include <lk/reg.h>
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#include <lk/trace.h>
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#include <kernel/thread.h>
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#include <platform.h>
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#include <platform/interrupts.h>
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#include <platform/debug.h>
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#include <platform/timer.h>
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#include <platform/virt.h>
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#include <sys/types.h>
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#include <lib/fdtwalk.h>
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#include <dev/bus/pci.h>
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#include <dev/virtio.h>
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#include <dev/virtio/net.h>
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#include <dev/interrupt/riscv_plic.h>
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#if WITH_LIB_MINIP
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#include <lib/minip.h>
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#endif
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#if WITH_KERNEL_VM
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#include <kernel/vm.h>
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#else
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#include <kernel/novm.h>
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#endif
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#if WITH_LIB_CONSOLE
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#include <lib/console.h>
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#endif
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#include "platform_p.h"
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#define LOCAL_TRACE 0
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extern ulong lk_boot_args[4];
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#if WITH_KERNEL_VM
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#define DEFAULT_MEMORY_SIZE (MEMSIZE) /* try to fetch from the emulator via the fdt */
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static pmm_arena_t arena = {
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.name = "ram",
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.base = MEMORY_BASE_PHYS,
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.size = DEFAULT_MEMORY_SIZE,
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.flags = PMM_ARENA_FLAG_KMAP,
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};
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#endif
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static volatile uint32_t *power_reset_reg;
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// callbacks to the fdt_walk routine
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static void memcallback(uint64_t base, uint64_t len, void *cookie) {
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bool *found_mem = (bool *)cookie;
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LTRACEF("base %#llx len %#llx cookie %p\n", base, len, cookie);
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/* add another vm arena */
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if (!*found_mem) {
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printf("FDT: found memory arena, base %#llx size %#llx\n", base, len);
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#if WITH_KERNEL_VM
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arena.base = base;
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arena.size = len;
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pmm_add_arena(&arena);
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#else
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novm_add_arena("fdt", base, len);
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#endif
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*found_mem = true; // stop searching after the first one
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}
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}
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struct reserved_memory_regions {
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size_t count;
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struct {
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uint64_t base;
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uint64_t len;
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} regions[16];
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};
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static void reserved_memory_callback(uint64_t base, uint64_t len, void *cookie) {
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struct reserved_memory_regions *mem = cookie;
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LTRACEF("base %#llx len %#llx\n", base, len);
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if (mem->count < countof(mem->regions)) {
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mem->regions[mem->count].base = base;
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mem->regions[mem->count].len = len;
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mem->count++;
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}
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}
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static void cpucallback(uint64_t id, void *cookie) {
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int *cpu_count = (int *)cookie;
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LTRACEF("id %#llx cookie %p\n", id, cookie);
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(*cpu_count)++;
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}
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struct pcie_detect_state {
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struct fdt_walk_pcie_info info;
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} pcie_state;
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static void pciecallback(const struct fdt_walk_pcie_info *info, void *cookie) {
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struct pcie_detect_state *state = cookie;
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LTRACEF("ecam base %#llx, len %#llx, bus_start %hhu, bus_end %hhu\n", info->ecam_base, info->ecam_len, info->bus_start, info->bus_end);
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state->info = *info;
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}
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void platform_early_init(void) {
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plic_early_init(PLIC_BASE_VIRT, NUM_IRQS, false);
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LTRACEF("starting FDT scan\n");
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/* look for a flattened device tree in the second arg passed to us */
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bool found_mem = false;
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int cpu_count = 0;
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struct reserved_memory_regions reserved = {0};
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const void *fdt = (void *)lk_boot_args[1];
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#if WITH_KERNEL_VM
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fdt = (const void *)((uintptr_t)fdt + PERIPHERAL_BASE_VIRT);
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#endif
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struct fdt_walk_callbacks cb = {
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.mem = memcallback,
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.memcookie = &found_mem,
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.reserved_memory = reserved_memory_callback,
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.reserved_memory_cookie = &reserved,
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.cpu = cpucallback,
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.cpucookie = &cpu_count,
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.pcie = pciecallback,
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.pciecookie = &pcie_state,
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};
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status_t err = fdt_walk(fdt, &cb);
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LTRACEF("fdt_walk returns %d\n", err);
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if (err != 0) {
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printf("FDT: error finding FDT at %p, using default memory & cpu count\n", fdt);
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}
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/* add a default memory region if we didn't find it in the FDT */
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if (!found_mem) {
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#if WITH_KERNEL_VM
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pmm_add_arena(&arena);
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#else
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novm_add_arena("default", MEMBASE, MEMSIZE);
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#endif
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}
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#if WITH_KERNEL_VM
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/* reserve memory described by the FDT */
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for (size_t i = 0; i < reserved.count; i++) {
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printf("FDT: reserving memory range [%#llx ... %#llx]\n",
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reserved.regions[i].base, reserved.regions[i].base + reserved.regions[i].len - 1);
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struct list_node list = LIST_INITIAL_VALUE(list);
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pmm_alloc_range(reserved.regions[i].base, reserved.regions[i].len / PAGE_SIZE, &list);
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}
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#endif
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if (cpu_count > 0) {
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printf("FDT: found %d cpu%c\n", cpu_count, cpu_count == 1 ? ' ' : 's');
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riscv_set_secondary_count(cpu_count - 1);
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}
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LTRACEF("done scanning FDT\n");
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/* save a copy of the pointer to the poweroff/reset register */
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/* TODO: read it from the FDT */
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#if WITH_KERNEL_VM
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power_reset_reg = paddr_to_kvaddr(0x100000);
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#else
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power_reset_reg = (void *)0x100000;
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#endif
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}
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void platform_init(void) {
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plic_init();
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uart_init();
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/* detect pci */
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if (pcie_state.info.ecam_len > 0) {
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printf("PCIE: initializing pcie with ecam at %#" PRIx64 " found in FDT\n", pcie_state.info.ecam_base);
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status_t err = pci_init_ecam(pcie_state.info.ecam_base, pcie_state.info.ecam_len, pcie_state.info.bus_start, pcie_state.info.bus_end);
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if (err == NO_ERROR) {
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// add some additional resources to the pci bus manager in case it needs to configure
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if (pcie_state.info.io_len > 0) {
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// we can only deal with a mapping of io base 0 to the mmio base
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DEBUG_ASSERT(pcie_state.info.io_base == 0);
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pci_bus_mgr_add_resource(PCI_RESOURCE_IO_RANGE, pcie_state.info.io_base, pcie_state.info.io_len);
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// TODO: set the mmio base somehow so pci knows what to do with it
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}
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if (pcie_state.info.mmio_len > 0) {
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pci_bus_mgr_add_resource(PCI_RESOURCE_MMIO_RANGE, pcie_state.info.mmio_base, pcie_state.info.mmio_len);
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}
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if (pcie_state.info.mmio64_len > 0) {
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pci_bus_mgr_add_resource(PCI_RESOURCE_MMIO64_RANGE, pcie_state.info.mmio64_base, pcie_state.info.mmio64_len);
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}
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// start the bus manager
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pci_bus_mgr_init();
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pci_bus_mgr_assign_resources(); // add some additional resources to the pci bus manager in case it needs to configure
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};
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}
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/* detect any virtio devices */
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uint virtio_irqs[NUM_VIRTIO_TRANSPORTS];
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for (int i = 0; i < NUM_VIRTIO_TRANSPORTS; i++) {
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virtio_irqs[i] = IRQ_VIRTIO_BASE + i;
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}
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virtio_mmio_detect((void *)VIRTIO_BASE_VIRT, NUM_VIRTIO_TRANSPORTS, virtio_irqs, VIRTIO_STRIDE);
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#if WITH_LIB_MINIP
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if (virtio_net_found() > 0) {
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uint8_t mac_addr[6];
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virtio_net_get_mac_addr(mac_addr);
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TRACEF("found virtio networking interface\n");
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/* start minip */
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minip_set_eth(virtio_net_send_minip_pkt, NULL, mac_addr);
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virtio_net_start();
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#if 0
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__UNUSED uint32_t ip_addr = IPV4(192, 168, 0, 99);
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__UNUSED uint32_t ip_mask = IPV4(255, 255, 255, 0);
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__UNUSED uint32_t ip_gateway = IPV4_NONE;
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minip_start_static(ip_addr, ip_mask, ip_gateway);
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#else
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minip_start_dhcp();
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#endif
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}
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#endif
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}
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void platform_halt(platform_halt_action suggested_action,
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platform_halt_reason reason) {
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switch (suggested_action) {
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case HALT_ACTION_SHUTDOWN:
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dprintf(ALWAYS, "Shutting down... (reason = %d)\n", reason);
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#if RISCV_S_MODE
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// try to use SBI as a cleaner way to stop
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sbi_system_reset(SBI_RESET_TYPE_SHUTDOWN, SBI_RESET_REASON_NONE);
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#endif
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*power_reset_reg = 0x5555;
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break;
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case HALT_ACTION_REBOOT:
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dprintf(ALWAYS, "Rebooting... (reason = %d)\n", reason);
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#if RISCV_S_MODE
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sbi_system_reset(SBI_RESET_TYPE_COLD_REBOOT, SBI_RESET_REASON_NONE);
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#endif
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*power_reset_reg = 0x7777;
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break;
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case HALT_ACTION_HALT:
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#if ENABLE_PANIC_SHELL
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if (reason == HALT_REASON_SW_PANIC) {
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dprintf(ALWAYS, "CRASH: starting debug shell... (reason = %d)\n", reason);
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arch_disable_ints();
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panic_shell_start();
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}
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#endif // ENABLE_PANIC_SHELL
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dprintf(ALWAYS, "HALT: spinning forever... (reason = %d)\n", reason);
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break;
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}
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arch_disable_ints();
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for (;;)
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arch_idle();
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}
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status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector) {
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// at the moment there's no translation between PCI IRQs and native irqs
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*vector = pci_int;
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return NO_ERROR;
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}
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status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector) {
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return ERR_NOT_SUPPORTED;
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}
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status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge,
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uint64_t *msi_address_out, uint16_t *msi_data_out) {
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return ERR_NOT_SUPPORTED;
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}
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