6a7c4e25d6
This is a pretty major implementation change of the GIC driver, but it now handles v3. Unfortunately this is a bit of a revert of some of the code cleanups and whatnot that have happened on mainline, but will try to reapply these momentarily. TODO: -fix arm32 and computation of SGI targets for v3 -Consider removing all of the secure mode stuff which is really complicating things and basically untestable in mainline. -Properly split V2 and V3 into separate files, and have the main gic.c act as a redirector of calls. -Allow both v2 and v3 to compile at the same time. -Make configuration runtime configurable, stop using #define GICBASE and others.
33 lines
1.5 KiB
C
33 lines
1.5 KiB
C
/*
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* Copyright (c) 2019 LK Trusty Authors. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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void arm_gicv3_init(void);
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void arm_gicv3_init_percpu(void);
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void arm_gicv3_configure_irq_locked(unsigned int cpu, unsigned int vector);
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void arm_gicv3_suspend_cpu(unsigned int cpu);
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void arm_gicv3_resume_cpu_locked(unsigned int cpu, bool gicd);
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uint64_t arm_gicv3_sgir_val(u_int irq, size_t cpu_num);
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void arm_gicv3_wait_for_write_complete(void);
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