d8fa82cb91
Almost nothing changes here except moving braces to the same line as the function declaration. Everything else is largely whitespace changes and a few dangling files with tab indents. See scripts/codestyle
69 lines
1.6 KiB
C
69 lines
1.6 KiB
C
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#include "platform/rcc.h"
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#include <stm32f0xx.h>
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static __IO uint32_t *stm32_rcc_get_clock_en_reg(stm32_rcc_clk_t clock) {
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switch (STM32_RCC_CLK_REG(clock)) {
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case STM32_RCC_REG_AHB:
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return &RCC->AHBENR;
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case STM32_RCC_REG_APB1:
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return &RCC->APB1ENR;
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case STM32_RCC_REG_APB2:
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return &RCC->APB2ENR;
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default:
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return NULL;
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}
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}
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static __IO uint32_t *stm32_rcc_get_clock_rst_reg(stm32_rcc_clk_t clock) {
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switch (STM32_RCC_CLK_REG(clock)) {
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case STM32_RCC_REG_AHB:
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return &RCC->AHBRSTR;
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case STM32_RCC_REG_APB1:
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return &RCC->APB1RSTR;
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case STM32_RCC_REG_APB2:
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return &RCC->APB2RSTR;
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default:
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return NULL;
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}
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}
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void stm32_rcc_set_enable(stm32_rcc_clk_t clock, bool enable) {
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__IO uint32_t *reg = stm32_rcc_get_clock_en_reg(clock);
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if (enable) {
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*reg |= 1 << STM32_RCC_CLK_INDEX(clock);
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} else {
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*reg &= ~(1 << STM32_RCC_CLK_INDEX(clock));
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}
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}
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void stm32_rcc_set_reset(stm32_rcc_clk_t clock, bool reset) {
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switch (clock) {
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// These clocks to not have reset bits.
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case STM32_RCC_CLK_DMA:
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case STM32_RCC_CLK_DMA2:
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case STM32_RCC_CLK_SRAM:
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case STM32_RCC_CLK_FLITF:
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case STM32_RCC_CLK_CRC:
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return;
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default:
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break;
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}
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__IO uint32_t *reg = stm32_rcc_get_clock_rst_reg(clock);
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if (reset) {
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*reg |= 1 << STM32_RCC_CLK_INDEX(clock);
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} else {
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*reg &= ~(1 << STM32_RCC_CLK_INDEX(clock));
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}
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}
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