191 lines
4.5 KiB
C
191 lines
4.5 KiB
C
/*
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* Copyright (c) 2012 Travis Geiselbrecht
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* Copyright (c) 2016 Erik Gilling
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <assert.h>
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#include <lk/debug.h>
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#include <dev/gpio.h>
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#include <platform/gpio.h>
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#include <platform/rcc.h>
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#include <platform/stm32.h>
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#include <stm32f0xx.h>
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typedef GPIO_TypeDef stm32_gpio_t;
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typedef enum {
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STM32_GPIO_SPEED_2_MHZ = 0x0,
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STM32_GPIO_SPEED_20_MHZ = 0x1,
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STM32_GPIO_SPEED_50_MHZ = 0x3,
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} stm32_goio_speed_t;
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typedef enum {
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STM32_GPIO_OTYPE_PP = 0x0,
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STM32_GPIO_OTYPE_OD = 0x1,
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} stm32_gpio_otype_t;
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typedef enum {
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STM32_GPIO_MODE_IN = 0x0,
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STM32_GPIO_MODE_OUT = 0x1,
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STM32_GPIO_MODE_AF = 0x2,
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STM32_GPIO_MODE_AN = 0x3,
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} stm32_gpio_mode_t;
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typedef enum {
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STM32_GPIO_PUPD_NONE = 0x0,
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STM32_GPIO_PUPD_UP = 0x1,
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STM32_GPIO_PUPD_DOWN = 0x2,
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} stm32_gpio_pupd_t;
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static stm32_gpio_t *stm32_gpio_port_to_pointer(unsigned int port) {
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switch (port) {
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default:
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#ifdef GPIOA
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case GPIO_PORT_A:
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return GPIOA;
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#endif
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#ifdef GPIOB
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case GPIO_PORT_B:
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return GPIOB;
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#endif
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#ifdef GPIOC
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case GPIO_PORT_C:
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return GPIOC;
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#endif
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#ifdef GPIOD
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case GPIO_PORT_D:
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return GPIOD;
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#endif
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#ifdef GPIOE
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case GPIO_PORT_E:
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return GPIOE;
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#endif
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#ifdef GPIOF
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case GPIO_PORT_F:
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return GPIOF;
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#endif
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}
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}
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static void stm32_gpio_enable_port(unsigned int port) {
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DEBUG_ASSERT(port <= GPIO_PORT_F);
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switch (port) {
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default:
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#ifdef GPIOA
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case GPIO_PORT_A:
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stm32_rcc_set_enable(STM32_RCC_CLK_IOPA, true);
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break;
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#endif
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#ifdef GPIOB
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case GPIO_PORT_B:
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stm32_rcc_set_enable(STM32_RCC_CLK_IOPB, true);
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break;
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#endif
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#ifdef GPIOC
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case GPIO_PORT_C:
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stm32_rcc_set_enable(STM32_RCC_CLK_IOPC, true);
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break;
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#endif
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#ifdef GPIOD
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case GPIO_PORT_D:
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stm32_rcc_set_enable(STM32_RCC_CLK_IOPD, true);
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break;
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#endif
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#ifdef GPIOE
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case GPIO_PORT_E:
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stm32_rcc_set_enable(STM32_RCC_CLK_IOPE, true);
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break;
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#endif
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#ifdef GPIOF
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case GPIO_PORT_F:
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stm32_rcc_set_enable(STM32_RCC_CLK_IOPF, true);
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break;
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#endif
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}
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}
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void stm32_gpio_early_init(void) {
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}
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static void stm32_gpio_af_config(stm32_gpio_t *gpio, uint32_t pin,
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uint32_t af_num) {
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// 8 AF entries per register
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uint32_t reg_index = pin >> 3;
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uint32_t entry_shift = (pin & 0x7) * 4;
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gpio->AFR[reg_index] &= ~(0xf << entry_shift);
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gpio->AFR[reg_index] |= (af_num & 0xf) << entry_shift;
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}
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int gpio_config(unsigned nr, unsigned flags) {
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uint32_t port = GPIO_PORT(nr);
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uint32_t pin = GPIO_PIN(nr);
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stm32_gpio_t *gpio = stm32_gpio_port_to_pointer(port);
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assert(pin < 16);
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stm32_gpio_enable_port(port);
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if (flags & GPIO_STM32_AF) {
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stm32_gpio_af_config(gpio, pin, GPIO_AFNUM(flags));
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}
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if ((flags & GPIO_OUTPUT) || (flags & GPIO_STM32_AF)) {
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// All pins configured to 50MHz.
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gpio->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pin * 2));
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gpio->OSPEEDR |= STM32_GPIO_SPEED_50_MHZ << (pin * 2);
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// Output mode configuration
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gpio->OTYPER &= ~((GPIO_OTYPER_OT_0) << pin);
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if (flags & GPIO_STM32_OD) {
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gpio->OTYPER |= STM32_GPIO_OTYPE_OD << pin;
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} else {
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gpio->OTYPER |= STM32_GPIO_OTYPE_PP << pin;
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}
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}
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stm32_gpio_mode_t mode;
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if (flags & GPIO_OUTPUT) {
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mode = STM32_GPIO_MODE_OUT;
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} else if (flags & GPIO_STM32_AF) {
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mode = STM32_GPIO_MODE_AF;
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} else {
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mode = STM32_GPIO_MODE_IN;
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}
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gpio->MODER &= ~(GPIO_MODER_MODER0 << (pin * 2));
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gpio->MODER |= (mode << (pin * 2));
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stm32_gpio_pupd_t pupd = STM32_GPIO_PUPD_NONE;
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if (flags & GPIO_PULLUP) {
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pupd = STM32_GPIO_PUPD_UP;
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} else if (flags & GPIO_PULLDOWN) {
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pupd = STM32_GPIO_PUPD_DOWN;
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}
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gpio->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (pin * 2));
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gpio->PUPDR |= pupd << (pin * 2);
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return 0;
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}
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void gpio_set(unsigned nr, unsigned on) {
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stm32_gpio_t *gpio = stm32_gpio_port_to_pointer(GPIO_PORT(nr));
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if (on) {
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gpio->BSRR = 1 << GPIO_PIN(nr);
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} else {
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gpio->BRR = 1 << GPIO_PIN(nr);
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}
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}
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int gpio_get(unsigned nr) {
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stm32_gpio_t *gpio = stm32_gpio_port_to_pointer(GPIO_PORT(nr));
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return (gpio->IDR & (1 << GPIO_PIN(nr))) != 0;
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}
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