5a520eca3e
-Move the local apic driver to arch/x86 -Add routines to send IPIs between cpus Something is unstable at the moment and the system crashes after a while with random corruptions when using SMP.
151 lines
3.0 KiB
ArmAsm
151 lines
3.0 KiB
ArmAsm
/*
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* Copyright (c) 2009 Corey Tabaka
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* Copyright (c) 2015 Intel Corporation
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* Copyright (c) 2016 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <lk/asm.h>
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#include <arch/x86/descriptor.h>
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#define NUM_INT 0x100
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#define ISR_STUB_LEN 16
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.text
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/* interrupt service routine stubs */
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/*
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* pushq $i occupies 5 bytes when i >= 0x80 compare to
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* 2 bytes when i < 0x80, use align to fill the gap
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* to make sure isr_stub_len correct for each interrupts
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*/
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.balign ISR_STUB_LEN
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LOCAL_FUNCTION(_isr_vectors)
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_isr:
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.set i, 0
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.rept NUM_INT
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.balign ISR_STUB_LEN
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.if i == 8 || (i >= 10 && i <= 14) || i == 17
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/* error code pushed by exception */
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push $i /* interrupt number */
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jmp interrupt_common
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.else
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push $0 /* fill in error code in iframe */
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push $i /* interrupt number */
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jmp interrupt_common
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.endif
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.set i, i + 1
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.endr
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END_FUNCTION(_isr_vectors)
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.balign 16
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LOCAL_FUNCTION(interrupt_common)
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/* clear the direction bit */
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cld
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/* save general purpose registers */
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pushq %r15
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pushq %r14
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pushq %r13
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pushq %r12
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pushq %r11
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pushq %r10
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pushq %r9
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pushq %r8
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pushq %rax
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pushq %rcx
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pushq %rdx
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pushq %rbx
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pushq %rbp
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pushq %rsi
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pushq %rdi
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/* TODO: deal with swapgs if coming from user space */
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/* pass the iframe using rdi */
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movq %rsp, %rdi
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call x86_exception_handler
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/* restore general purpose registers */
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popq %rdi
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popq %rsi
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popq %rbp
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popq %rbx
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popq %rdx
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popq %rcx
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popq %rax
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popq %r8
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popq %r9
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popq %r10
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popq %r11
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popq %r12
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popq %r13
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popq %r14
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popq %r15
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/* drop vector number and error code*/
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addq $16, %rsp
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iretq
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END_FUNCTION(interrupt_common)
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FUNCTION(setup_idt)
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/* setup isr stub descriptors in the idt */
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mov $_isr_vectors, %rsi
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mov $_idt, %rdi
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movl $NUM_INT, %ecx
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.Lloop:
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mov %rsi, %rbx
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movw %bx, (%rdi) /* offset [0:15] in IDT(n).low */
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shr $16, %rbx
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movw %bx, 6(%rdi) /* offset [16:31] in IDT(n).high */
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shr $16, %rbx
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movl %ebx, 8(%rdi) /* offset [32:63] */
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add $ISR_STUB_LEN, %rsi /* index the next ISR stub */
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add $16, %rdi /* index the next IDT entry */
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loop .Lloop
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ret
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END_FUNCTION(setup_idt)
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.data
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.balign 8
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DATA(_idtr)
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.short _idt_end - _idt - 1 /* IDT limit */
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.quad _idt
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END_DATA(_idtr)
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.balign 16
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/* interrupt descriptor table (IDT) */
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DATA(_idt)
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.set i, 0
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.rept NUM_INT
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.short 0 /* low 16 bits of ISR offset (_isr#i & 0FFFFh) */
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.short CODE_64_SELECTOR /* selector */
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.byte 0
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.byte 0x8e /* present, ring 0, 64-bit interrupt gate */
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.short 0 /* high 16 bits of ISR offset (_isr#i / 65536) */
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.short 0 /* ISR offset */
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.short 0 /* ISR offset */
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.short 0 /* 32bits Reserved */
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.short 0 /* 32bits Reserved */
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.set i, i + 1
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.endr
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END_DATA(_idt)
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DATA(_idt_end)
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