204 lines
5.3 KiB
C
204 lines
5.3 KiB
C
/*
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* Copyright (c) 2012-2015 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <platform/qemu-virt.h>
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#include <arch.h>
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#include <lk/err.h>
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#include <lk/debug.h>
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#include <lk/trace.h>
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#include <dev/bus/pci.h>
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#include <dev/interrupt/arm_gic.h>
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#include <dev/power/psci.h>
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#include <dev/timer/arm_generic.h>
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#include <dev/uart/pl011.h>
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#include <dev/virtio.h>
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#include <dev/virtio/net.h>
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#include <lib/fdtwalk.h>
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#include <lk/init.h>
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#include <kernel/vm.h>
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#include <kernel/spinlock.h>
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#include <platform.h>
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#include <platform/gic.h>
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#include <platform/interrupts.h>
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#if WITH_LIB_MINIP
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#include <lib/minip.h>
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#endif
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#define LOCAL_TRACE 0
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#define DEFAULT_MEMORY_SIZE (MEMSIZE) /* try to fetch from the emulator via the fdt */
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/* initial memory mappings. parsed by start.S */
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struct mmu_initial_mapping mmu_initial_mappings[] = {
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/* all of memory */
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{
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.phys = MEMORY_BASE_PHYS,
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.virt = KERNEL_BASE,
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.size = MEMORY_APERTURE_SIZE,
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.flags = 0,
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.name = "memory"
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},
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/* 1GB of peripherals */
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{
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.phys = PERIPHERAL_BASE_PHYS,
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.virt = PERIPHERAL_BASE_VIRT,
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.size = PERIPHERAL_BASE_SIZE,
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.flags = MMU_INITIAL_MAPPING_FLAG_DEVICE,
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.name = "peripherals"
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},
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/* null entry to terminate the list */
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{ 0 }
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};
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const void *fdt = (void *)KERNEL_BASE;
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const void *get_fdt(void) {
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return fdt;
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}
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void platform_early_init(void) {
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const struct pl011_config uart_config = {
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.base = UART_BASE,
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.irq = UART0_INT,
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.flag = PL011_FLAG_DEBUG_UART,
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};
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pl011_init_early(0, &uart_config);
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/* initialize the interrupt controller */
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arm_gic_init();
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arm_generic_timer_init(ARM_GENERIC_TIMER_VIRTUAL_INT, 0);
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if (LOCAL_TRACE) {
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LTRACEF("dumping FDT at %p\n", fdt);
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fdt_walk_dump(fdt);
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}
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// detect physical memory layout from the device tree
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fdtwalk_setup_memory(fdt, MEMORY_BASE_PHYS, MEMORY_BASE_PHYS, DEFAULT_MEMORY_SIZE);
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}
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void platform_init(void) {
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pl011_init(0);
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// start secondary cores
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fdtwalk_setup_cpus_arm(fdt);
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/* configure and start pci from device tree */
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status_t err = fdtwalk_setup_pci(fdt);
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if (err >= NO_ERROR) {
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// start the bus manager
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pci_bus_mgr_init();
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// assign resources to all devices in case they need it
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pci_bus_mgr_assign_resources();
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}
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/* detect any virtio devices */
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uint virtio_irqs[NUM_VIRTIO_TRANSPORTS];
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for (int i = 0; i < NUM_VIRTIO_TRANSPORTS; i++) {
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virtio_irqs[i] = VIRTIO0_INT_BASE + i;
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}
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virtio_mmio_detect((void *)VIRTIO_BASE, NUM_VIRTIO_TRANSPORTS, virtio_irqs, 0x200);
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#if WITH_LIB_MINIP
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if (virtio_net_found() > 0) {
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uint8_t mac_addr[6];
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virtio_net_get_mac_addr(mac_addr);
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TRACEF("found virtio networking interface\n");
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/* start minip */
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minip_set_eth(virtio_net_send_minip_pkt, NULL, mac_addr);
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__UNUSED uint32_t ip_addr = IPV4(192, 168, 0, 99);
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__UNUSED uint32_t ip_mask = IPV4(255, 255, 255, 0);
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__UNUSED uint32_t ip_gateway = IPV4_NONE;
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virtio_net_start();
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//minip_start_static(ip_addr, ip_mask, ip_gateway);
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minip_start_dhcp();
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}
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#endif
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}
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status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector) {
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// only 4 legacy vectors supported, within PCIE_INT_BASE and PCIE_INT_BASE + 3
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if (pci_int >= 4) {
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return ERR_OUT_OF_RANGE;
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}
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*vector = pci_int + PCIE_INT_BASE;
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return NO_ERROR;
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}
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status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector) {
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TRACEF("count %zu align %u msi %d\n", count, align_log2, msi);
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// TODO: handle nonzero alignment, count > 0, and add locking
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// list of allocated msi interrupts
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static uint64_t msi_bitmap = 0;
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// cannot handle allocating for anything but MSI interrupts
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if (!msi) {
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return ERR_NOT_SUPPORTED;
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}
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// cannot deal with alignment yet
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DEBUG_ASSERT(align_log2 == 0);
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DEBUG_ASSERT(count == 1);
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// make a copy of the bitmap
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int allocated = -1;
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for (size_t i = 0; i < sizeof(msi_bitmap) * 8; i++) {
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if ((msi_bitmap & (1UL << i)) == 0) {
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msi_bitmap |= (1UL << i);
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allocated = i;
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break;
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}
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}
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if (allocated < 0) {
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return ERR_NOT_FOUND;
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}
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allocated += MSI_INT_BASE;
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TRACEF("allocated msi at %u\n", allocated);
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*vector = allocated;
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return NO_ERROR;
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}
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status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge,
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uint64_t *msi_address_out, uint16_t *msi_data_out) {
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// only handle edge triggered at the moment
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DEBUG_ASSERT(edge);
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// only handle cpu 0
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DEBUG_ASSERT(cpu == 0);
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// TODO: call through to the appropriate gic driver to deal with GICv2 vs v3
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*msi_data_out = vector;
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*msi_address_out = 0x08020040; // address of the GICv2 MSI port
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return NO_ERROR;
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}
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void platform_halt(platform_halt_action suggested_action, platform_halt_reason reason) {
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// Use the default halt implementation using psci as the reset and shutdown implementation.
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platform_halt_default(suggested_action, reason, &psci_system_reset, &psci_system_off);
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}
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