Files
lk/target/stm32746g-eval2/rules.mk
Travis Geiselbrecht dc454e719c [target][stm32746g-eval2] enable external SRAM block, update MPU cache params
For future reference:
TEX 001 C 1 B 1 S 0 is the full cache params for cortex-m7.
2015-08-19 17:24:30 -07:00

51 lines
930 B
Makefile

LOCAL_DIR := $(GET_LOCAL_DIR)
MODULE := $(LOCAL_DIR)
STM32_CHIP := stm32f746
PLATFORM := stm32f7xx
SDRAM_SIZE := 0x02000000
SDRAM_BASE := 0xc0000000
LCD_M_SIZE := 0x0012c000
EXT_SRAM_BASE := 0x68000000
EXT_SRAM_SIZE := 0x00200000
HEAP_START := 0xc012c000
HEAP_SIZE := 0x01ed4000
GLOBAL_DEFINES += \
ENABLE_UART1=1 \
ENABLE_SDRAM=1 \
SDRAM_BASE=$(SDRAM_BASE) \
SDRAM_SIZE=$(SDRAM_SIZE) \
EXT_SRAM_BASE=$(EXT_SRAM_BASE) \
EXT_SRAM_SIZE=$(EXT_SRAM_SIZE) \
\
WITH_STATIC_HEAP=1 \
HEAP_START=$(HEAP_START) \
HEAP_LEN=$(HEAP_SIZE) \
# XXX todo, drive pll config from here
#HSE_VALUE=8000000 \
PLL_M_VALUE=8 \
PLL_N_VALUE=336 \
PLL_P_VALUE=2
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
MODULE_SRCS += \
$(LOCAL_DIR)/init.c \
$(LOCAL_DIR)/lcd.c \
$(LOCAL_DIR)/sdram.c \
$(LOCAL_DIR)/sram.c
MODULE_DEPS += \
lib/gfx \
# lib/gfxconsole
include make/module.mk