296 lines
9.3 KiB
C
296 lines
9.3 KiB
C
/*
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* Copyright (c) 2015 Travis Geiselbrecht
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*
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* Use of this source code is governed by a MIT-style
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* license that can be found in the LICENSE file or at
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* https://opensource.org/licenses/MIT
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*/
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#include <lk/err.h>
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#include <lk/debug.h>
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#include <stdlib.h>
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#include <lk/reg.h>
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#include <dev/uart.h>
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#include <platform.h>
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#include <platform/stm32.h>
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#include <platform/sdram.h>
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#include <kernel/novm.h>
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#include <arch/arm/cm.h>
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uint32_t SystemCoreClock = HSI_VALUE;
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uint32_t stm32_unique_id[3];
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#if defined(ENABLE_SDRAM)
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// target exports this with sdram configuration values
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extern const sdram_config_t target_sdram_config;
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#endif
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void SystemInit(void) {
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/* Reset the RCC clock configuration to the default reset state ------------*/
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/* Set HSION bit */
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RCC->CR |= (uint32_t)0x00000001;
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/* Reset CFGR register */
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RCC->CFGR = 0x00000000;
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/* Reset HSEON, CSSON and PLLON bits */
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RCC->CR &= (uint32_t)0xFEF6FFFF;
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/* Reset PLLCFGR register */
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RCC->PLLCFGR = 0x24003010;
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/* Reset HSEBYP bit */
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RCC->CR &= (uint32_t)0xFFFBFFFF;
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/* Disable all interrupts */
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RCC->CIR = 0x00000000;
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__HAL_RCC_PWR_CLK_ENABLE();
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#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
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SystemInit_ExtMemCtl();
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#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
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}
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/**
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* @brief System Clock Configuration
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* The system Clock is configured as follow :
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* System Clock source = PLL (HSE or HSI)
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* SYSCLK(Hz) = 216000000
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* HCLK(Hz) = 216000000
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* AHB Prescaler = 1
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* APB1 Prescaler = 4
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* APB2 Prescaler = 2
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* HSE Frequency(Hz) = 25000000
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* PLL_M = 25 or 16
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* PLL_N = 432
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* PLL_P = 2
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* PLL_Q = 9
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* VDD(V) = 3.3
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* Main regulator output voltage = Scale1 mode
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* Flash Latency(WS) = 7
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* @param None
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* @retval None
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*/
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static void SystemClock_Config(void) {
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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HAL_StatusTypeDef ret = HAL_OK;
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#if defined(USE_HSE_XTAL)
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/* Enable HSE Oscillator and activate PLL with HSE as source.
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* The external XTAL is a more stable clock source.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 25;
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RCC_OscInitStruct.PLL.PLLN = 432;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 9;
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#else
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/* Enable HSI Oscillator and activate PLL with HSI as source.
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* Some boards like STm32756G-EVAL2 seem to malfuction with the
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* HSE xtal configuration.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = 16;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLM = 16;
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RCC_OscInitStruct.PLL.PLLN = 432;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 9;
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#endif
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ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
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if (ret != HAL_OK) {
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while (1) { ; }
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}
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/* Activate the OverDrive to reach the 216 MHz Frequency */
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ret = HAL_PWREx_EnableOverDrive();
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if (ret != HAL_OK) {
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while (1) { ; }
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}
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
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if (ret != HAL_OK) {
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while (1) { ; }
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}
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}
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void stm32_rng_init(void) {
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RNG_HandleTypeDef rng_handle = { 0 };
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__HAL_RCC_RNG_CLK_ENABLE();
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rng_handle.Instance = RNG;
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HAL_StatusTypeDef status = HAL_RNG_Init(&rng_handle);
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if (status != HAL_OK) {
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panic("error initializing random number hardware\n");
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}
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/* seed the pseudo random number generator with this */
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#if STM32_SEED_RAND_FROM_HWRNG
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uint32_t r;
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/* discard he first result */
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status = HAL_RNG_GenerateRandomNumber(&rng_handle, &r);
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if (status != HAL_OK) {
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panic("error getting random number from hardware\n");
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}
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status = HAL_RNG_GenerateRandomNumber(&rng_handle, &r);
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if (status != HAL_OK) {
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panic("error getting random number from hardware\n");
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}
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srand(r);
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#endif
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}
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/* set up the mpu to enable caching in the appropriate areas */
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static void mpu_init(void) {
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MPU_Region_InitTypeDef MPU_InitStruct;
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HAL_MPU_Disable();
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uint region_num = 0;
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/* mark the first bit of the address space as inaccessible, to catch null pointers */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = 0x0;
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MPU_InitStruct.Size = MPU_REGION_SIZE_128KB; /* 0x00200000 */
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MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = region_num++;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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#if defined(ENABLE_SDRAM)
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/* configure SDRAM */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = SDRAM_BASE;
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MPU_InitStruct.Size =
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#if SDRAM_SIZE == 0x00100000
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MPU_REGION_SIZE_1MB;
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#elif SDRAM_SIZE == 0x00200000
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MPU_REGION_SIZE_2MB;
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#elif SDRAM_SIZE == 0x00400000
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MPU_REGION_SIZE_4MB;
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#elif SDRAM_SIZE == 0x00800000
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MPU_REGION_SIZE_8MB;
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#elif SDRAM_SIZE == 0x01000000
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MPU_REGION_SIZE_16MB
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#elif SDRAM_SIZE == 0x02000000
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MPU_REGION_SIZE_32MB;
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#elif SDRAM_SIZE == 0x04000000
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MPU_REGION_SIZE_64MB;
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#elif SDRAM_SIZE == 0x08000000
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MPU_REGION_SIZE_128MB;
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#else
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#error SDRAM_SIZE not defined.
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#endif
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MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = region_num++;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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#endif
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// SRAM
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#if defined(ENABLE_EXT_SRAM)
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = EXT_SRAM_BASE;
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MPU_InitStruct.Size = MPU_REGION_SIZE_2MB; // XXX use max size of aperture?
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MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RW;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = region_num++;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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#endif
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HAL_MPU_Enable(MPU_HFNMI_PRIVDEF);
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}
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void platform_early_init(void) {
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// Do general system init
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SystemInit();
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SystemClock_Config();
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// Enable the flash ART controller
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__HAL_FLASH_ART_ENABLE();
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__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
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/* read the unique id */
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stm32_unique_id[0] = *REG32(0x1ff0f420);
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stm32_unique_id[1] = *REG32(0x1ff0f424);
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stm32_unique_id[2] = *REG32(0x1ff0f428);
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/* seed the random number generator based on this */
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srand(stm32_unique_id[0] ^ stm32_unique_id[1] ^ stm32_unique_id[2]);
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// Start the systick timer
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uint32_t sysclk = HAL_RCC_GetSysClockFreq();
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arm_cm_systick_init(sysclk);
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stm32_timer_early_init();
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stm32_gpio_early_init();
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stm32_flash_early_init();
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stm32_rng_init();
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stm32_usbc_early_init();
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/* clear the reboot reason */
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RCC->CSR |= (1<<24);
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#if defined(ENABLE_SDRAM)
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/* initialize SDRAM */
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stm32_sdram_init((sdram_config_t *)&target_sdram_config);
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/* add a novm arena for it */
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novm_add_arena("sdram", SDRAM_BASE, SDRAM_SIZE);
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#endif
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mpu_init();
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}
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void platform_init(void) {
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printf("clocks:\n");
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printf("\tsysclk %u\n", HAL_RCC_GetSysClockFreq());
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printf("\thclk %u\n", HAL_RCC_GetHCLKFreq());
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printf("\tpclk1 %u\n", HAL_RCC_GetPCLK1Freq());
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printf("\tpclk2 %u\n", HAL_RCC_GetPCLK2Freq());
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printf("unique id: 0x%08x%08x%08x\n", stm32_unique_id[0], stm32_unique_id[1], stm32_unique_id[2]);
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stm32_timer_init();
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stm32_flash_init();
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stm32_usbc_init();
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}
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