Travis Geiselbrecht a1eb850079 [target][visionfive2] set the time base properly ...

Seems to be running at 4Mhz according to the device tree.

2023-03-09 23:20:18 -08:00

..

include/platform

[dev][interrupt][riscv_plic] merge now 3 implementations of the same plic driver into one

2023-03-09 23:09:32 -08:00

platform_p.h

[dev][interrupt][riscv_plic] merge now 3 implementations of the same plic driver into one

2023-03-09 23:09:32 -08:00

platform.c

[dev][interrupt][riscv_plic] merge now 3 implementations of the same plic driver into one

2023-03-09 23:09:32 -08:00

rules.mk

[target][visionfive2] set the time base properly

2023-03-09 23:20:18 -08:00

uart.c

WIP [target][visionfive2] Add initial support for a VisionFive 2 RISC-V board

2023-03-06 01:06:27 -08:00