f12796e834
Allow arm8 systems to set ARM_CPU to armv8-a to use new armv8 instructions in 32 bit code. Change-Id: Idad8d5fd81c71bab2f306923df7d342bac742c28
59 lines
1.9 KiB
C
59 lines
1.9 KiB
C
/*
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* Copyright (c) 2008 Travis Geiselbrecht
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __ARCH_CPU_H
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#define __ARCH_CPU_H
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/* arm specific stuff */
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#define PAGE_SIZE 4096
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#define PAGE_SIZE_SHIFT 12
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#if ARM_CPU_ARM7
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/* irrelevant, no consistent cache */
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#define CACHE_LINE 32
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#elif ARM_CPU_ARM926
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#define CACHE_LINE 32
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#elif ARM_CPU_ARM1136
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#define CACHE_LINE 32
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#elif ARM_CPU_ARMEMU
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#define CACHE_LINE 32
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#elif ARM_CPU_CORTEX_A7
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#define CACHE_LINE 64 /* XXX L1 icache is 32 bytes */
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#elif ARM_CPU_CORTEX_A8
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#define CACHE_LINE 64
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#elif ARM_CPU_CORTEX_A9
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#define CACHE_LINE 32
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#elif ARM_CPU_CORTEX_M0 || ARM_CPU_CORTEX_M0_PLUS || ARM_CPU_CORTEX_M3 || ARM_CPU_CORTEX_M4
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#define CACHE_LINE 32 /* doesn't actually matter */
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#elif ARM_CPU_CORTEX_M7
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#define CACHE_LINE 32
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#elif ARM_CPU_CORTEX_A15
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#define CACHE_LINE 64
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#elif ARM_CPU_CORTEX_ARMV8_A
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#define CACHE_LINE 64
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#else
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#error unknown cpu
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#endif
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#endif
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