Travis Geiselbrecht 94bce26b6f WIP riscv32 supervisor mode ...

Kinda a fatal flaw with the way riscv assumes physmap starts at address
0, so will require some rethinking, probably

2024-05-23 23:05:47 -07:00

..

include/arch

WIP riscv32 supervisor mode

2024-05-23 23:05:47 -07:00

arch.c

[arch][riscv] add fpu context switch support

2022-07-17 23:27:42 -07:00

asm.S

[arch][riscv] move the iframe definitions into a separate header and add syscall support

2021-04-11 03:38:03 -07:00

exceptions.c

[arch][riscv] more interrupt cause debugging strings

2022-05-29 17:55:41 -07:00

fpu_asm.S

[arch][riscv] add fpu context switch support

2022-07-17 23:27:42 -07:00

linker-onesegment.ld

[arch][riscv] fix bug with gcc 10.2 & binutils 2.35 with section padding

2020-12-09 01:59:16 -08:00

linker-twosegment.ld

[arch][riscv] fix bug with gcc 10.2 & binutils 2.35 with section padding

2020-12-09 01:59:16 -08:00

mmu.cpp

WIP riscv32 supervisor mode

2024-05-23 23:05:47 -07:00

mp.c

[arch][riscv] change secondary cpu bootstrap api

2024-04-07 22:32:49 -07:00

riscv_priv.h

[arch][warnings] fix -Wmissing-declarations warnings

2021-10-21 23:08:38 -07:00

rules.mk

[make] remove an undefine, unsupported on older gnu makes

2024-05-10 16:15:54 -07:00

sbi.c

[arch][riscv] add new extensions for SBI 2.0

2024-04-23 23:27:02 -07:00

spinlock.c

[arch][riscv] general riscv spinlock cleanup

2023-12-28 17:02:07 -08:00

start.S

WIP riscv32 supervisor mode

2024-05-23 23:05:47 -07:00

thread.c

[arch][riscv] Add more defines and optimize fpu context switch

2023-02-18 16:39:45 -08:00

time.c

[warnings] remove some redundant declarations

2024-04-19 00:07:49 -07:00